/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* es8326.h -- es8326 ALSA SoC audio driver
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*
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* Copyright (c) 2021 Everest Semiconductor Co Ltd.
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* Copyright (c) 2021 Rockchip Electronics Co. Ltd.
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*
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* Author: David <zhuning@everset-semi.com>
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* Author: Xing Zheng <zhengxing@rock-chips.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _ES8326_H
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#define _ES8326_H
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#define CONFIG_HHTECH_MINIPMP 1
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/* ES8326 register space */
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#define ES8326_RESET_00 0x00
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#define ES8326_CLK_CTL_01 0x01
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#define ES8326_CLK_INV_02 0x02
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#define ES8326_CLK_RESAMPLE_03 0x03
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#define ES8326_CLK_DIV1_04 0x04
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#define ES8326_CLK_DIV2_05 0x05
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#define ES8326_CLK_DLL_06 0x06
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#define ES8326_CLK_MUX_07 0x07
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#define ES8326_CLK_ADC_SEL_08 0x08
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#define ES8326_CLK_DAC_SEL_09 0x09
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#define ES8326_CLK_ADC_OSR_0A 0x0a
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#define ES8326_CLK_DAC_OSR_0B 0x0b
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#define ES8326_CLK_DIV_CPC_0C 0x0c
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#define ES8326_CLK_DIV_BCLK_0D 0x0d
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#define ES8326_CLK_TRI_0E 0x0e
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#define ES8326_CLK_DIV_LRCK_0F 0x0f
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#define ES8326_CLK_VMIDS1_10 0x10
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#define ES8326_CLK_VMIDS2_11 0x11
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#define ES8326_CLK_CAL_TIME_12 0x12
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#define ES8326_FMT_13 0x13
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#define ES8326_DAC_MUTE_14 0x14
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#define ES8326_ADC_MUTE_15 0x15
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#define ES8326_ANA_PDN_16 0x16
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#define ES8326_PGA_PDN_17 0x17
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#define ES8326_VMIDSEL_18 0x18
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#define ES8326_ANA_LOWPOWER_19 0x19
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#define ES8326_ANA_DMS_1A 0x1a
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#define ES8326_ANA_MICBIAS_1B 0x1b
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#define ES8326_ANA_VSEL_1C 0x1c
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#define ES8326_SYS_BIAS_1D 0x1d
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#define ES8326_BIAS_SW1_1E 0x1e
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#define ES8326_BIAS_SW2_1F 0x1f
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#define ES8326_BIAS_SW3_20 0x20
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#define ES8326_BIAS_SW4_21 0x21
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#define ES8326_VMIDLOW_22 0x22
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#define ES8326_PAGGAIN_23 0x23
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#define ES8326_HP_DRVIER_24 0x24
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#define ES8326_DAC2HPMIX_25 0x25
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#define ES8326_HP_VOL_26 0x26
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#define ES8326_HP_CAL_27 0x27
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#define ES8326_HP_DRIVER_REF_28 0x28
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#define ES8326_ADC_SCALE_29 0x29
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#define ES8326_ADC1_SRC_2A 0x2a
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#define ES8326_ADC2_SRC_2B 0x2b
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#define ES8326_ADC1_VOL_2C 0x2c
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#define ES8326_ADC2_VOL_2D 0x2d
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#define ES8326_ADC_RAMPRATE_2E 0x2e
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#define ES8326_2F 0x2f
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#define ES8326_30 0x30
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#define ES8326_31 0x31
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#define ES8326_ALC_RECOVERY_32 0x32
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#define ES8326_ALC_LEVEL_33 0x33
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#define ES8326_ADC_HPFS1_34 0x34
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#define ES8326_ADC_HPFS2_35 0x35
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#define ES8326_ADC_EQ_36 0x36
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#define ES8326_HP_CAL_4A 0x4A
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#define ES8326_HPL_OFFSET_INI_4B 0x4B
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#define ES8326_HPR_OFFSET_INI_4C 0x4C
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#define ES8326_DAC_DSM_4D 0x4D
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#define ES8326_DAC_RAMPRATE_4E 0x4E
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#define ES8326_DAC_VPPSCALE_4F 0x4F
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#define ES8326_DAC_VOL_50 0x50
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#define ES8326_DRC_RECOVERY_53 0x53
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#define ES8326_DRC_WINSIZE_54 0x54
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#define ES8326_HPJACK_TIMER_56 0x56
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#define ES8326_HPJACK_POL_57 0x57
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#define ES8326_INT_SOURCE_58 0x58
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#define ES8326_INTOUT_IO_59 0x59
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#define ES8326_SDINOUT1_IO_5A 0x5A
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#define ES8326_SDINOUT23_IO_5B 0x5B
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#define ES8326_JACK_PULSE_5C 0x5C
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#define ES8326_PULLUP_CTL_F9 0xF9
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#define ES8326_HP_DECTECT_FB 0xFB
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#define ES8326_CHIP_ID1_FD 0xFD
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#define ES8326_CHIP_ID2_FE 0xFE
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#define ES8326_CHIP_VERSION_FF 0xFF
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#define ES8326_LADC_VOL ES8326_ADCCONTROL8
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#define ES8326_RADC_VOL ES8326_ADCCONTROL9
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#define ES8326_LDAC_VOL ES8326_DACCONTROL4
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#define ES8326_RDAC_VOL ES8326_DACCONTROL5
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#define ES8326_LOUT1_VOL ES8326_DACCONTROL24
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#define ES8326_ROUT1_VOL ES8326_DACCONTROL25
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#define ES8326_LOUT2_VOL ES8326_DACCONTROL26
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#define ES8326_ROUT2_VOL ES8326_DACCONTROL27
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#define ES8326_ADC_MUTE ES8326_ADCCONTROL7
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#define ES8326_DAC_MUTE ES8326_DACCONTROL3
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#define ES8326_IFACE ES8326_MASTERMODE
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#define ES8326_ADC_IFACE ES8326_ADCCONTROL4
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#define ES8326_ADC_SRATE ES8326_ADCCONTROL5
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#define ES8326_DAC_IFACE ES8326_DACCONTROL1
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#define ES8326_DAC_SRATE ES8326_DACCONTROL2
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#define ES8326_CACHEREGNUM 53
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#define ES8326_SYSCLK 0
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#define ES8326_PLL1 0
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#define ES8326_PLL2 1
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/* clock inputs */
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#define ES8326_MCLK 0
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#define ES8326_PCMCLK 1
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/* clock divider id's */
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#define ES8326_PCMDIV 0
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#define ES8326_BCLKDIV 1
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#define ES8326_VXCLKDIV 2
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/* PCM clock dividers */
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#define ES8326_PCM_DIV_1 (0 << 6)
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#define ES8326_PCM_DIV_3 (2 << 6)
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#define ES8326_PCM_DIV_5_5 (3 << 6)
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#define ES8326_PCM_DIV_2 (4 << 6)
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#define ES8326_PCM_DIV_4 (5 << 6)
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#define ES8326_PCM_DIV_6 (6 << 6)
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#define ES8326_PCM_DIV_8 (7 << 6)
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/* BCLK clock dividers */
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#define ES8326_BCLK_DIV_1 (0 << 7)
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#define ES8326_BCLK_DIV_2 (1 << 7)
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#define ES8326_BCLK_DIV_4 (2 << 7)
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#define ES8326_BCLK_DIV_8 (3 << 7)
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/* VXCLK clock dividers */
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#define ES8326_VXCLK_DIV_1 (0 << 6)
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#define ES8326_VXCLK_DIV_2 (1 << 6)
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#define ES8326_VXCLK_DIV_4 (2 << 6)
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#define ES8326_VXCLK_DIV_8 (3 << 6)
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#define ES8326_VXCLK_DIV_16 (4 << 6)
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#define ES8326_DAI_HIFI 0
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#define ES8326_DAI_VOICE 1
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#define ES8326_1536FS 1536
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#define ES8326_1024FS 1024
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#define ES8326_768FS 768
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#define ES8326_512FS 512
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#define ES8326_384FS 384
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#define ES8326_256FS 256
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#define ES8326_128FS 128
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#endif /* _ES8326_H */
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