/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Register definitions for Atmel AC97C
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*
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* Copyright (C) 2005-2009 Atmel Corporation
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*/
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#ifndef __SOUND_ATMEL_AC97C_H
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#define __SOUND_ATMEL_AC97C_H
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#define AC97C_MR 0x08
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#define AC97C_ICA 0x10
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#define AC97C_OCA 0x14
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#define AC97C_CARHR 0x20
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#define AC97C_CATHR 0x24
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#define AC97C_CASR 0x28
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#define AC97C_CAMR 0x2c
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#define AC97C_CORHR 0x40
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#define AC97C_COTHR 0x44
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#define AC97C_COSR 0x48
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#define AC97C_COMR 0x4c
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#define AC97C_SR 0x50
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#define AC97C_IER 0x54
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#define AC97C_IDR 0x58
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#define AC97C_IMR 0x5c
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#define AC97C_VERSION 0xfc
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#define AC97C_CATPR PDC_TPR
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#define AC97C_CATCR PDC_TCR
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#define AC97C_CATNPR PDC_TNPR
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#define AC97C_CATNCR PDC_TNCR
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#define AC97C_CARPR PDC_RPR
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#define AC97C_CARCR PDC_RCR
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#define AC97C_CARNPR PDC_RNPR
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#define AC97C_CARNCR PDC_RNCR
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#define AC97C_PTCR PDC_PTCR
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#define AC97C_MR_ENA (1 << 0)
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#define AC97C_MR_WRST (1 << 1)
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#define AC97C_MR_VRA (1 << 2)
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#define AC97C_CSR_TXRDY (1 << 0)
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#define AC97C_CSR_TXEMPTY (1 << 1)
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#define AC97C_CSR_UNRUN (1 << 2)
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#define AC97C_CSR_RXRDY (1 << 4)
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#define AC97C_CSR_OVRUN (1 << 5)
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#define AC97C_CSR_ENDTX (1 << 10)
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#define AC97C_CSR_ENDRX (1 << 14)
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#define AC97C_CMR_SIZE_20 (0 << 16)
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#define AC97C_CMR_SIZE_18 (1 << 16)
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#define AC97C_CMR_SIZE_16 (2 << 16)
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#define AC97C_CMR_SIZE_10 (3 << 16)
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#define AC97C_CMR_CEM_LITTLE (1 << 18)
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#define AC97C_CMR_CEM_BIG (0 << 18)
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#define AC97C_CMR_CENA (1 << 21)
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#define AC97C_CMR_DMAEN (1 << 22)
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#define AC97C_SR_CAEVT (1 << 3)
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#define AC97C_SR_COEVT (1 << 2)
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#define AC97C_SR_WKUP (1 << 1)
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#define AC97C_SR_SOF (1 << 0)
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#define AC97C_CH_MASK(slot) \
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(0x7 << (3 * (AC97_SLOT_##slot - 3)))
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#define AC97C_CH_ASSIGN(slot, channel) \
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(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
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#define AC97C_CHANNEL_NONE 0x0
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#define AC97C_CHANNEL_A 0x1
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#endif /* __SOUND_ATMEL_AC97C_H */
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