// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd
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*
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* author:
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* Yandong Lin, yandong.lin@rock-chips.com
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/proc_fs.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/interrupt.h>
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#include <soc/rockchip/rockchip_dvbm.h>
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#include "rockchip_dvbm.h"
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#define RK_DVBM "rk_dvbm"
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unsigned int dvbm_debug;
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module_param(dvbm_debug, uint, 0644);
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MODULE_PARM_DESC(dvbm_debug, "bit switch for dvbm debug information");
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static struct dvbm_ctx *g_ctx;
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#define DVBM_DEBUG 0x00000001
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#define DVBM_DEBUG_IRQ 0x00000002
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#define DVBM_DEBUG_REG 0x00000004
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#define DVBM_DEBUG_DUMP 0x00000008
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#define DVBM_DEBUG_FRM 0x00000010
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#define dvbm_debug(fmt, args...) \
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do { \
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if (unlikely(dvbm_debug & (DVBM_DEBUG))) \
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pr_info(fmt, ##args); \
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} while (0)
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#define dvbm_debug_reg(fmt, args...) \
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do { \
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if (unlikely(dvbm_debug & (DVBM_DEBUG_REG))) \
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pr_info(fmt, ##args); \
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} while (0)
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#define dvbm_debug_irq(fmt, args...) \
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do { \
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if (unlikely(dvbm_debug & (DVBM_DEBUG_IRQ))) \
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pr_info(fmt, ##args); \
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} while (0)
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#define dvbm_debug_dump(fmt, args...) \
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do { \
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if (unlikely(dvbm_debug & (DVBM_DEBUG_DUMP))) \
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pr_info(fmt, ##args); \
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} while (0)
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#define dvbm_debug_frm(fmt, args...) \
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do { \
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if (unlikely(dvbm_debug & (DVBM_DEBUG_FRM))) \
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pr_info(fmt, ##args); \
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} while (0)
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#define dvbm_err(fmt, args...) \
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pr_err(fmt, ##args)
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enum dvbm_flow {
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ISP_CFG = 1,
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ISP_CONNECT = 2,
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VEPU_CFG = 3,
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VEPU_CONNECT = 4,
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};
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/* dvbm status reg bit value define */
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#define BUF_OVERFLOW BIT(0)
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#define RESYNC_FINISH BIT(1)
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#define ISP_CNCT_TIMEOUT BIT(2)
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#define VEPU_CNCT_TIMEOUT BIT(3)
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#define VEPU_HANDSHAKE_TIMEOUT BIT(4)
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#define ISP_CNCT BIT(5)
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#define ISP_DISCNCT BIT(6)
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#define VEPU_CNCT BIT(7)
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#define VEPU_DISCNCT BIT(8)
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/* dvbm reg addr define */
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#define DVBM_VERSION 0x0
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#define DVBM_ISP_CNCT 0x4
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#define DVBM_VEPU_CNCT 0x8
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/* cfg regs */
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#define DVBM_CFG 0xC
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#define DVBM_WDG_CFG0 0x10
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#define DVBM_WDG_CFG1 0x14
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#define DVBM_WDG_CFG2 0x18
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/* interrupt regs */
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#define DVBM_INT_EN 0x1c
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#define DVBM_INT_MSK 0x20
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#define DVBM_INT_CLR 0x24
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#define DVBM_INT_ST 0x28
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/* addr regs */
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#define DVBM_YBUF_BOT 0x2c
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#define DVBM_YBUF_TOP 0x30
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#define DVBM_YBUF_SADR 0x34
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#define DVBM_YBUF_LSTD 0x38
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#define DVBM_YBUF_FSTD 0x3c
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#define DVBM_CBUF_BOT 0x40
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#define DVBM_CBUF_TOP 0x44
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#define DVBM_CBUF_SADR 0x48
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#define DVBM_CBUF_LSTD 0x4c
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#define DVBM_CBUF_FSTD 0x50
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#define DVBM_AFUL_THDY 0x54
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#define DVBM_AFUL_THDC 0x58
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#define DVBM_OVFL_THDY 0x5c
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#define DVBM_OVFL_THDC 0x60
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/* status regs */
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#define DVBM_ST 0x80
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#define DVBM_OVFL_ST 0x84
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#define DVBM_REG_OFFSET 0x2c
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#define SOFT_DVBM 1
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#define UPDATE_LINE_CNT 0
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static void rk_dvbm_set_reg(struct dvbm_ctx *ctx, u32 offset, u32 val)
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{
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if (!SOFT_DVBM) {
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dvbm_debug_reg("write reg[%d] 0x%x = 0x%08x\n", offset >> 2, offset, val);
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writel(val, ctx->reg_base + offset);
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}
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}
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static u32 rk_dvbm_read_reg(struct dvbm_ctx *ctx, u32 offset)
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{
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u32 val = 0;
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if (!SOFT_DVBM) {
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val = readl(ctx->reg_base + offset);
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dvbm_debug_reg("read reg[%d] 0x%x = 0x%08x\n", offset >> 2, offset, val);
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}
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return val;
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}
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static struct dvbm_ctx *port_to_ctx(struct dvbm_port *port)
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{
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struct dvbm_ctx *ctx = NULL;
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if (IS_ERR_OR_NULL(port))
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return g_ctx;
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if (port->dir == DVBM_ISP_PORT)
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ctx = container_of(port, struct dvbm_ctx, port_isp);
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else if (port->dir == DVBM_VEPU_PORT)
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ctx = container_of(port, struct dvbm_ctx, port_vepu);
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return ctx;
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}
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static void dvbm2enc_callback(struct dvbm_ctx *ctx, enum dvbm_cb_event event, void *arg)
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{
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struct dvbm_cb *callback = &ctx->vepu_cb;
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dvbm_callback cb = callback->cb;
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if (!ctx->port_vepu.linked)
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return;
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if (cb)
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cb(callback->ctx, event, arg);
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}
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static void rk_dvbm_dump_regs(struct dvbm_ctx *ctx)
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{
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u32 start = ctx->dump_s;//0x80;
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u32 end = ctx->dump_e;//0xb8;
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u32 i;
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dvbm_debug_dump("=== %s ===\n", __func__);
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for (i = start; i <= end; i += 4)
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dvbm_debug_dump("reg[0x%0x] = 0x%08x\n", i, readl(ctx->reg_base + i));
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dvbm_debug_dump("=== %s ===\n", __func__);
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}
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static int rk_dvbm_clk_on(struct dvbm_ctx *ctx)
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{
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int ret = 0;
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if (ctx->clk)
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ret = clk_prepare_enable(ctx->clk);
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if (ret)
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dev_err(ctx->dev, "clk on failed\n");
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return ret;
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}
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static int rk_dvbm_clk_off(struct dvbm_ctx *ctx)
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{
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if (ctx->clk)
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clk_disable_unprepare(ctx->clk);
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return 0;
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}
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static void init_isp_infos(struct dvbm_ctx *ctx)
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{
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ctx->isp_frm_start = 0;
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ctx->isp_frm_end = 0;
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ctx->isp_frm_time = 0;
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}
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static void rk_dvbm_show_time(struct dvbm_ctx *ctx)
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{
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ktime_t time = ktime_get();
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if (ctx->isp_frm_time)
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dvbm_debug("isp frame start[%d : %d] times %lld us\n",
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ctx->isp_frm_start, ctx->isp_frm_end,
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ktime_us_delta(time, ctx->isp_frm_time));
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ctx->isp_frm_time = time;
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}
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static void rk_dvbm_update_isp_frm_info(struct dvbm_ctx *ctx, u32 line_cnt)
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{
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#if UPDATE_LINE_CNT
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struct dvbm_isp_frm_info *frm_info = &ctx->isp_frm_info;
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frm_info->line_cnt = ALIGN(line_cnt, 32);
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dvbm_debug_frm("dvbm frame %d line %d\n", frm_info->frame_cnt, frm_info->line_cnt);
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dvbm2enc_callback(ctx, DVBM_VEPU_NOTIFY_FRM_INFO, frm_info);
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#endif
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}
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static int rk_dvbm_setup_iobuf(struct dvbm_ctx *ctx)
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{
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u32 *data;
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u32 i;
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struct rk_dvbm_base *addr_base = &ctx->regs.addr_base;
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struct dvbm_isp_cfg_t *cfg = &ctx->isp_cfg;
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addr_base->ybuf_bot = cfg->dma_addr + cfg->ybuf_bot;
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addr_base->ybuf_top = cfg->dma_addr + cfg->ybuf_top;
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addr_base->ybuf_sadr = cfg->dma_addr + cfg->ybuf_bot;
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addr_base->ybuf_fstd = cfg->ybuf_fstd;
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addr_base->ybuf_lstd = cfg->ybuf_lstd;
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addr_base->cbuf_bot = cfg->dma_addr + cfg->cbuf_bot;
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addr_base->cbuf_top = cfg->dma_addr + cfg->cbuf_top;
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addr_base->cbuf_sadr = cfg->dma_addr + cfg->cbuf_bot;
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addr_base->cbuf_fstd = cfg->cbuf_fstd;
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addr_base->cbuf_lstd = cfg->cbuf_lstd;
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addr_base->aful_thdy = cfg->ybuf_lstd;
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addr_base->aful_thdc = cfg->ybuf_lstd;
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addr_base->oful_thdy = cfg->ybuf_lstd;
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addr_base->oful_thdc = cfg->ybuf_lstd;
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ctx->isp_max_lcnt = cfg->ybuf_fstd / cfg->ybuf_lstd;
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ctx->wrap_line = (cfg->ybuf_top - cfg->ybuf_bot) / cfg->ybuf_lstd;
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ctx->isp_frm_info.frame_cnt = 0;
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ctx->isp_frm_info.line_cnt = 0;
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ctx->isp_frm_info.max_line_cnt = ALIGN(ctx->isp_max_lcnt, 32);
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ctx->isp_frm_info.wrap_line = ctx->wrap_line;
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dvbm_debug("dma_addr %pad y_lstd %d y_fstd %d\n",
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&cfg->dma_addr, cfg->ybuf_lstd, cfg->ybuf_fstd);
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dvbm_debug("ybot 0x%x top 0x%x cbuf bot 0x%x top 0x%x\n",
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addr_base->ybuf_bot, addr_base->ybuf_top,
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addr_base->cbuf_bot, addr_base->cbuf_top);
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data = (u32 *)addr_base;
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for (i = 0; i < sizeof(struct rk_dvbm_base) / sizeof(u32); i++)
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rk_dvbm_set_reg(ctx, i * sizeof(u32) + DVBM_REG_OFFSET, data[i]);
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for (i = 1; i < 65536; i++)
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if (!((addr_base->ybuf_fstd * i) % (cfg->ybuf_top - cfg->ybuf_bot)))
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break;
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ctx->loopcnt = i;
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return 0;
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}
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static void rk_dvbm_reg_init(struct dvbm_ctx *ctx)
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{
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struct rk_dvbm_regs *reg = &ctx->regs;
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u32 *val = (u32 *)reg;
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reg->int_en.buf_ovfl = 1;
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reg->int_en.isp_cnct = 1;
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reg->int_en.vepu_cnct = 1;
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reg->int_en.vepu_discnct = 1;
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reg->int_en.isp_discnct = 1;
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reg->int_en.resync_finish = 1;
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reg->int_en.isp_cnct_timeout = 1;
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reg->int_en.vepu_cnct_timeout = 1;
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reg->int_en.vepu_handshake_timeout = 1;
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reg->dvbm_cfg.fmt = 0;
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reg->dvbm_cfg.auto_resyn = 0;
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reg->dvbm_cfg.ignore_vepu_cnct_ack = 0;
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reg->dvbm_cfg.start_point_after_vepu_cnct = 0;
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reg->wdg_cfg0.wdg_isp_cnct_timeout = 0xfffff;
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reg->wdg_cfg1.wdg_vepu_cnct_timeout = 0xfffff;
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reg->wdg_cfg2.wdg_vepu_handshake_timeout = 0xfffff;
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rk_dvbm_set_reg(ctx, DVBM_WDG_CFG0, val[DVBM_WDG_CFG0 >> 2]);
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rk_dvbm_set_reg(ctx, DVBM_WDG_CFG1, val[DVBM_WDG_CFG1 >> 2]);
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rk_dvbm_set_reg(ctx, DVBM_WDG_CFG2, val[DVBM_WDG_CFG2 >> 2]);
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rk_dvbm_set_reg(ctx, DVBM_CFG, val[DVBM_CFG >> 2]);
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rk_dvbm_set_reg(ctx, DVBM_INT_EN, val[DVBM_INT_EN >> 2]);
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}
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struct dvbm_port *rk_dvbm_get_port(struct platform_device *pdev,
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enum dvbm_port_dir dir)
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{
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struct dvbm_ctx *ctx = NULL;
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struct dvbm_port *port = NULL;
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if (WARN_ON(!pdev))
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return NULL;
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ctx = (struct dvbm_ctx *)platform_get_drvdata(pdev);
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WARN_ON(!ctx);
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dvbm_debug("%s dir %d\n", __func__, dir);
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if (dir == DVBM_ISP_PORT)
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port = &ctx->port_isp;
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else if (dir == DVBM_VEPU_PORT)
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port = &ctx->port_vepu;
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return port;
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}
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EXPORT_SYMBOL(rk_dvbm_get_port);
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int rk_dvbm_put(struct dvbm_port *port)
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{
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struct dvbm_ctx *ctx = NULL;
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if (WARN_ON(!port))
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return -EINVAL;
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ctx = port_to_ctx(port);
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if (!ctx)
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return -EINVAL;
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return 0;
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}
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EXPORT_SYMBOL(rk_dvbm_put);
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int rk_dvbm_link(struct dvbm_port *port)
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{
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struct dvbm_ctx *ctx;
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enum dvbm_port_dir dir;
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struct rk_dvbm_regs *reg;
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int ret = 0;
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if (WARN_ON(!port))
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return -EINVAL;
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ctx = port_to_ctx(port);
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dir = port->dir;
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reg = &ctx->regs;
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if (dir == DVBM_ISP_PORT) {
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if (port->linked) {
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rk_dvbm_unlink(port);
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udelay(5);
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}
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reg->isp_cnct.isp_cnct = 1;
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rk_dvbm_set_reg(ctx, DVBM_ISP_CNCT, 0x1);
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} else if (dir == DVBM_VEPU_PORT) {
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if (!port->linked) {
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reg->vepu_cnct.vepu_cnct = 1;
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rk_dvbm_set_reg(ctx, DVBM_VEPU_CNCT, 0x1);
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}
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port->linked = 1;
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dvbm_debug_dump("=== vepu link ===\n");
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rk_dvbm_dump_regs(ctx);
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dvbm_debug_dump("=== vepu link ===\n");
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}
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dvbm_debug("%s connect frm_cnt[%d : %d]\n",
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dir == DVBM_ISP_PORT ? "isp" : "vepu",
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ctx->isp_frm_start, ctx->isp_frm_end);
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return ret;
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}
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EXPORT_SYMBOL(rk_dvbm_link);
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int rk_dvbm_unlink(struct dvbm_port *port)
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{
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struct dvbm_ctx *ctx;
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enum dvbm_port_dir dir;
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struct rk_dvbm_regs *reg;
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if (WARN_ON(!port))
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return -EINVAL;
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ctx = port_to_ctx(port);
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dir = port->dir;
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reg = &ctx->regs;
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if (dir == DVBM_ISP_PORT) {
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reg->isp_cnct.isp_cnct = 0;
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rk_dvbm_set_reg(ctx, DVBM_ISP_CNCT, 0);
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} else if (dir == DVBM_VEPU_PORT) {
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reg->vepu_cnct.vepu_cnct = 0;
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port->linked = 0;
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rk_dvbm_set_reg(ctx, DVBM_VEPU_CNCT, 0);
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if (!ctx->regs.dvbm_cfg.auto_resyn) {
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u32 connect = 0;
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dvbm2enc_callback(ctx, DVBM_VEPU_REQ_CONNECT, &connect);
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}
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}
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dvbm_debug("%s disconnect\n", dir == DVBM_ISP_PORT ? "isp" : "vepu");
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return 0;
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}
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EXPORT_SYMBOL(rk_dvbm_unlink);
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int rk_dvbm_set_cb(struct dvbm_port *port, struct dvbm_cb *cb)
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{
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struct dvbm_ctx *ctx;
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enum dvbm_port_dir dir;
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if (WARN_ON(!port) || WARN_ON(!cb))
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return -EINVAL;
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ctx = port_to_ctx(port);
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dir = port->dir;
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if (dir == DVBM_ISP_PORT) {
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} else if (dir == DVBM_VEPU_PORT) {
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ctx->vepu_cb.cb = cb->cb;
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ctx->vepu_cb.ctx = cb->ctx;
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}
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return 0;
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}
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EXPORT_SYMBOL(rk_dvbm_set_cb);
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static void rk_dvbm_update_next_adr(struct dvbm_ctx *ctx)
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{
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u32 frame_cnt = ctx->isp_frm_start;
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struct dvbm_isp_cfg_t *isp_cfg = &ctx->isp_cfg;
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struct dvbm_addr_cfg *vepu_cfg = &ctx->vepu_cfg;
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u32 y_wrap_size = isp_cfg->ybuf_top - isp_cfg->ybuf_bot;
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u32 c_wrap_size = isp_cfg->cbuf_top - isp_cfg->cbuf_bot;
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u32 s_off;
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frame_cnt = (frame_cnt + 1) % (ctx->loopcnt);
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s_off = (frame_cnt * isp_cfg->ybuf_fstd) % y_wrap_size;
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vepu_cfg->ybuf_sadr = isp_cfg->dma_addr + isp_cfg->ybuf_bot + s_off;
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s_off = (frame_cnt * isp_cfg->cbuf_fstd) % c_wrap_size;
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vepu_cfg->cbuf_sadr = isp_cfg->dma_addr + isp_cfg->cbuf_bot + s_off;
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}
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int rk_dvbm_ctrl(struct dvbm_port *port, enum dvbm_cmd cmd, void *arg)
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{
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struct dvbm_ctx *ctx;
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struct rk_dvbm_regs *reg;
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if ((cmd < DVBM_ISP_CMD_BASE) || (cmd > DVBM_VEPU_CMD_BUTT)) {
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dvbm_err("%s input cmd invalid\n", __func__);
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return -EINVAL;
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}
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ctx = port_to_ctx(port);
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reg = &ctx->regs;
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switch (cmd) {
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case DVBM_ISP_SET_CFG: {
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struct dvbm_isp_cfg_t *cfg = (struct dvbm_isp_cfg_t *)arg;
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memcpy(&ctx->isp_cfg, cfg, sizeof(struct dvbm_isp_cfg_t));
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rk_dvbm_setup_iobuf(ctx);
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init_isp_infos(ctx);
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rk_dvbm_update_next_adr(ctx);
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} break;
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case DVBM_ISP_FRM_START: {
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rk_dvbm_update_isp_frm_info(ctx, 0);
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rk_dvbm_show_time(ctx);
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} break;
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case DVBM_ISP_FRM_END: {
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u32 line_cnt = ctx->isp_max_lcnt;
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ctx->isp_frm_end = *(u32 *)arg;
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/* wrap frame_cnt 0 - 255 */
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ctx->isp_frm_info.frame_cnt = (ctx->isp_frm_start + 1) % 256;
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rk_dvbm_update_next_adr(ctx);
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rk_dvbm_update_isp_frm_info(ctx, line_cnt);
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ctx->isp_frm_start++;
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dvbm_debug("isp frame end[%d : %d]\n", ctx->isp_frm_start, ctx->isp_frm_end);
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} break;
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case DVBM_ISP_FRM_QUARTER: {
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u32 line_cnt;
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line_cnt = ctx->isp_max_lcnt >> 2;
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rk_dvbm_update_isp_frm_info(ctx, line_cnt);
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} break;
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case DVBM_ISP_FRM_HALF: {
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u32 line_cnt;
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line_cnt = ctx->isp_max_lcnt >> 1;
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rk_dvbm_update_isp_frm_info(ctx, line_cnt);
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} break;
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case DVBM_ISP_FRM_THREE_QUARTERS: {
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u32 line_cnt;
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line_cnt = (ctx->isp_max_lcnt >> 2) * 3;
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rk_dvbm_update_isp_frm_info(ctx, line_cnt);
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} break;
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case DVBM_VEPU_GET_ADR: {
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struct dvbm_addr_cfg *dvbm_adr = (struct dvbm_addr_cfg *)arg;
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struct rk_dvbm_base *addr_base = ®->addr_base;
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dvbm_adr->ybuf_top = addr_base->ybuf_top;
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dvbm_adr->ybuf_bot = addr_base->ybuf_bot;
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dvbm_adr->cbuf_top = addr_base->cbuf_top;
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dvbm_adr->cbuf_bot = addr_base->cbuf_bot;
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dvbm_adr->cbuf_sadr = ctx->vepu_cfg.cbuf_sadr;
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dvbm_adr->ybuf_sadr = ctx->vepu_cfg.ybuf_sadr;
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dvbm_adr->overflow = ctx->isp_frm_info.line_cnt >= ctx->wrap_line;
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dvbm_adr->frame_id = ctx->isp_frm_info.frame_cnt;
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dvbm_adr->line_cnt = ctx->isp_frm_info.line_cnt;
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} break;
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case DVBM_VEPU_GET_FRAME_INFO: {
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memcpy(arg, &ctx->isp_frm_info, sizeof(struct dvbm_isp_frm_info));
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} break;
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case DVBM_VEPU_SET_RESYNC: {
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reg->dvbm_cfg.auto_resyn = *(u32 *)arg;
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dev_info(ctx->dev, "change resync %s\n",
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reg->dvbm_cfg.auto_resyn ? "auto" : "soft");
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rk_dvbm_set_reg(ctx, DVBM_CFG, ((u32 *)®->dvbm_cfg)[0]);
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} break;
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case DVBM_VEPU_SET_CFG: {
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struct dvbm_vepu_cfg *cfg = (struct dvbm_vepu_cfg *)arg;
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reg->dvbm_cfg.auto_resyn = cfg->auto_resyn;
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reg->dvbm_cfg.ignore_vepu_cnct_ack = cfg->ignore_vepu_cnct_ack;
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reg->dvbm_cfg.start_point_after_vepu_cnct = cfg->start_point_after_vepu_cnct;
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rk_dvbm_set_reg(ctx, DVBM_CFG, ((u32 *)®->dvbm_cfg)[0]);
|
} break;
|
case DVBM_VEPU_DUMP_REGS: {
|
rk_dvbm_dump_regs(ctx);
|
} break;
|
default: {
|
} break;
|
}
|
|
return 0;
|
}
|
EXPORT_SYMBOL(rk_dvbm_ctrl);
|
|
static void dvbm_check_irq(struct dvbm_ctx *ctx)
|
{
|
u32 irq_st = ctx->irq_status;
|
u32 cur_st = ctx->dvbm_status;
|
|
if (irq_st & ISP_CNCT) {
|
dvbm_debug_irq("%s isp connect success! st 0x%08x\n",
|
__func__, cur_st);
|
ctx->port_isp.linked = 1;
|
}
|
if (irq_st & ISP_DISCNCT) {
|
dvbm_debug_irq("%s isp disconnect success!\n", __func__);
|
ctx->port_isp.linked = 0;
|
}
|
if (irq_st & VEPU_CNCT) {
|
dvbm_debug_irq("%s vepu connect success! st 0x%08x\n",
|
__func__, cur_st);
|
ctx->port_vepu.linked = 1;
|
}
|
if (irq_st & VEPU_DISCNCT) {
|
dvbm_debug_irq("%s vepu disconnect success! st 0x%08x\n", __func__, cur_st);
|
ctx->port_vepu.linked = 0;
|
}
|
if (irq_st & BUF_OVERFLOW) {
|
dvbm_debug_irq("%s buf overflow st 0x%08x auto_resync %d ignore %d\n",
|
__func__, cur_st, ctx->regs.dvbm_cfg.auto_resyn, ctx->ignore_ovfl);
|
|
if (!ctx->regs.dvbm_cfg.auto_resyn && !ctx->ignore_ovfl)
|
rk_dvbm_unlink(&ctx->port_vepu);
|
}
|
if (irq_st & (ISP_CNCT_TIMEOUT | VEPU_CNCT_TIMEOUT))
|
rk_dvbm_dump_regs(ctx);
|
}
|
|
static irqreturn_t rk_dvbm_irq(int irq, void *param)
|
{
|
struct dvbm_ctx *ctx = param;
|
u32 irq_st = 0;
|
u32 cur_st = 0;
|
|
if (ctx->reg_base) {
|
/* read irq st */
|
irq_st = rk_dvbm_read_reg(ctx, DVBM_INT_ST);
|
cur_st = rk_dvbm_read_reg(ctx, DVBM_ST);
|
if (irq_st & BUF_OVERFLOW) {
|
dvbm_debug_dump("=== dvbm overflow! dump reg st: 0x%08x===\n", irq_st);
|
rk_dvbm_dump_regs(ctx);
|
dvbm2enc_callback(ctx, DVBM_VEPU_NOTIFY_DUMP, NULL);
|
dvbm_debug_dump("=== dvbm overflow! dump reg end===\n");
|
}
|
/* clr irq */
|
rk_dvbm_set_reg(ctx, DVBM_INT_CLR, irq_st);
|
rk_dvbm_set_reg(ctx, DVBM_INT_ST, 0);
|
}
|
ctx->irq_status = irq_st;
|
ctx->dvbm_status = cur_st;
|
|
dvbm_debug_irq("%s irq status 0x%08x\n", __func__, irq_st);
|
|
return IRQ_WAKE_THREAD;
|
}
|
|
static irqreturn_t rk_dvbm_isr(int irq, void *param)
|
{
|
struct dvbm_ctx *ctx = param;
|
|
dvbm_check_irq(ctx);
|
|
return IRQ_HANDLED;
|
}
|
|
static int rk_dvbm_probe(struct platform_device *pdev)
|
{
|
int ret;
|
struct dvbm_ctx *ctx = NULL;
|
struct device *dev = &pdev->dev;
|
struct resource *res = NULL;
|
|
dev_info(dev, "probe start\n");
|
ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
|
if (!ctx)
|
return -ENOMEM;
|
dev_info(dev, "dvbm ctx %p\n", ctx);
|
|
ctx->dev = dev;
|
|
atomic_set(&ctx->isp_ref, 0);
|
atomic_set(&ctx->vepu_ref, 0);
|
ctx->port_isp.dir = DVBM_ISP_PORT;
|
ctx->port_vepu.dir = DVBM_VEPU_PORT;
|
|
platform_set_drvdata(pdev, ctx);
|
|
pm_runtime_enable(dev);
|
|
/* get irq */
|
ctx->irq = platform_get_irq(pdev, 0);
|
if (ctx->irq < 0) {
|
dev_err(&pdev->dev, "no interrupt resource found\n");
|
ret = -ENODEV;
|
goto failed;
|
}
|
/* get mem resource */
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
if (!res) {
|
dev_err(&pdev->dev, "no memory resource defined\n");
|
ret = -ENODEV;
|
goto failed;
|
}
|
|
ctx->reg_base = devm_ioremap_resource(dev, res);
|
if (IS_ERR_OR_NULL(ctx->reg_base)) {
|
dev_err(dev, "ioremap failed for resource %pR\n", res);
|
ret = -ENODEV;
|
goto failed;
|
}
|
|
ctx->clk = devm_clk_get(ctx->dev, "clk_core");
|
if (IS_ERR_OR_NULL(ctx->clk)) {
|
dev_err(dev, "clk_get failed for resource %pR\n", res);
|
ret = -ENODEV;
|
goto failed;
|
}
|
ctx->rst = devm_reset_control_get(ctx->dev, "dvbm_rst");
|
if (IS_ERR_OR_NULL(ctx->rst)) {
|
dev_err(dev, "clk_rst failed for resource %pR\n", res);
|
ret = -ENODEV;
|
goto failed;
|
}
|
if (!SOFT_DVBM) {
|
ret = pm_runtime_get_sync(dev);
|
if (ret)
|
dev_err(dev, "pm get failed!\n");
|
ret = rk_dvbm_clk_on(ctx);
|
if (ret)
|
goto failed;
|
}
|
g_ctx = ctx;
|
rk_dvbm_reg_init(ctx);
|
ctx->ignore_ovfl = 1;
|
ctx->dump_s = 0x80;
|
ctx->dump_e = 0xb8;
|
ret = devm_request_threaded_irq(dev, ctx->irq,
|
rk_dvbm_irq, rk_dvbm_isr,
|
IRQF_ONESHOT, dev_name(dev), ctx);
|
if (ret) {
|
dev_err(dev, "register interrupter failed\n");
|
goto failed;
|
}
|
dev_info(dev, "probe success\n");
|
|
return 0;
|
|
failed:
|
pm_runtime_disable(dev);
|
|
return ret;
|
}
|
|
static int rk_dvbm_remove(struct platform_device *pdev)
|
{
|
struct device *dev = &pdev->dev;
|
|
dev_info(dev, "remove device\n");
|
if (!SOFT_DVBM) {
|
rk_dvbm_clk_off(g_ctx);
|
pm_runtime_put(dev);
|
}
|
pm_runtime_disable(dev);
|
|
return 0;
|
}
|
|
static const struct of_device_id rk_dvbm_dt_ids[] = {
|
{
|
.compatible = "rockchip,rk-dvbm",
|
},
|
{ },
|
};
|
|
static struct platform_driver rk_dvbm_driver = {
|
.probe = rk_dvbm_probe,
|
.remove = rk_dvbm_remove,
|
.driver = {
|
.name = "rk_dvbm",
|
.of_match_table = of_match_ptr(rk_dvbm_dt_ids),
|
},
|
};
|
|
static int __init rk_dvbm_init(void)
|
{
|
return platform_driver_register(&rk_dvbm_driver);
|
}
|
|
static __exit void rk_dvbm_exit(void)
|
{
|
platform_driver_unregister(&rk_dvbm_driver);
|
}
|
|
subsys_initcall(rk_dvbm_init);
|
module_exit(rk_dvbm_exit);
|
|
MODULE_LICENSE("Dual MIT/GPL");
|
MODULE_AUTHOR("Yandong Lin yandong.lin@rock-chips.com");
|
MODULE_DESCRIPTION("Rockchip dvbm driver");
|
