/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright 2013-2016 Freescale Semiconductor Inc.
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* Copyright 2016 NXP
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*
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*/
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#ifndef _FSL_DPIO_CMD_H
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#define _FSL_DPIO_CMD_H
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/* DPIO Version */
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#define DPIO_VER_MAJOR 4
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#define DPIO_VER_MINOR 2
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/* Command Versioning */
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#define DPIO_CMD_ID_OFFSET 4
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#define DPIO_CMD_BASE_VERSION 1
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#define DPIO_CMD(id) (((id) << DPIO_CMD_ID_OFFSET) | DPIO_CMD_BASE_VERSION)
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/* Command IDs */
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#define DPIO_CMDID_CLOSE DPIO_CMD(0x800)
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#define DPIO_CMDID_OPEN DPIO_CMD(0x803)
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#define DPIO_CMDID_GET_API_VERSION DPIO_CMD(0xa03)
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#define DPIO_CMDID_ENABLE DPIO_CMD(0x002)
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#define DPIO_CMDID_DISABLE DPIO_CMD(0x003)
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#define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004)
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#define DPIO_CMDID_RESET DPIO_CMD(0x005)
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#define DPIO_CMDID_SET_STASHING_DEST DPIO_CMD(0x120)
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struct dpio_cmd_open {
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__le32 dpio_id;
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};
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#define DPIO_CHANNEL_MODE_MASK 0x3
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struct dpio_rsp_get_attr {
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/* cmd word 0 */
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__le32 id;
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__le16 qbman_portal_id;
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u8 num_priorities;
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u8 channel_mode;
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/* cmd word 1 */
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__le64 qbman_portal_ce_addr;
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/* cmd word 2 */
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__le64 qbman_portal_ci_addr;
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/* cmd word 3 */
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__le32 qbman_version;
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};
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struct dpio_stashing_dest {
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u8 sdest;
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};
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#endif /* _FSL_DPIO_CMD_H */
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