// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Xilinx, Inc.
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*/
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/firmware/xlnx-zynqmp.h>
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#define SILICON_REVISION_MASK 0xF
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struct zynqmp_nvmem_data {
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struct device *dev;
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struct nvmem_device *nvmem;
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};
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static int zynqmp_nvmem_read(void *context, unsigned int offset,
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void *val, size_t bytes)
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{
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int ret;
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int idcode, version;
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struct zynqmp_nvmem_data *priv = context;
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ret = zynqmp_pm_get_chipid(&idcode, &version);
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if (ret < 0)
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return ret;
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dev_dbg(priv->dev, "Read chipid val %x %x\n", idcode, version);
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*(int *)val = version & SILICON_REVISION_MASK;
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return 0;
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}
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static struct nvmem_config econfig = {
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.name = "zynqmp-nvmem",
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.owner = THIS_MODULE,
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.word_size = 1,
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.size = 1,
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.read_only = true,
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};
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static const struct of_device_id zynqmp_nvmem_match[] = {
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{ .compatible = "xlnx,zynqmp-nvmem-fw", },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, zynqmp_nvmem_match);
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static int zynqmp_nvmem_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct zynqmp_nvmem_data *priv;
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priv = devm_kzalloc(dev, sizeof(struct zynqmp_nvmem_data), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = dev;
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econfig.dev = dev;
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econfig.reg_read = zynqmp_nvmem_read;
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econfig.priv = priv;
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priv->nvmem = devm_nvmem_register(dev, &econfig);
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return PTR_ERR_OR_ZERO(priv->nvmem);
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}
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static struct platform_driver zynqmp_nvmem_driver = {
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.probe = zynqmp_nvmem_probe,
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.driver = {
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.name = "zynqmp-nvmem",
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.of_match_table = zynqmp_nvmem_match,
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},
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};
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module_platform_driver(zynqmp_nvmem_driver);
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MODULE_AUTHOR("Michal Simek <michal.simek@xilinx.com>, Nava kishore Manne <navam@xilinx.com>");
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MODULE_DESCRIPTION("ZynqMP NVMEM driver");
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MODULE_LICENSE("GPL");
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