/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _PHL_EXT_TX_PWR_LMT_C_
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#include "phl_headers.h"
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/**
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* The function to update current TX power limit value to HW register
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* @phl: see struct phl_info_t
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*
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*/
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enum rtw_phl_status
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rtw_phl_set_power_limit(void *phl)
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{
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struct phl_info_t *phl_info = (struct phl_info_t *)phl;
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enum rtw_phl_status phl_status = RTW_PHL_STATUS_FAILURE;
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u8 hw_band = 0;
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for (hw_band = 0; hw_band < HW_BAND_MAX; hw_band++) {
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if (rtw_hal_set_power_limit(phl_info->hal, hw_band) == RTW_HAL_STATUS_SUCCESS)
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phl_status = RTW_PHL_STATUS_SUCCESS;
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}
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return phl_status;
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}
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/**
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* The function to get TX power limit value with specific parameters
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* @phl: see struct phl_info_t
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* @hw_band: 0x0: band0, 0x1: band1
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* @rate: data rate
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* @bandwidth: banddwidth
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* @beamforming: 0: TX w/o BF, 1: TX w/ BF
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* @tx_num: tx number, 0: 1TX, 1: 2TX
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* @channel: center channel
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*
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*/
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s8 rtw_phl_get_power_limit(void *phl, u8 hw_band,
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u16 rate, u8 bandwidth, u8 beamforming, u8 tx_num, u8 channel)
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{
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struct phl_info_t *phl_info = (struct phl_info_t *)phl;
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return rtw_hal_get_power_limit(phl_info->hal, hw_band, rate,
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bandwidth, beamforming, tx_num, channel);
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}
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/**
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* The function to update user defined extended tx power limit to halrf
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* @phl: see struct phl_info_t
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* @hw_band: 0x0: band0, 0x1: band1
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* @ext_pwr_lmt_info: table of extended tx power limit value
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*
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* Note,
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* This function will enable extended tx power limit mechanism.
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* After enabled this mechanism, halrf will use
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* min(original tx power limit, extended tx power limit) to be
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* final tx power limit value.
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*
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*/
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void
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rtw_phl_enable_ext_pwr_lmt(void *phl, u8 hw_band,
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struct rtw_phl_ext_pwr_lmt_info *ext_pwr_lmt_info)
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{
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struct phl_info_t *phl_info = (struct phl_info_t *)phl;
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rtw_hal_enable_ext_pwr_lmt(phl_info->hal, hw_band, ext_pwr_lmt_info);
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}
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void
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rtw_phl_set_ext_pwr_lmt_en(void *phl, bool enable)
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{
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struct phl_info_t *phl_info = (struct phl_info_t *)phl;
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u8 hw_band = 0;
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for (hw_band = 0; hw_band < HW_BAND_MAX; hw_band++) {
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rtw_hal_set_ext_pwr_lmt_en(phl_info->hal, hw_band, enable);
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}
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}
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static void
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_phl_cmd_updt_epl_done(
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void *drv_priv, u8 *cmd, u32 cmd_len,
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enum rtw_phl_status status)
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{
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if (cmd) {
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_os_kmem_free(drv_priv, cmd, cmd_len);
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cmd = NULL;
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PHL_INFO("%s...\n", __func__);
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}
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}
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static enum rtw_phl_status
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_phl_updt_ext_txpwr_lmt(
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void *phl, struct rtw_phl_cmd_epl_para *param)
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{
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struct phl_info_t *phl_info = (struct phl_info_t *)phl;
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u8 hw_band = 0;
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bool cur_state = rtw_hal_get_ext_pwr_lmt_en(phl_info->hal, hw_band);
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bool tgt_state = (param->en ? true : false);
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if (param->upt_info) {
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for (hw_band = 0; hw_band < HW_BAND_MAX; hw_band++) {
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rtw_phl_enable_ext_pwr_lmt(phl, hw_band, ¶m->info);
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}
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}
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/* Only update state and reload when state changed OR table updated */
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if (tgt_state != cur_state || param->upt_info) {
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rtw_phl_set_ext_pwr_lmt_en(phl, tgt_state);
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if (param->pwrlmt_rld)
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rtw_phl_set_power_limit(phl);
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}
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return RTW_PHL_STATUS_SUCCESS;
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}
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enum rtw_phl_status
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phl_cmd_updt_ext_txpwr_lmt(
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void *phl, u8 *param)
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{
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struct rtw_phl_cmd_epl_para *cmd_para = (struct rtw_phl_cmd_epl_para *)param;
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return _phl_updt_ext_txpwr_lmt(phl, cmd_para);
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}
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enum rtw_phl_status
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rtw_phl_cmd_updt_ext_txpwr_lmt(void *phl,
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struct rtw_phl_cmd_epl_para *param,
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enum phl_cmd_type cmd_type,
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u32 cmd_timeout)
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{
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struct phl_info_t *phl_info = (struct phl_info_t *)phl;
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enum rtw_phl_status sts = RTW_PHL_STATUS_FAILURE;
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struct rtw_phl_cmd_epl_para *cmd_param = NULL;
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u32 cmd_param_len = 0;
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#ifdef CONFIG_CMD_DISP
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if (cmd_type == PHL_CMD_DIRECTLY)
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return _phl_updt_ext_txpwr_lmt(phl, param);
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cmd_param_len = sizeof(struct rtw_phl_cmd_epl_para);
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cmd_param = _os_kmem_alloc(phl_to_drvpriv(phl_info), cmd_param_len);
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if (cmd_param == NULL) {
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PHL_ERR("%s: alloc cmd_param failed!\n", __func__);
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goto end;
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} else {
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_os_mem_cpy(phl_to_drvpriv(phl_info), cmd_param,
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param, cmd_param_len);
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}
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sts = phl_cmd_enqueue(phl,
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HW_BAND_0,
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MSG_EVT_UPDT_EXT_TXPWR_LMT,
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(u8 *)cmd_param, 0,
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_phl_cmd_updt_epl_done,
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cmd_type, cmd_timeout);
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if (is_cmd_failure(sts)) {
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/* Send cmd success, but wait cmd fail*/
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sts = RTW_PHL_STATUS_FAILURE;
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} else if (sts != RTW_PHL_STATUS_SUCCESS) {
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/* Send cmd fail */
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_os_kmem_free(phl_to_drvpriv(phl_info), cmd_param, cmd_param_len);
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sts = RTW_PHL_STATUS_FAILURE;
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}
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end:
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return sts;
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#else
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PHL_ERR("%s : CONFIG_CMD_DISP need to be enabled for MSG_EVT_UPDT_EXT_TXPWR_LMT !! \n", __func__);
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return sts;
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#endif
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}
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