/******************************************************************************
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*
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* Copyright(c) 2007 - 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __HALBB_MP_EX_H__
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#define __HALBB_MP_EX_H__
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/*@--------------------------[Define] ---------------------------------------*/
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#define MAX_USER_NUM 4
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/*@--------------------------[Enum]------------------------------------------*/
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/*@--------------------------[Structure]-------------------------------------*/
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struct bb_rpt_cr_info {
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u32 cnt_ccktxon;
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u32 cnt_ccktxon_m;
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u32 cnt_ofdmtxon;
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u32 cnt_ofdmtxon_m;
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u32 cnt_cck_crc32ok_p0;
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u32 cnt_cck_crc32ok_p0_m;
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u32 cnt_cck_crc32ok_p1;
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u32 cnt_cck_crc32ok_p1_m;
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u32 cnt_l_crc_ok;
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u32 cnt_l_crc_ok_m;
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u32 cnt_ht_crc_ok;
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u32 cnt_ht_crc_ok_m;
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u32 cnt_vht_crc_ok;
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u32 cnt_vht_crc_ok_m;
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u32 cnt_he_crc_ok;
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u32 cnt_he_crc_ok_m;
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u32 cnt_eht_crc_ok;
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u32 cnt_eht_crc_ok_m;
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u32 cnt_cck_crc32fail_p0;
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u32 cnt_cck_crc32fail_p0_m;
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u32 cnt_cck_crc32fail_p1;
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u32 cnt_cck_crc32fail_p1_m;
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u32 cnt_l_crc_err;
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u32 cnt_l_crc_err_m;
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u32 cnt_ht_crc_err;
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u32 cnt_ht_crc_err_m;
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u32 cnt_vht_crc_err;
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u32 cnt_vht_crc_err_m;
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u32 cnt_he_crc_err;
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u32 cnt_he_crc_err_m;
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u32 cnt_eht_crc_err;
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u32 cnt_eht_crc_err_m;
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u32 rst_all_cnt;
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u32 rst_all_cnt_m;
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u32 phy_sts_bitmap_he_mu;
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u32 phy_sts_bitmap_he_mu_m;
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u32 phy_sts_bitmap_vht_mu;
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u32 phy_sts_bitmap_vht_mu_m;
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u32 phy_sts_bitmap_cck;
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u32 phy_sts_bitmap_cck_m;
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u32 phy_sts_bitmap_legacy;
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u32 phy_sts_bitmap_legacy_m;
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u32 phy_sts_bitmap_ht;
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u32 phy_sts_bitmap_ht_m;
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u32 phy_sts_bitmap_vht;
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u32 phy_sts_bitmap_vht_m;
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u32 phy_sts_bitmap_he;
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u32 phy_sts_bitmap_he_m;
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u32 rpt_tone_evm_idx;
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u32 rpt_tone_evm_idx_m;
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u32 dbg_port_ref_clk_en;
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u32 dbg_port_ref_clk_en_m;
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u32 dbg_port_en;
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u32 dbg_port_en_m;
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u32 dbg_port_ip_sel;
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u32 dbg_port_ip_sel_m;
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u32 dbg_port_sel;
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u32 dbg_port_sel_m;
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u32 dbg32_d;
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u32 dbg32_d_m;
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u32 phy_sts_bitmap_trigbase;
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u32 phy_sts_bitmap_trigbase_m;
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u32 sts_keeper_en;
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u32 sts_keeper_en_m;
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u32 sts_keeper_trig_cond;
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u32 sts_keeper_trig_cond_m;
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u32 sts_dbg_sel;
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u32 sts_dbg_sel_m;
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u32 sts_keeper_read;
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u32 sts_keeper_read_m;
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u32 sts_keeper_addr;
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u32 sts_keeper_addr_m;
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u32 sts_keeper_data;
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u32 sts_keeper_data_m;
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u32 pw_dbm_rx0;
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u32 pw_dbm_rx0_m;
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u32 path0_rssi_at_agc_rdy;
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u32 path0_rssi_at_agc_rdy_m;
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u32 path1_rssi_at_agc_rdy;
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u32 path1_rssi_at_agc_rdy_m;
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u32 sts_user_sel;
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u32 sts_user_sel_m;
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u32 path1_g_lna6;
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u32 path1_g_lna6_m;
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};
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struct bb_rpt_info {
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struct bb_rpt_cr_info bb_rpt_cr_i;
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};
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struct rxevm_usr {
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u8 rxevm_ss_0;
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u8 rxevm_ss_1;
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u8 rxevm_ss_2;
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u8 rxevm_ss_3;
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};
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struct rxevm_info {
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struct rxevm_usr rxevm_user[MAX_USER_NUM];
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};
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struct rxevm_physts {
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// Seg0/1
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struct rxevm_info rxevm_seg[2];
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};
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struct rssi_i {
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s32 rssi[4];
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};
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struct rssi_physts {
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// Seg0/1
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struct rssi_i rssi_seg[2];
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};
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struct mp_physts_rslt_0 {
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u8 rx_path_en_cck;
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u8 cfo_avg_cck;
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u8 evm_avg_cck;
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u8 avg_idle_noise_pwr_cck;
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u8 pop_idx_cck;
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};
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struct mp_physts_rslt_1 {
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u8 rx_path_en;
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s16 cfo_avg; /*S(12,2), -512~+511.75 kHz*/
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u8 evm_max;
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u8 evm_min;
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u8 snr_avg;
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u8 cn_avg;
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u8 avg_idle_noise_pwr;
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u8 pop_idx;
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u8 rxsc;
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u8 ch_idx;
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enum channel_width bw_idx;
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bool is_su; /*if (not MU && not OFDMA), is_su = 1*/
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bool is_ldpc;
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bool is_ndp;
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bool is_stbc;
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bool grant_bt;
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bool is_awgn;
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bool is_bf;
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};
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struct mp_physts_rslt_basic {
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struct mp_physts_rslt_0 mp_physts_rslt_basic_0_i;
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struct mp_physts_rslt_1 mp_physts_rslt_basic_1_i;
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};
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struct bb_mp_psts {
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u32 ie_bitmap;
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struct mp_physts_rslt_basic mp_physts_rslt_basic_i;
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struct mp_physts_rslt_0 mp_physts_rslt_0_i;
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struct mp_physts_rslt_1 mp_physts_rslt_1_i;
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};
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struct halbb_mp {
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/*Tx ok count, statistics used in Mass Production Test.*/
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u64 tx_phy_ok_cnt;
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/*Rx CRC32 ok/error count, statistics used in Mass Production Test.*/
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u64 rx_phy_crc_ok_cnt;
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u64 rx_phy_crc_err_cnt;
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/*The Value of IO operation is depend of MptActType.*/
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u32 io_ok_value;
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u32 io_err_value;
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};
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/*@--------------------------[Prptotype]-------------------------------------*/
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void halbb_mp_bt_cfg(struct bb_info *bb, bool bt_connect);
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u16 halbb_mp_get_tx_ok(struct bb_info *bb, u32 rate_index,
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enum phl_phy_idx phy_idx);
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u32 halbb_mp_get_rx_crc_ok(struct bb_info *bb, enum phl_phy_idx phy_idx);
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u32 halbb_mp_get_rx_crc_err(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_mp_cnt_reset(struct bb_info *bb);
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void halbb_mp_reset_cnt(struct bb_info *bb);
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u8 halbb_mp_get_rxevm(struct bb_info *bb, u8 user, u8 strm, bool rxevm_table);
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struct rxevm_physts halbb_mp_get_rxevm_physts(struct bb_info *bb,
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enum phl_phy_idx phy_idx);
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//u16 halbb_mp_get_pwdb_diff(struct bb_info *bb, enum rf_path path);
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u8 halbb_mp_get_rssi_td(struct bb_info *bb, enum rf_path path);
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u8 halbb_mp_get_rssi(struct bb_info *bb, enum rf_path path);
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struct rssi_physts halbb_get_mp_rssi_physts(struct bb_info *bb, enum rf_path path, enum phl_phy_idx phy_idx);
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void halbb_mp_get_psts(struct bb_info *bb , struct bb_mp_psts *bb_mp_physts);
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void halbb_cvrt_2_mp(struct bb_info *bb);
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u16 halbb_mp_get_rpl(struct bb_info *bb, enum rf_path path, enum phl_phy_idx phy_idx);
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u32 halbb_mp_get_dc_lvl(struct bb_info *bb, enum rf_path path, bool i_ch, enum phl_phy_idx phy_idx);
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u16 halbb_mp_get_pwdbm(struct bb_info *bb, enum rf_path path, enum phl_phy_idx phy_idx);
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u16 halbb_mp_get_cfo(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_mp_dbg(struct bb_info *bb, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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void halbb_cr_cfg_mp_init(struct bb_info *bb);
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void halbb_dbg_port_sel(struct bb_info *bb, u16 dbg_port_sel, u8 dbg_port_ip_sel,
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bool dbg_port_ref_clk_en, bool dbg_port_en);
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#endif
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