/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef _HALBB_API_H_
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#define _HALBB_API_H_
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#include "halbb_ic_hw_info.h"
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#include "halbb_dbcc_ex.h"
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/*@--------------------------[Define] ---------------------------------------*/
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#define IGI_2_RSSI(igi) (igi - 10)
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#define FUNC_ENABLE 1
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#define FUNC_DISABLE 2
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#define BB_CH_SWH_HISTORY_SIZE 50
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/*@--------------------------[Enum]------------------------------------------*/
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enum bb_rfe_src_sel {
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PAPE_RFM = 0,
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GNT_BT_INV = 1,
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LNA0N = 2,
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LNAON_RFM = 3,
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TRSW_RFM = 4,
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TRSW_RFM_B = 5,
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GNT_BT = 6,
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ZERO = 7,
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ANTSEL_0 = 8,
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ANTSEL_1 = 9,
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ANTSEL_2 = 0xa,
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ANTSEL_3 = 0xb,
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ANTSEL_4 = 0xc,
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ANTSEL_5 = 0xd,
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ANTSEL_6 = 0xe,
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ANTSEL_7 = 0xf
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};
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enum bb_mlo {
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MLO_OFF_BB0,
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MLO_OFF_BB1,
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MLO_ON
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};
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/*@--------------------------[Structure]-------------------------------------*/
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struct bb_api_info {
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u32 rxiqc_reg1; /*N-mode: for pathA REG0xc14*/
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u32 rxiqc_reg2; /*N-mode: for pathB REG0xc1c*/
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u8 tx_queue_bitmap; /*REG0x520[23:16]*/
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u8 ccktx_path;
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u8 pri_ch_idx;
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u8 central_ch;
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u8 bw;
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u16 ch_switch_cnt;
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u8 ch_switch_history[BB_CH_SWH_HISTORY_SIZE]; /*fc CH*/
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u8 ch_switch_ptr;
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enum band_type band;
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};
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/*@--------------------------[Prptotype]-------------------------------------*/
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struct bb_info;
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enum bb_band_gt2_t halbb_get_band_gen2(struct bb_info *bb, u8 fc_ch,
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enum band_type band_in);
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enum bb_bw_type halbb_phl_2_bb_bw(struct bb_info *bb, enum channel_width phl_bw);
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u8 halbb_dbcc_get_valid_rf_path_mask(struct bb_info *bb);
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u8 halbb_ch_2_band(struct bb_info *bb, u8 fc_ch);
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u16 halbb_get_csi_buf_idx(struct bb_info *bb, u8 buf_idx, u8 txsc_idx);
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void halbb_reset_bb_phy(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_gpio_setting_init(struct bb_info *bb);
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void halbb_pre_agc_en(struct bb_info *bb, bool enable);
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void halbb_set_gain_error(struct bb_info *bb, u8 central_ch, enum band_type band, enum rf_path path);
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u8 halbb_stop_ic_trx(struct bb_info *bb, u8 set_type);
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void halbb_ic_api_dbg(struct bb_info *bb, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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u16 halbb_fc_mapping(struct bb_info *bb, enum band_type band, u8 central_ch);
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void halbb_ic_hw_setting_non_io(struct bb_info *bb);
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void halbb_ic_hw_setting_low_io(struct bb_info *bb);
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void halbb_ic_hw_setting_dbcc(struct bb_info *bb);
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void halbb_ic_hw_setting(struct bb_info *bb);
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void halbb_ic_hw_setting_dbg(struct bb_info *bb, char input[][16],
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u32 *_used, char *output, u32 *_out_len);
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void halbb_ctrl_tx_path_div(struct bb_info * bb, enum bb_path tx_path_1ss);
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void halbb_pwr_diff_wa_enable(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_pwr_diff_wa_disable(struct bb_info *bb, enum phl_phy_idx phy_idx);
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#endif
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