/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#include "rx_forwarding.h"
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#if MAC_AX_FW_REG_OFLD
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u32 mac_set_rx_forwarding(struct mac_ax_adapter *adapter,
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struct mac_ax_rx_fwd_ctrl_t *rf_ctrl_p)
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{
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u32 ret = 0;
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u8 *buf;
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struct h2c_info h2c_info = {0};
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struct fwcmd_rx_fwd *rx_fwd;
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struct mac_ax_af_ud_ctrl_t *af_ud;
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struct mac_ax_pm_cam_ctrl_t *pm_cam;
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if (!rf_ctrl_p)
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return MACNPTR;
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h2c_info.agg_en = 0;
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h2c_info.content_len = sizeof(struct fwcmd_rx_fwd);
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h2c_info.h2c_cat = FWCMD_H2C_CAT_MAC;
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h2c_info.h2c_class = FWCMD_H2C_CL_FW_OFLD;
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h2c_info.h2c_func = FWCMD_H2C_FUNC_RX_FWD;
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h2c_info.rec_ack = 0;
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h2c_info.done_ack = 1;
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buf = PLTFM_MALLOC(sizeof(struct fwcmd_rx_fwd));
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if (!buf) {
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PLTFM_MSG_ERR("%s malloc h2c error\n", __func__);
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return MACNPTR;
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}
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rx_fwd = (struct fwcmd_rx_fwd *)buf;
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rx_fwd->dword0 =
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cpu_to_le32(SET_WORD(rf_ctrl_p->type, FWCMD_H2C_RX_FWD_TYPE) |
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SET_WORD(rf_ctrl_p->frame, FWCMD_H2C_RX_FWD_FRAME) |
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SET_WORD(rf_ctrl_p->fwd_tg, FWCMD_H2C_RX_FWD_FWD_TG));
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af_ud = &rf_ctrl_p->af_ud_ctrl;
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rx_fwd->dword1 =
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cpu_to_le32(SET_WORD(af_ud->index, FWCMD_H2C_RX_FWD_AF_UD_INDEX) |
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SET_WORD(af_ud->fwd_tg, FWCMD_H2C_RX_FWD_AF_UD_FWD_TG) |
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SET_WORD(af_ud->category, FWCMD_H2C_RX_FWD_AF_UD_CATEGORY) |
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SET_WORD(af_ud->action_field,
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FWCMD_H2C_RX_FWD_AF_UD_ACTION_FIELD));
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pm_cam = &rf_ctrl_p->pm_cam_ctrl;
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rx_fwd->dword2 =
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cpu_to_le32((pm_cam->valid ? FWCMD_H2C_RX_FWD_PM_CAM_VALID : 0) |
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SET_WORD(pm_cam->type, FWCMD_H2C_RX_FWD_PM_CAM_TYPE) |
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SET_WORD(pm_cam->subtype, FWCMD_H2C_RX_FWD_PM_CAM_SUBTYPE) |
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(pm_cam->skip_mac_iv_hdr ?
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FWCMD_H2C_RX_FWD_PM_CAM_SKIP_MAC_IV_HDR : 0) |
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SET_WORD(pm_cam->target_ind,
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FWCMD_H2C_RX_FWD_PM_CAM_TARGET_IND) |
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SET_WORD(pm_cam->entry_index,
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FWCMD_H2C_RX_FWD_PM_CAM_INDEX) |
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SET_WORD(pm_cam->crc16, FWCMD_H2C_RX_FWD_PM_CAM_CRC16));
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rx_fwd->dword3 =
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cpu_to_le32(SET_WORD(pm_cam->pld_mask0,
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FWCMD_H2C_RX_FWD_PM_CAM_PLD_MASK0));
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rx_fwd->dword4 =
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cpu_to_le32(SET_WORD(pm_cam->pld_mask1,
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FWCMD_H2C_RX_FWD_PM_CAM_PLD_MASK1));
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rx_fwd->dword5 =
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cpu_to_le32(SET_WORD(pm_cam->pld_mask2,
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FWCMD_H2C_RX_FWD_PM_CAM_PLD_MASK2));
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rx_fwd->dword6 =
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cpu_to_le32(SET_WORD(pm_cam->pld_mask3,
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FWCMD_H2C_RX_FWD_PM_CAM_PLD_MASK3));
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if (adapter->sm.fwdl == MAC_AX_FWDL_INIT_RDY) {
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ret = mac_h2c_common(adapter, &h2c_info, (u32 *)rx_fwd);
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if (ret)
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goto fail;
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} else {
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ret = MACFWNONRDY;
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goto fail;
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}
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ret = MACSUCCESS;
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fail:
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PLTFM_FREE(rx_fwd, sizeof(struct fwcmd_rx_fwd));
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return ret;
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}
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#else
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static inline u32 af_fwd_cfg(struct mac_ax_adapter *adapter,
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enum mac_ax_action_frame frame,
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enum mac_ax_fwd_target fwd_tg)
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{
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u32 val32;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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val32 = MAC_REG_R32(R_AX_ACTION_FWD0);
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switch (frame) {
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case MAC_AX_AF_CSA:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_CSA);
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break;
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case MAC_AX_AF_ADDTS_REQ:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_ADDTS_REQ);
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break;
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case MAC_AX_AF_ADDTS_RES:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_ADDTS_RES);
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break;
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case MAC_AX_AF_DELTS:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_DELTS);
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break;
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case MAC_AX_AF_ADDBA_REQ:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_ADDBA_REQ);
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break;
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case MAC_AX_AF_ADDBA_RES:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_ADDBA_RES);
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break;
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case MAC_AX_AF_DELBA:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_DELBA);
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break;
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case MAC_AX_AF_NCW:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_NCW);
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break;
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case MAC_AX_AF_GID_MGNT:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_GID_MGNT);
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break;
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case MAC_AX_AF_OP_MODE:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_OP_MODE);
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break;
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case MAC_AX_AF_CSI:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_CSI);
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break;
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case MAC_AX_AF_HT_CBFM:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_HT_CBFM);
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break;
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case MAC_AX_AF_VHT_CBFM:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_VHT_CBFM);
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break;
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default:
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return MACNOITEM;
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}
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MAC_REG_W32(R_AX_ACTION_FWD0, val32);
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return MACSUCCESS;
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}
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static inline u32 af_ud_fwd_cfg(struct mac_ax_adapter *adapter,
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struct mac_ax_af_ud_ctrl_t *af_ud_ctrl_p)
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{
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u32 val32;
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u16 val16;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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val32 = MAC_REG_R32(R_AX_ACTION_FWD1);
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switch (af_ud_ctrl_p->index) {
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case MAC_AX_AF_UD_0:
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val16 = MAC_REG_R16(R_AX_ACTION_FWD_CTRL0);
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val16 = SET_CLR_WORD(val16, af_ud_ctrl_p->category,
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B_AX_FWD_ACTN_CAT0);
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val16 = SET_CLR_WORD(val16, af_ud_ctrl_p->action_field,
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B_AX_FWD_ACTN_ACTN0);
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MAC_REG_W16(R_AX_ACTION_FWD_CTRL0, val16);
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val32 = SET_CLR_WORD(val32, af_ud_ctrl_p->fwd_tg,
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B_AX_FWD_ACTN_CTRL0);
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break;
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case MAC_AX_AF_UD_1:
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val16 = MAC_REG_R16(R_AX_ACTION_FWD_CTRL1);
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val16 = SET_CLR_WORD(val16, af_ud_ctrl_p->category,
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B_AX_FWD_ACTN_CAT1);
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val16 = SET_CLR_WORD(val16, af_ud_ctrl_p->action_field,
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B_AX_FWD_ACTN_ACTN1);
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MAC_REG_W16(R_AX_ACTION_FWD_CTRL1, val16);
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val32 = SET_CLR_WORD(val32, af_ud_ctrl_p->fwd_tg,
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B_AX_FWD_ACTN_CTRL1);
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break;
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case MAC_AX_AF_UD_2:
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val16 = MAC_REG_R16(R_AX_ACTION_FWD_CTRL2);
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val16 = SET_CLR_WORD(val16, af_ud_ctrl_p->category,
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B_AX_FWD_ACTN_CAT2);
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val16 = SET_CLR_WORD(val16, af_ud_ctrl_p->action_field,
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B_AX_FWD_ACTN_ACTN2);
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MAC_REG_W16(R_AX_ACTION_FWD_CTRL2, val16);
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val32 = SET_CLR_WORD(val32, af_ud_ctrl_p->fwd_tg,
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B_AX_FWD_ACTN_CTRL2);
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break;
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case MAC_AX_AF_UD_3:
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val16 = MAC_REG_R16(R_AX_ACTION_FWD_CTRL3);
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val16 = SET_CLR_WORD(val16, af_ud_ctrl_p->category,
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B_AX_FWD_ACTN_CAT3);
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val16 = SET_CLR_WORD(val16, af_ud_ctrl_p->action_field,
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B_AX_FWD_ACTN_ACTN3);
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MAC_REG_W16(R_AX_ACTION_FWD_CTRL3, val16);
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val32 = SET_CLR_WORD(val32, af_ud_ctrl_p->fwd_tg,
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B_AX_FWD_ACTN_CTRL3);
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break;
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default:
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return MACNOITEM;
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}
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MAC_REG_W32(R_AX_ACTION_FWD1, val32);
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return MACSUCCESS;
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}
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static inline u32 tf_fwd_cfg(struct mac_ax_adapter *adapter,
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enum mac_ax_trigger_frame frame,
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enum mac_ax_fwd_target fwd_tg)
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{
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u32 val32;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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val32 = MAC_REG_R32(R_AX_TF_FWD);
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switch (frame) {
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case MAC_AX_TF_BT:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_TF0);
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break;
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case MAC_AX_TF_BFRP:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_TF1);
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break;
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case MAC_AX_TF_MU_BAR:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_TF2);
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break;
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case MAC_AX_TF_MU_RTS:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_TF3);
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break;
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case MAC_AX_TF_BSRP:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_TF4);
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break;
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case MAC_AX_TF_GCR_MU_BAR:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_TF5);
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break;
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case MAC_AX_TF_BQRP:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_TF6);
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break;
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case MAC_AX_TF_NFRP:
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val32 = SET_CLR_WORD(val32, fwd_tg, B_AX_FWD_TF7);
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break;
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default:
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return MACNOITEM;
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}
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MAC_REG_W32(R_AX_TF_FWD, val32);
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return MACSUCCESS;
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}
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static inline u32 pm_cam_access_polling(struct mac_ax_adapter *adapter)
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{
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u32 cnt = PM_CAM_WAIT_CNT;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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while (cnt--) {
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if (!(MAC_REG_R32(R_AX_PLD_CAM_ACCESS) & B_AX_PLD_CAM_POLL))
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break;
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PLTFM_DELAY_US(PM_CAM_WAIT_US);
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}
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if (!++cnt) {
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PLTFM_MSG_ERR("[ERR]PM CAM access timeout\n");
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return MACPOLLTO;
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}
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return MACSUCCESS;
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}
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static inline u32 pm_cam_indirect_r(struct mac_ax_adapter *adapter,
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u32 offset)
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{
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u32 val32;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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val32 = 0;
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val32 = SET_CLR_WORD(val32, offset, B_AX_PLD_CAM_OFFSET);
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val32 &= ~B_AX_PLD_CAM_CLR;
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val32 &= ~B_AX_PLD_CAM_RW;
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val32 |= B_AX_PLD_CAM_POLL;
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MAC_REG_W32(R_AX_PLD_CAM_ACCESS, val32);
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if (pm_cam_access_polling(adapter)) {
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PLTFM_MSG_ERR("[ERR]PM CAM read timeout\n");
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return MACSUCCESS;
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}
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return MAC_REG_R32(R_AX_PLD_CAM_RDATA);
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}
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static inline void pm_cam_indirect_w(struct mac_ax_adapter *adapter,
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u32 offset, u32 data)
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{
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u32 val32;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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MAC_REG_W32(R_AX_PLD_CAM_WDATA, data);
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val32 = 0;
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val32 = SET_CLR_WORD(val32, offset, B_AX_PLD_CAM_OFFSET);
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val32 &= ~B_AX_PLD_CAM_CLR;
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val32 |= B_AX_PLD_CAM_RW;
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val32 |= B_AX_PLD_CAM_POLL;
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MAC_REG_W32(R_AX_PLD_CAM_ACCESS, val32);
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if (pm_cam_access_polling(adapter))
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PLTFM_MSG_ERR("[ERR]PM CAM write timeout\n");
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}
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static inline u32 pm_cam_fwd_cfg(struct mac_ax_adapter *adapter,
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struct mac_ax_pm_cam_ctrl_t *pm_cam_ctrl_p)
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{
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u32 val32, offset;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852C) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8192XB) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8851E) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8852D)) {
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PLTFM_MSG_ERR("[ERR]%s PM_CAM API is removed in 52C & 92XB & 51E & 52D.\n"
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, __func__);
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return MACSUCCESS;
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}
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if (!pm_cam_ctrl_p)
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return MACNPTR;
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if (pm_cam_ctrl_p->entry_index >= MAC_AX_PM_CAM_ENTRY_NUM_MAX)
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return MACNOITEM;
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// Set as indirect access and enable PM CAM
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val32 = MAC_REG_R32(R_AX_PLD_CAM_CTRL);
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val32 = SET_CLR_WORD(val32, 0xf, B_AX_PLD_CAM_RANGE);
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val32 |= B_AX_PLD_CAM_ACC;
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val32 |= B_AX_PLD_CAM_EN;
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MAC_REG_W32(R_AX_PLD_CAM_CTRL, val32);
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// offset unit: 4 bytes
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offset = (pm_cam_ctrl_p->entry_index *
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MAC_AX_PM_CAM_ENTRY_CONTENT_SIZE) / 4;
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val32 = 0;
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val32 = SET_CLR_WORD(val32, pm_cam_ctrl_p->pld_mask0, PM_CAM_PLD_MASK0);
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pm_cam_indirect_w(adapter, offset + PM_CAM_OFFSET_DW1, val32);
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if (val32 != pm_cam_indirect_r(adapter, offset + PM_CAM_OFFSET_DW1)) {
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PLTFM_MSG_ERR("[ERR]PM CAM cfg fail 1\n");
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return MACRFPMCAM;
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}
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val32 = 0;
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val32 = SET_CLR_WORD(val32, pm_cam_ctrl_p->pld_mask1, PM_CAM_PLD_MASK1);
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pm_cam_indirect_w(adapter, offset + PM_CAM_OFFSET_DW2, val32);
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if (val32 != pm_cam_indirect_r(adapter, offset + PM_CAM_OFFSET_DW2)) {
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PLTFM_MSG_ERR("[ERR]PM CAM cfg fail 2\n");
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return MACRFPMCAM;
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}
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val32 = 0;
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val32 = SET_CLR_WORD(val32, pm_cam_ctrl_p->pld_mask2, PM_CAM_PLD_MASK2);
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pm_cam_indirect_w(adapter, offset + PM_CAM_OFFSET_DW3, val32);
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if (val32 != pm_cam_indirect_r(adapter, offset + PM_CAM_OFFSET_DW3)) {
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PLTFM_MSG_ERR("[ERR]PM CAM cfg fail 3\n");
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return MACRFPMCAM;
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}
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val32 = 0;
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val32 = SET_CLR_WORD(val32, pm_cam_ctrl_p->pld_mask3, PM_CAM_PLD_MASK3);
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pm_cam_indirect_w(adapter, offset + PM_CAM_OFFSET_DW4, val32);
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if (val32 != pm_cam_indirect_r(adapter, offset + PM_CAM_OFFSET_DW4)) {
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PLTFM_MSG_ERR("[ERR]PM CAM cfg fail 4\n");
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return MACRFPMCAM;
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}
|
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// PMCAM is not trigger-type reg!
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val32 = 0;
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val32 |= (pm_cam_ctrl_p->valid ? PM_CAM_VALID : 0);
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val32 = SET_CLR_WORD(val32, pm_cam_ctrl_p->type, PM_CAM_TYPE);
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val32 = SET_CLR_WORD(val32, pm_cam_ctrl_p->subtype, PM_CAM_SUBTYPE);
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val32 |= (pm_cam_ctrl_p->skip_mac_iv_hdr ? PM_CAM_SKIP_MAC_IV_HDR : 0);
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val32 = SET_CLR_WORD(val32, pm_cam_ctrl_p->target_ind,
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PM_CAM_TARGET_IND);
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val32 = SET_CLR_WORD(val32, pm_cam_ctrl_p->crc16, PM_CAM_CRC16);
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pm_cam_indirect_w(adapter, offset, val32);
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if (val32 != pm_cam_indirect_r(adapter, offset)) {
|
PLTFM_MSG_ERR("[ERR]PM CAM cfg fail 5, %x, %x\n",
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val32, pm_cam_indirect_r(adapter, offset));
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return MACRFPMCAM;
|
}
|
|
return MACSUCCESS;
|
}
|
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u32 mac_set_rx_forwarding(struct mac_ax_adapter *adapter,
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struct mac_ax_rx_fwd_ctrl_t *rf_ctrl_p)
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{
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u32 ret = 0;
|
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if (!rf_ctrl_p) {
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PLTFM_MSG_ERR("[ERR]%s NULL pointer!\n", __func__);
|
return MACNPTR;
|
}
|
|
switch (rf_ctrl_p->type) {
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case MAC_AX_FT_ACTION:
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ret = af_fwd_cfg(adapter,
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(enum mac_ax_action_frame)rf_ctrl_p->frame,
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(enum mac_ax_fwd_target)rf_ctrl_p->fwd_tg);
|
break;
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case MAC_AX_FT_ACTION_UD:
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ret = af_ud_fwd_cfg(adapter, &rf_ctrl_p->af_ud_ctrl);
|
break;
|
case MAC_AX_FT_TRIGGER:
|
ret = tf_fwd_cfg(adapter,
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(enum mac_ax_trigger_frame)rf_ctrl_p->frame,
|
(enum mac_ax_fwd_target)rf_ctrl_p->fwd_tg);
|
break;
|
case MAC_AX_FT_PM_CAM:
|
// Don't suggest using indirect access.
|
ret = pm_cam_fwd_cfg(adapter, &rf_ctrl_p->pm_cam_ctrl);
|
break;
|
}
|
|
return ret;
|
}
|
|
#endif
|
