/** @file */
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/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#ifndef _MAC_AX_CPUIO_H_
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#define _MAC_AX_CPUIO_H_
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#include "../type.h"
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#include "trxcfg.h"
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#include "role.h"
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#include "hw.h"
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/*--------------------Define ----------------------------------------*/
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#define WDE_DLE_PID_C0 3
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#define WDE_DLE_PID_C1 4
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#define WDE_DLE_PID_WDRLS 7
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#define WDE_DLE_QID_BE 0
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#define WDE_DLE_QID_BK 1
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#define WDE_DLE_QID_VI 2
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#define WDE_DLE_QID_VO 3
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#define WDE_DLE_QID_WDRLS_DROP 3
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#define WDE_DLE_QID_BCN_C0 0x10
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#define WDE_DLE_QID_HI_C0 0x11
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#define WDE_DLE_QID_MG0_C0 0x12
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#define WDE_DLE_QID_MG1_C0 0x13
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#define WDE_DLE_QID_MG2_C0 0x14
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#define WDE_DLE_QID_BCN_C1 0x18
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#define WDE_DLE_QID_HI_C1 0x19
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#define WDE_DLE_QID_MG0_C1 0x1A
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#define WDE_DLE_QID_MG1_C1 0x1B
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#define WDE_DLE_QID_MG2_C1 0x1C
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#define WDE_DLE_SUBQID_PORT_SH 4
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#define WDE_DLE_MAX_PKT_NUM 0xFFFF
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#define WDE_DLE_NULL_PKTID 0xFFF
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#define DLE_BUF_REQ_DLY_CNT 2000
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#define DLE_BUF_REQ_DLY_US 1
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#define SET_CPUIO_DLY_CNT 2000
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#define SET_CPUIO_DLY_US 1
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/*--------------------Define Enum------------------------------------*/
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/**
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* @enum WDE_DLE_PORT_ID
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*
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* @brief WDE_DLE_PORT_ID
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*
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* @var WDE_DLE_PORT_ID::WDE_DLE_PORT_ID_DISPATCH
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* Please Place Description here.
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* @var WDE_DLE_PORT_ID::WDE_DLE_PORT_ID_PKTIN
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* Please Place Description here.
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* @var WDE_DLE_PORT_ID::WDE_DLE_PORT_ID_CMAC0
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* Please Place Description here.
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* @var WDE_DLE_PORT_ID::WDE_DLE_PORT_ID_CMAC1
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* Please Place Description here.
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* @var WDE_DLE_PORT_ID::WDE_DLE_PORT_ID_CPU_IO
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* Please Place Description here.
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* @var WDE_DLE_PORT_ID::WDE_DLE_PORT_ID_WDRLS
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* Please Place Description here.
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* @var WDE_DLE_PORT_ID::WDE_DLE_PORT_ID_END
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* Please Place Description here.
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*/
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enum WDE_DLE_PORT_ID {
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WDE_DLE_PORT_ID_DISPATCH = 0,
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WDE_DLE_PORT_ID_PKTIN = 1,
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WDE_DLE_PORT_ID_CMAC0 = 3,
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WDE_DLE_PORT_ID_CMAC1 = 4,
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WDE_DLE_PORT_ID_CPU_IO = 6,
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WDE_DLE_PORT_ID_WDRLS = 7,
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WDE_DLE_PORT_ID_END = 8
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};
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/**
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* @enum PLE_DLE_PORT_ID
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*
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* @brief PLE_DLE_PORT_ID
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*
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_DISPATCH
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* Please Place Description here.
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_MPDU
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* Please Place Description here.
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_SEC
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* Please Place Description here.
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_CMAC0
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* Please Place Description here.
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_CMAC1
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* Please Place Description here.
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_WDRLS
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* Please Place Description here.
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_CPU_IO
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* Please Place Description here.
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_PLRLS
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* Please Place Description here.
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* @var PLE_DLE_PORT_ID::PLE_DLE_PORT_ID_END
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* Please Place Description here.
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*/
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enum PLE_DLE_PORT_ID {
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PLE_DLE_PORT_ID_DISPATCH = 0,
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PLE_DLE_PORT_ID_MPDU = 1,
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PLE_DLE_PORT_ID_SEC = 2,
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PLE_DLE_PORT_ID_CMAC0 = 3,
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PLE_DLE_PORT_ID_CMAC1 = 4,
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PLE_DLE_PORT_ID_WDRLS = 5,
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PLE_DLE_PORT_ID_CPU_IO = 6,
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PLE_DLE_PORT_ID_PLRLS = 7,
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PLE_DLE_PORT_ID_END = 8
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};
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/**
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* @enum WDE_DLE_QUEID_PKTIN
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*
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* @brief WDE_DLE_QUEID_PKTIN
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*
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* @var WDE_DLE_QUEID_PKTIN::WDE_DLE_QUEID_AC0
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* Please Place Description here.
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* @var WDE_DLE_QUEID_PKTIN::WDE_DLE_QUEID_AC1
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* Please Place Description here.
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* @var WDE_DLE_QUEID_PKTIN::WDE_DLE_QUEID_AC2
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* Please Place Description here.
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* @var WDE_DLE_QUEID_PKTIN::WDE_DLE_QUEID_AC3
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* Please Place Description here.
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* @var WDE_DLE_QUEID_PKTIN::WDE_DLE_QUEID_MSIC
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* Please Place Description here.
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*/
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enum WDE_DLE_QUEID_PKTIN {
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WDE_DLE_QUEID_AC0 = 0x0,
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WDE_DLE_QUEID_AC1 = 0x1,
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WDE_DLE_QUEID_AC2 = 0x2,
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WDE_DLE_QUEID_AC3 = 0x3,
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WDE_DLE_QUEID_MSIC = 0x4
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};
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/**
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* @enum WDE_DLE_QUEID_CMAC
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*
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* @brief WDE_DLE_QUEID_CMAC
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*
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_ACQ_BE
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_ACQ_BK
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_ACQ_VI
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_ACQ_VO
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B0_BEACON
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B0_HIGH
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B0_MGN_NORMAL
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B0_MGN_NO_POWER_SAVE
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B0_MGN_FAST_EDCA
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B1_BEACON
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B1_HIGH
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B1_MGN_NORMAL
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B1_MGN_NO_POWER_SAVE
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B1_MGN_FAST_EDCA
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_WMM0_F2P_VO
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_WMM0_F2P_VI
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_WMM0_F2P_BE
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_WMM0_F2P_BK
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_WMM1_F2P_VO
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_WMM1_F2P_VI
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_WMM1_F2P_BE
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_WMM1_F2P_BK
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B0_ULQ
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B0_TWTQ0
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CMAC::WDE_DLE_QUEID_B0_TWTQ1
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* Please Place Description here.
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*/
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enum WDE_DLE_QUEID_CMAC {
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WDE_DLE_QUEID_ACQ_BE = 0,
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WDE_DLE_QUEID_ACQ_BK = 1,
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WDE_DLE_QUEID_ACQ_VI = 2,
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WDE_DLE_QUEID_ACQ_VO = 3,
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WDE_DLE_QUEID_B0_BEACON = 0x10,
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WDE_DLE_QUEID_B0_HIGH = 0x11,
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WDE_DLE_QUEID_B0_MGN_NORMAL = 0x12,
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WDE_DLE_QUEID_B0_MGN_NO_POWER_SAVE = 0x13,
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WDE_DLE_QUEID_B0_MGN_FAST_EDCA = 0x14,
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WDE_DLE_QUEID_B1_BEACON = 0x18,
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WDE_DLE_QUEID_B1_HIGH = 0x19,
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WDE_DLE_QUEID_B1_MGN_NORMAL = 0x1A,
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WDE_DLE_QUEID_B1_MGN_NO_POWER_SAVE = 0x1B,
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WDE_DLE_QUEID_B1_MGN_FAST_EDCA = 0x1C,
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WDE_DLE_QUEID_WMM0_F2P_VO = 0x20,
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WDE_DLE_QUEID_WMM0_F2P_VI = 0x21,
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WDE_DLE_QUEID_WMM0_F2P_BE = 0x22,
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WDE_DLE_QUEID_WMM0_F2P_BK = 0x23,
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WDE_DLE_QUEID_WMM1_F2P_VO = 0x24,
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WDE_DLE_QUEID_WMM1_F2P_VI = 0x25,
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WDE_DLE_QUEID_WMM1_F2P_BE = 0x26,
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WDE_DLE_QUEID_WMM1_F2P_BK = 0x27,
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WDE_DLE_QUEID_B0_ULQ = 0x30,
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WDE_DLE_QUEID_B0_TWTQ0 = 0x31,
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WDE_DLE_QUEID_B0_TWTQ1 = 0x32
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};
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/**
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* @enum WDE_DLE_QUEID_CPUIO
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*
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* @brief WDE_DLE_QUEID_CPUIO
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*
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* @var WDE_DLE_QUEID_CPUIO::WDE_DLE_QUEID_CPUIO_0
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* Please Place Description here.
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* @var WDE_DLE_QUEID_CPUIO::WDE_DLE_QUEID_CPUIO_1
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* Please Place Description here.
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*/
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enum WDE_DLE_QUEID_CPUIO {
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WDE_DLE_QUEID_CPUIO_0 = 0x0,
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WDE_DLE_QUEID_CPUIO_1 = 0x1
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};
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/**
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* @enum PLE_DLE_QUEID_CPUIO
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*
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* @brief PLE_DLE_QUEID_CPUIO
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*
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* @var PLE_DLE_QUEID_CPUIO::PLE_DLE_QUEID_CPUIO_0
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* Please Place Description here.
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* @var PLE_DLE_QUEID_CPUIO::PLE_DLE_QUEID_CPUIO_1
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* Please Place Description here.
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*/
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enum PLE_DLE_QUEID_CPUIO {
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PLE_DLE_QUEID_CPUIO_0 = 0x0,
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PLE_DLE_QUEID_CPUIO_1 = 0x1
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};
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/**
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* @enum WDE_DLE_QUEID_WDRLS
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*
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* @brief WDE_DLE_QUEID_WDRLS
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*
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* @var WDE_DLE_QUEID_WDRLS::WDE_DLE_QUEID_TXOK
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* Please Place Description here.
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* @var WDE_DLE_QUEID_WDRLS::WDE_DLE_QUEID_DROP_RETRY_LIMIT
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* Please Place Description here.
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* @var WDE_DLE_QUEID_WDRLS::WDE_DLE_QUEID_DROP_LIFETIME_TO
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* Please Place Description here.
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* @var WDE_DLE_QUEID_WDRLS::WDE_DLE_QUEID_DROP_MACID_DROP
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* Please Place Description here.
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* @var WDE_DLE_QUEID_WDRLS::WDE_DLE_QUEID_NO_REPORT
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* Please Place Description here.
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*/
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enum WDE_DLE_QUEID_WDRLS {
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WDE_DLE_QUEID_TXOK = 0x0,
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WDE_DLE_QUEID_DROP_RETRY_LIMIT = 0x1,
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WDE_DLE_QUEID_DROP_LIFETIME_TO = 0x2,
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WDE_DLE_QUEID_DROP_MACID_DROP = 0x3,
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WDE_DLE_QUEID_NO_REPORT = 0x4
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};
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/**
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* @enum PLE_DLE_QUEID_PLRLS
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*
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* @brief PLE_DLE_QUEID_PLRLS
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*
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* @var PLE_DLE_QUEID_PLRLS::PLE_DLE_QUEID_NO_REPORT
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* Please Place Description here.
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*/
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enum PLE_DLE_QUEID_PLRLS {
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PLE_DLE_QUEID_NO_REPORT = 0x0
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};
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/**
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* @enum WDE_DLE_QUOTA_ID
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*
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* @brief WDE_DLE_QUOTA_ID
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*
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* @var WDE_DLE_QUOTA_ID::WDE_DLE_QUOTA_ID_HOST_IF
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* Please Place Description here.
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* @var WDE_DLE_QUOTA_ID::WDE_DLE_QUOTA_ID_WLAN_CPU
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* Please Place Description here.
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* @var WDE_DLE_QUOTA_ID::WDE_DLE_QUOTA_ID_DATA_CPU
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* Please Place Description here.
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* @var WDE_DLE_QUOTA_ID::WDE_DLE_QUOTA_ID_PKTIN
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* Please Place Description here.
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* @var WDE_DLE_QUOTA_ID::WDE_DLE_QUOTA_ID_CPUIO
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* Please Place Description here.
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* @var WDE_DLE_QUOTA_ID::WDE_DLE_QUOTA_ID_END
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* Please Place Description here.
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*/
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enum WDE_DLE_QUOTA_ID {
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WDE_DLE_QUOTA_ID_HOST_IF = 0,
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WDE_DLE_QUOTA_ID_WLAN_CPU = 1,
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WDE_DLE_QUOTA_ID_DATA_CPU = 2,
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WDE_DLE_QUOTA_ID_PKTIN = 3,
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WDE_DLE_QUOTA_ID_CPUIO = 4,
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WDE_DLE_QUOTA_ID_END = 5
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};
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/**
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* @enum PLE_DLE_QUOTA_ID
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*
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* @brief PLE_DLE_QUOTA_ID
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*
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_BAND0_TXPL
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_BAND1_TXPL
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_C2H
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_H2C
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_WLAN_CPU
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_MPDU
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_CMAC0_RX
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_CMAC1_RX
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_CMAC1_BBRPT
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_WDRLS_RPT
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_CPUIO
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* Please Place Description here.
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* @var PLE_DLE_QUOTA_ID::PLE_DLE_QUOTA_ID_END
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* Please Place Description here.
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*/
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enum PLE_DLE_QUOTA_ID {
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PLE_DLE_QUOTA_ID_BAND0_TXPL = 0,
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PLE_DLE_QUOTA_ID_BAND1_TXPL = 1,
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PLE_DLE_QUOTA_ID_C2H = 2,
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PLE_DLE_QUOTA_ID_H2C = 3,
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PLE_DLE_QUOTA_ID_WLAN_CPU = 4,
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PLE_DLE_QUOTA_ID_MPDU = 5,
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PLE_DLE_QUOTA_ID_CMAC0_RX = 6,
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PLE_DLE_QUOTA_ID_CMAC1_RX = 7,
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PLE_DLE_QUOTA_ID_CMAC1_BBRPT = 8,
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PLE_DLE_QUOTA_ID_WDRLS_RPT = 9,
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PLE_DLE_QUOTA_ID_CPUIO = 10,
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PLE_DLE_QUOTA_ID_END = 11
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};
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/**
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* @enum CPUIO_CTRL_TYPE
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*
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* @brief CPUIO_CTRL_TYPE
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*
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* @var CPUIO_CTRL_TYPE::CPUIO_CTRL_TYPE_WD
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* Please Place Description here.
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* @var CPUIO_CTRL_TYPE::CPUIO_CTRL_TYPE_PLD
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* Please Place Description here.
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* @var CPUIO_CTRL_TYPE::CPUIO_CTRL_TYPE_NUM
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* Please Place Description here.
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*/
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enum CPUIO_CTRL_TYPE {
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CPUIO_CTRL_TYPE_WD = 0,
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CPUIO_CTRL_TYPE_PLD = 1,
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CPUIO_CTRL_TYPE_NUM = 2
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};
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/**
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* @enum CPUIO_OP_COMMAND_TYPE
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*
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* @brief CPUIO_OP_COMMAND_TYPE
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*
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* @var CPUIO_OP_COMMAND_TYPE::CPUIO_OP_CMD_GET_1ST_PID
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* Please Place Description here.
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* @var CPUIO_OP_COMMAND_TYPE::CPUIO_OP_CMD_GET_NEXT_PID
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* Please Place Description here.
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* @var CPUIO_OP_COMMAND_TYPE::CPUIO_OP_CMD_ENQ_TO_TAIL
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* Please Place Description here.
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* @var CPUIO_OP_COMMAND_TYPE::CPUIO_OP_CMD_ENQ_TO_HEAD
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* Please Place Description here.
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* @var CPUIO_OP_COMMAND_TYPE::CPUIO_OP_CMD_DEQ
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* Please Place Description here.
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* @var CPUIO_OP_COMMAND_TYPE::CPUIO_OP_CMD_DEQ_ENQ_ALL
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* Please Place Description here.
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* @var CPUIO_OP_COMMAND_TYPE::CPUIO_OP_CMD_DEQ_ENQ_TO_TAIL
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* Please Place Description here.
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*/
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enum CPUIO_OP_COMMAND_TYPE {
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CPUIO_OP_CMD_GET_1ST_PID = 0,
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CPUIO_OP_CMD_GET_NEXT_PID = 1,
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CPUIO_OP_CMD_ENQ_TO_TAIL = 4,
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CPUIO_OP_CMD_ENQ_TO_HEAD = 5,
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CPUIO_OP_CMD_DEQ = 8,
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CPUIO_OP_CMD_DEQ_ENQ_ALL = 9,
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CPUIO_OP_CMD_DEQ_ENQ_TO_TAIL = 12
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};
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/**
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* @enum pkt_drop_ac
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*
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* @brief pkt_drop_ac
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*
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* @var pkt_drop_ac::PKT_DROP_BE
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* Please Place Description here.
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* @var pkt_drop_ac::PKT_DROP_BK
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* Please Place Description here.
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* @var pkt_drop_ac::PKT_DROP_VI
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* Please Place Description here.
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* @var pkt_drop_ac::PKT_DROP_VO
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* Please Place Description here.
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* @var pkt_drop_ac::PKT_DROP_AC_LAST
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* Please Place Description here.
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* @var pkt_drop_ac::PKT_DROP_AC_MAX
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* Please Place Description here.
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* @var pkt_drop_ac::PKT_DROP_AC_INVALID
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* Please Place Description here.
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*/
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enum pkt_drop_ac {
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PKT_DROP_BE = WDE_DLE_QID_BE,
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PKT_DROP_BK = WDE_DLE_QID_BK,
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PKT_DROP_VI = WDE_DLE_QID_VI,
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PKT_DROP_VO = WDE_DLE_QID_VO,
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/* keep last */
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PKT_DROP_AC_LAST,
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PKT_DROP_AC_MAX = PKT_DROP_AC_LAST,
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PKT_DROP_AC_INVALID = PKT_DROP_AC_LAST,
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};
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/*--------------------Define MACRO----------------------------------*/
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#define VIRTUAL_ADDRESS_MAPPING(eng_sel, pkt_id, offset) \
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(0x00000000 | (((eng_sel) & 0x1) << 27) | \
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(((pkt_id) & 0xFFF) << 15) | ((offset) & 0xEFFF))
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#define GET_VIRTUAL_ADDRESS_WD(pkt_id, offset)\
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((((pkt_id) & 0xFFF) << 15) | ((offset) & 0xEFFF))
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/*--------------------Define Struct----------------------------------*/
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/**
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* @struct cpuio_buf_req_t
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* @brief cpuio_buf_req_t
|
*
|
* @var cpuio_buf_req_t::len
|
* Please Place Description here.
|
* @var cpuio_buf_req_t::pktid
|
* Please Place Description here.
|
*/
|
struct cpuio_buf_req_t {
|
// input
|
u16 len;
|
// output
|
u16 pktid;
|
};
|
|
/**
|
* @struct cpuio_ctrl_t
|
* @brief cpuio_ctrl_t
|
*
|
* @var cpuio_ctrl_t::pkt_num
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::start_pktid
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::end_pktid
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::cmd_type
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::macid
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::src_pid
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::src_qid
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::dst_pid
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::dst_qid
|
* Please Place Description here.
|
* @var cpuio_ctrl_t::pktid
|
* Please Place Description here.
|
*/
|
struct cpuio_ctrl_t {
|
// input
|
u16 pkt_num;
|
u16 start_pktid;
|
u16 end_pktid;
|
u8 cmd_type;
|
u8 macid;
|
u8 src_pid;
|
u8 src_qid;
|
u8 dst_pid;
|
u8 dst_qid;
|
// output
|
u16 pktid;
|
};
|
|
/**
|
* @struct deq_enq_info
|
* @brief deq_enq_info
|
*
|
* @var deq_enq_info::macid
|
* Please Place Description here.
|
* @var deq_enq_info::src_pid
|
* Please Place Description here.
|
* @var deq_enq_info::src_qid
|
* Please Place Description here.
|
* @var deq_enq_info::dst_pid
|
* Please Place Description here.
|
* @var deq_enq_info::dst_qid
|
* Please Place Description here.
|
* @var deq_enq_info::pktid
|
* Please Place Description here.
|
*/
|
struct deq_enq_info {
|
u8 macid;
|
u8 src_pid;
|
u8 src_qid;
|
u8 dst_pid;
|
u8 dst_qid;
|
u16 pktid;
|
};
|
|
/**
|
* @struct first_pid_info
|
* @brief first_pid_info
|
*
|
* @var first_pid_info::macid
|
* Please Place Description here.
|
* @var first_pid_info::src_pid
|
* Please Place Description here.
|
* @var first_pid_info::src_qid
|
* Please Place Description here.
|
* @var first_pid_info::pktid
|
* Please Place Description here.
|
*/
|
struct first_pid_info {
|
u8 macid;
|
u8 src_pid;
|
u8 src_qid;
|
u16 pktid;
|
};
|
|
/**
|
* @struct next_pid_info
|
* @brief next_pid_info
|
*
|
* @var next_pid_info::macid
|
* Please Place Description here.
|
* @var next_pid_info::src_pid
|
* Please Place Description here.
|
* @var next_pid_info::src_qid
|
* Please Place Description here.
|
* @var next_pid_info::start_pktid
|
* Please Place Description here.
|
* @var next_pid_info::pktid
|
* Please Place Description here.
|
*/
|
struct next_pid_info {
|
u8 macid;
|
u8 src_pid;
|
u8 src_qid;
|
u16 start_pktid;
|
u16 pktid;
|
};
|
|
/*--------------------Export global variable----------------------------*/
|
|
/*--------------------Function declaration-----------------------------*/
|
|
/**
|
* @addtogroup Firmware
|
* @{
|
* @addtogroup CPU_IO
|
* @{
|
*/
|
|
/**
|
* @brief deq_enq_all
|
*
|
* @param *adapter
|
* @param *info
|
* @return Please Place Description here.
|
* @retval u32
|
*/
|
u32 deq_enq_all(struct mac_ax_adapter *adapter, struct deq_enq_info *info);
|
/**
|
* @}
|
* @}
|
*/
|
|
/**
|
* @addtogroup Firmware
|
* @{
|
* @addtogroup CPU_IO
|
* @{
|
*/
|
|
/**
|
* @brief mac_dle_buf_req_wd
|
*
|
* @param *adapter
|
* @param *buf_req_p
|
* @return Please Place Description here.
|
* @retval u32
|
*/
|
u32 mac_dle_buf_req_wd(struct mac_ax_adapter *adapter,
|
struct cpuio_buf_req_t *buf_req_p);
|
/**
|
* @}
|
* @}
|
*/
|
|
/**
|
* @addtogroup Firmware
|
* @{
|
* @addtogroup CPU_IO
|
* @{
|
*/
|
|
/**
|
* @brief mac_dle_buf_req_pl
|
*
|
* @param *adapter
|
* @param *buf_req_p
|
* @return Please Place Description here.
|
* @retval u32
|
*/
|
u32 mac_dle_buf_req_pl(struct mac_ax_adapter *adapter,
|
struct cpuio_buf_req_t *buf_req_p);
|
/**
|
* @}
|
* @}
|
*/
|
|
/**
|
* @addtogroup Firmware
|
* @{
|
* @addtogroup CPU_IO
|
* @{
|
*/
|
|
/**
|
* @brief mac_set_cpuio_wd
|
*
|
* @param *adapter
|
* @param *ctrl_para_p
|
* @return Please Place Description here.
|
* @retval u32
|
*/
|
u32 mac_set_cpuio_wd(struct mac_ax_adapter *adapter,
|
struct cpuio_ctrl_t *ctrl_para_p);
|
/**
|
* @}
|
* @}
|
*/
|
|
/**
|
* @addtogroup Firmware
|
* @{
|
* @addtogroup CPU_IO
|
* @{
|
*/
|
|
/**
|
* @brief mac_set_cpuio_pl
|
*
|
* @param *adapter
|
* @param *ctrl_para_p
|
* @return Please Place Description here.
|
* @retval u32
|
*/
|
u32 mac_set_cpuio_pl(struct mac_ax_adapter *adapter,
|
struct cpuio_ctrl_t *ctrl_para_p);
|
/**
|
* @}
|
* @}
|
*/
|
|
/**
|
* @addtogroup Firmware
|
* @{
|
* @addtogroup CPU_IO
|
* @{
|
*/
|
|
/**
|
* @brief mac_wde_pkt_drop
|
*
|
* @param *adapter
|
* @param *info
|
* @return Please Place Description here.
|
* @retval u32
|
*/
|
u32 mac_wde_pkt_drop(struct mac_ax_adapter *adapter,
|
struct mac_ax_pkt_drop_info *info);
|
/**
|
* @}
|
* @}
|
*/
|
|
#endif
|
