/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#include "coex.h"
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#include "../mac_reg.h"
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#include "hw.h"
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#include "power_saving.h"
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#define MAC_AX_RTK_RATE 5
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#define MAC_AX_BT_MODE_0_3 0
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#define MAC_AX_BT_MODE_2 2
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#define MAC_AX_CSR_DELAY 0
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#define MAC_AX_CSR_PRI_TO 5
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#define MAC_AX_CSR_TRX_TO 4
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#define MAC_AX_CSR_RATE 80
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#define MAC_AX_SB_DRV_MSK 0xFFFFFF
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#define MAC_AX_SB_DRV_SH 0
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#define MAC_AX_SB_FW_MSK 0x7F
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#define MAC_AX_SB_FW_SH 24
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#define MAC_AX_BTGS1_NOTIFY BIT(0)
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u32 mac_cfg_plt(struct mac_ax_adapter *adapter, struct mac_ax_plt *plt)
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{
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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u32 reg, ret;
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u16 val;
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ret = check_mac_en(adapter, plt->band, MAC_AX_CMAC_SEL);
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if (ret)
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return ret;
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reg = plt->band == 0 ? R_AX_BT_PLT : R_AX_BT_PLT_C1;
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val = (plt->tx & MAC_AX_PLT_LTE_RX ? B_AX_TX_PLT_GNT_LTE_RX : 0) |
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(plt->tx & MAC_AX_PLT_GNT_BT_TX ? B_AX_TX_PLT_GNT_BT_TX : 0) |
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(plt->tx & MAC_AX_PLT_GNT_BT_RX ? B_AX_TX_PLT_GNT_BT_RX : 0) |
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(plt->tx & MAC_AX_PLT_GNT_WL ? B_AX_TX_PLT_GNT_WL : 0) |
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(plt->rx & MAC_AX_PLT_LTE_RX ? B_AX_RX_PLT_GNT_LTE_RX : 0) |
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(plt->rx & MAC_AX_PLT_GNT_BT_TX ? B_AX_RX_PLT_GNT_BT_TX : 0) |
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(plt->rx & MAC_AX_PLT_GNT_BT_RX ? B_AX_RX_PLT_GNT_BT_RX : 0) |
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(plt->rx & MAC_AX_PLT_GNT_WL ? B_AX_RX_PLT_GNT_WL : 0) |
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B_AX_PLT_EN;
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#if MAC_AX_FW_REG_OFLD
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if (adapter->sm.fwdl == MAC_AX_FWDL_INIT_RDY) {
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ret = MAC_REG_W_OFLD((u16)reg,
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B_AX_TX_PLT_GNT_LTE_RX |
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B_AX_TX_PLT_GNT_BT_TX |
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B_AX_TX_PLT_GNT_BT_RX |
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B_AX_TX_PLT_GNT_WL |
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B_AX_RX_PLT_GNT_LTE_RX |
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B_AX_RX_PLT_GNT_BT_TX |
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B_AX_RX_PLT_GNT_BT_RX |
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B_AX_RX_PLT_GNT_WL,
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val, 1);
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if (ret != MACSUCCESS)
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PLTFM_MSG_ERR("%s: write offload fail %d",
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__func__, ret);
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return ret;
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}
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#endif
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MAC_REG_W16(reg, val);
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return MACSUCCESS;
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}
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void mac_cfg_sb(struct mac_ax_adapter *adapter, u32 val)
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{
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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u32 fw_sb;
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fw_sb = MAC_REG_R32(R_AX_SCOREBOARD);
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fw_sb = GET_FIELD(fw_sb, MAC_AX_SB_FW);
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fw_sb = fw_sb & ~MAC_AX_BTGS1_NOTIFY;
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if (adapter->sm.pwr == MAC_AX_PWR_OFF || _is_in_lps(adapter))
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fw_sb = fw_sb | MAC_AX_NOTIFY_PWR_MAJOR;
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else
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fw_sb = fw_sb | MAC_AX_NOTIFY_TP_MAJOR;
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val = GET_FIELD(val, MAC_AX_SB_DRV);
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val = B_AX_TOGGLE |
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SET_WORD(val, MAC_AX_SB_DRV) |
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SET_WORD(fw_sb, MAC_AX_SB_FW);
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MAC_REG_W32(R_AX_SCOREBOARD, val);
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}
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u32 mac_get_bt_polt_cnt(struct mac_ax_adapter *adapter,
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struct mac_ax_bt_polt_cnt *cnt)
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{
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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u32 offset = cnt->band ? R_AX_BT_PLT_C1 : R_AX_BT_PLT;
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u8 val;
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cnt->cnt = MAC_REG_R16(offset + 2);
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val = MAC_REG_R8(offset + 1);
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MAC_REG_W8(offset + 1, val | BIT(1));
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return MACSUCCESS;
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}
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