/******************************************************************************
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*
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* Copyright(c) 2007 - 2021 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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/***** temporarily flag for IC development phase *******/
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#define CONFIG_SINGLE_IMG
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/*#define CONFIG_NO_FW*/
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/*#define CONFIG_DISABLE_ODM*/
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#define CONFIG_MSG_NUM 128
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#define RTW_WKARD_CORE_RSSI_V1
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#ifdef RTW_WKARD_CORE_RSSI_V1
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#define CONFIG_RX_PSTS_PER_PKT
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#define CONFIG_SIGNAL_STAT_PROCESS
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#endif
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#ifndef DBG_MEM_ALLOC
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#define DBG_MEM_ALLOC
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#define DBG_PHL_MEM_ALLOC
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#define DBG_HAL_MAC_MEM_MOINTOR
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#define DBG_HAL_MEM_MOINTOR
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#endif
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/*#define CONFIG_PHL_USE_KMEM_ALLOC*/
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#define CONFIG_HW_RTS
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/*
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* Work around Config
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*/
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#define RTW_WKARD_DIS_PROBE_REQ_RPT_TO_HOSTAPD
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#define CONFIG_WKARD_ULMU
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#ifdef CONFIG_BTC
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#define RTK_WKARD_CORE_BTC_STBC_CAP
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#endif
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#define RTW_WKARD_PCI_DEVRM_DIS_INT
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#define RTW_WKARD_TX_DROP
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/***** temporarily flag *******/
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/*
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* Public General Config
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*/
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#define AUTOCONF_INCLUDED
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#define DRV_NAME "rtl8852be"
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#define CONFIG_PCI_HCI
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#define CONFIG_PCIE_TRX_MIT
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#ifdef CONFIG_PCIE_TRX_MIT
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#define PCIE_RX_INT_MIT_TIMER 4096
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/*#define CONFIG_PCIE_TRX_MIT_FIX*/ /* if defined, the mitigation mode will be set to fixed */
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#ifndef CONFIG_PCIE_TRX_MIT_FIX
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#define CONFIG_PCIE_TRX_MIT_DYN
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#endif
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#endif
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#define CORE_TXBD_NUM 256
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#define CORE_RXBD_NUM 256
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#define CONFIG_RPQ_AGG_NUM 30
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#define CONFIG_TX_WD_NUM 512 /* if not defined, use phl default wd num: MAX_WD_PAGE_NUM (i.e. 256) */
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#define CORE_TX_AMSDU_AGG_NUM 3
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#define CONFIG_READ_TXBD_LVL 1
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#ifdef PLAT_MAX_PHL_TX_RING_ENTRY_NUM
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#define MAX_PHL_TX_RING_ENTRY_NUM PLAT_MAX_PHL_TX_RING_ENTRY_NUM
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#else
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#define MAX_PHL_TX_RING_ENTRY_NUM 512
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#endif
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#ifdef PLAT_MAX_PHL_RX_RING_ENTRY_NUM
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#define MAX_PHL_RX_RING_ENTRY_NUM PLAT_MAX_PHL_RX_RING_ENTRY_NUM
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#else
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#define MAX_PHL_RX_RING_ENTRY_NUM 1024
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#endif
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#define CONFIG_RTW_REDUCE_MEM /* Note: if CONFIG_RTW_REDUCE_MEM is not defined, MAX_PHL_RX_RING_ENTRY_NUM have no effect. */
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#ifdef CONFIG_RTW_REDUCE_MEM
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/* #define REDUCE_MEM_LV1 */ /* 4.8M */
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/* #define REDUCE_MEM_LV2 */ /* 4M */
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/* #define REDUCE_MEM_LV3 */ /* 7.5M */
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#ifdef REDUCE_MEM_LV1
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#undef CORE_RXBUF_NUM
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#define CORE_RXBUF_NUM 448
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#define CORE_RXBUF_SIZE 4096
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#define MAX_ASMDU_LEN 0
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#define NR_XMITFRAME 64
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#define MAX_TX_RING_NUM 64
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#elif defined (REDUCE_MEM_LV2)
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#undef CORE_RXBUF_NUM
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#define CORE_RXBUF_NUM 480
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#define CORE_RXBUF_SIZE 4096
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#define MAX_ASMDU_LEN 0
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#define NR_XMITFRAME 64
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#define MAX_TX_RING_NUM 64
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#undef CONFIG_TX_WD_NUM
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#define CONFIG_TX_WD_NUM 64
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#elif defined (REDUCE_MEM_LV3)
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#undef CORE_RXBUF_NUM
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#define CORE_RXBUF_NUM 576
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#define CORE_RXBUF_SIZE 8192
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#define MAX_ASMDU_LEN 1
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#define NR_XMITFRAME 64
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#define MAX_TX_RING_NUM 64
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#else
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#ifdef PLAT_RXBUF_NUM
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#define CORE_RXBUF_NUM PLAT_RXBUF_NUM
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#else
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#define CORE_RXBUF_NUM 1024
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#endif
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#define CORE_RXBUF_SIZE 8192
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#define MAX_ASMDU_LEN 1
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/* HT - 0: 3839, 1: 7935 octets - Maximum A-MSDU Length
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* VHT - 0: 3895, 1: 7991, 2:11454 octets - Maximum MPDU Length
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*/
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#ifdef PLAT_NR_XMITFRAME
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#define NR_XMITFRAME PLAT_NR_XMITFRAME
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#else
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#define NR_XMITFRAME 512
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#endif
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#ifdef PLAT_MAX_TX_RING_NUM
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#define MAX_TX_RING_NUM PLAT_MAX_TX_RING_NUM
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#else
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#define MAX_TX_RING_NUM 512
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#endif
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#endif
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#define CORE_RPBUF_SIZE 192 /* 192: up to 42 agg num */
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#define CORE_RPBD_NUM 64
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#define CORE_RPBUF_NUM (CORE_RPBD_NUM + 32)
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#define RTW_MAX_FRAG_NUM 1
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/* Tx WD use continuous memory pool */
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#define RTW_WD_PAGE_USE_SHMEM_POOL
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#define CONFIG_FW_SPECIFY_FROM_CORE
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#ifdef CONFIG_FW_SPECIFY_FROM_CORE
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#define MAC_FW_8852B_U2
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#define MAC_FW_8852B_U3
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/* #define MAC_FW_CATEGORY_NIC */ /* with pwr gating */
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#define MAC_FW_CATEGORY_NICCE /* with clock gating */
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/* #define MAC_FW_CATEGORY_NIC_PLE */
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#ifdef CONFIG_WOWLAN
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#define MAC_FW_CATEGORY_WOWLAN
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#endif /* CONFIG_WOWLAN */
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#endif
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#else /* !CONFIG_RTW_REDUCE_MEM */
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#define CORE_RXBUF_SIZE 11460
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#define CORE_RXBUF_NUM 512
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#define CORE_RPBUF_SIZE 11460
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#define CORE_RPBD_NUM 256
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#define CORE_RPBUF_NUM 1024
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#endif /* CONFIG_RTW_REDUCE_MEM */
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/*
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* Wi-Fi Functions Config
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*/
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/*#define CONFIG_RECV_REORDERING_CTRL*/
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#define CONFIG_80211N_HT
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#define CONFIG_80211AC_VHT
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#define CONFIG_80211AX_HE
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#ifdef CONFIG_80211AC_VHT
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#ifndef CONFIG_80211N_HT
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#define CONFIG_80211N_HT
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#endif
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#endif
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#ifdef CONFIG_80211AX_HE
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#ifndef CONFIG_80211N_HT
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#define CONFIG_80211N_HT
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#endif
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#ifndef CONFIG_80211AC_VHT
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#define CONFIG_80211AC_VHT
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#endif
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#endif
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#define CONFIG_BEAMFORMING
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#ifdef CONFIG_BEAMFORMING
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/*#define RTW_WKARD_TX_DISABLE_BFEE*/
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#endif
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/*#define CONFIG_IOCTL_CFG80211*/
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#ifdef CONFIG_IOCTL_CFG80211
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/*#define RTW_USE_CFG80211_STA_EVENT*/ /* Indecate new sta asoc through cfg80211_new_sta */
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#define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER
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/*#define CONFIG_DEBUG_CFG80211*/
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#define CONFIG_SET_SCAN_DENY_TIMER
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#endif
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#define CONFIG_TX_AMSDU
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#ifdef CONFIG_TX_AMSDU
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#ifdef CONFIG_PLATFORM_RTL8198D
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#define CONFIG_TX_AMSDU_HW_MODE 1
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#else
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#define CONFIG_TX_AMSDU_SW_MODE 1
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#endif
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#endif
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/*
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* Internal General Config
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*/
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/*#define CONFIG_PWRCTRL*/
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#define CONFIG_TRX_BD_ARCH /* PCI only */
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#define USING_RX_TAG
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#define CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_EMBEDDED_FWIMG
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#define LOAD_FW_HEADER_FROM_DRIVER
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#endif
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/*#define CONFIG_FILE_FWIMG*/
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#define CONFIG_XMIT_ACK
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#ifdef CONFIG_XMIT_ACK
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#define CONFIG_XMIT_ACK_BY_REL_RPT
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/*#define CONFIG_XMIT_ACK_BY_REL_RPT_DBG*/
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#define CONFIG_ACTIVE_KEEP_ALIVE_CHECK
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#define RTW_WKARD_TX_NULL_WD_RP
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#endif
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#define BUF_DESC_ARCH /* if defined, hardware follows Rx buffer descriptor architecture */
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#ifdef CONFIG_POWER_SAVE
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/* #define CONFIG_RTW_IPS */
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#define CONFIG_RTW_LPS
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#ifdef CONFIG_RTW_IPS
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#define CONFIG_FWIPS
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#endif
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#if defined(CONFIG_RTW_IPS) || defined(CONFIG_RTW_LPS)
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#define CONFIG_PS_FW_DBG
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#endif
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#ifdef CONFIG_WOWLAN
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#define CONFIG_RTW_IPS_WOW
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#ifdef CONFIG_RTW_IPS_WOW
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#define CONFIG_FWIPS_WOW
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#endif /* CONFIG_RTW_IPS_WOW */
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#define CONFIG_RTW_LPS_WOW
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#endif /* CONFIG_WOWLAN */
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#ifdef CONFIG_RTW_LPS
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#define CONFIG_RTW_LPS_DEFAULT_OFF
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#endif
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/* #define CONFIG_HW_RADIO_ONOFF_DETECT */
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#endif /* CONFIG_POWER_SAVE */
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#ifdef CONFIG_WOWLAN
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#define CONFIG_GTK_OL
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/* #define CONFIG_ARP_KEEP_ALIVE */
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#endif /* CONFIG_WOWLAN */
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/*#define CONFIG_ANTENNA_DIVERSITY*/
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#ifdef CONFIG_GPIO_WAKEUP
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#ifndef WAKEUP_GPIO_IDX
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#define WAKEUP_GPIO_IDX 12 /* WIFI Chip Side */
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#endif /*!WAKEUP_GPIO_IDX*/
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#endif /* CONFIG_GPIO_WAKEUP */
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/*#define CONFIG_PCI_ASPM*/
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#ifdef CONFIG_PCI_ASPM
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#define CONFIG_PCI_DYNAMIC_ASPM
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#endif
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#define CONFIG_AP_MODE
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#ifdef CONFIG_AP_MODE
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#define CONFIG_NATIVEAP_MLME
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#ifndef CONFIG_NATIVEAP_MLME
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#define CONFIG_HOSTAPD_MLME
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#endif
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/*#define CONFIG_RTW_HOSTAPD_ACS*/
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/*#define CONFIG_FIND_BEST_CHANNEL*/
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/*#define CONFIG_AUTO_AP_MODE*/
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#endif
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#define CONFIG_P2P
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#ifdef CONFIG_P2P
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/* The CONFIG_WFD is for supporting the Wi-Fi display */
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#define CONFIG_WFD
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#define CONFIG_P2P_REMOVE_GROUP_INFO
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/*#define CONFIG_DBG_P2P*/
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#define CONFIG_P2P_PS
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/*#define CONFIG_P2P_IPS*/
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#define CONFIG_P2P_OP_CHK_SOCIAL_CH
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#define CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT /* replace CONFIG_P2P_CHK_INVITE_CH_LIST flag */
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/*#define CONFIG_P2P_INVITE_IOT*/
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#endif
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/* Added by Kurt 20110511 */
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#ifdef CONFIG_TDLS
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#define CONFIG_TDLS_DRIVER_SETUP
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#if 0
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#ifndef CONFIG_WFD
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#define CONFIG_WFD
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#endif
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#define CONFIG_TDLS_AUTOSETUP
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#endif
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#define CONFIG_TDLS_AUTOCHECKALIVE
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/*
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* Enable "CONFIG_TDLS_CH_SW" by default,
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* however limit it to only work in wifi logo test mode
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* but not in normal mode currently
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*/
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#define CONFIG_TDLS_CH_SW
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#endif
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#define CONFIG_SKB_COPY /* for amsdu */
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/*#define CONFIG_RTW_LED*/
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#ifdef CONFIG_RTW_LED
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/*#define CONFIG_RTW_SW_LED*/
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#ifdef CONFIG_RTW_SW_LED
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/*#define CONFIG_RTW_LED_HANDLED_BY_CMD_THREAD*/
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#endif
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#endif /* CONFIG_RTW_LED */
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#define CONFIG_GLOBAL_UI_PID
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/*#define CONFIG_ADAPTOR_INFO_CACHING_FILE*/ /* now just applied on 8192cu only, should make it general...*/
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/*#define CONFIG_RESUME_IN_WORKQUEUE*/
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/*#define CONFIG_SET_SCAN_DENY_TIMER*/
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#define CONFIG_LONG_DELAY_ISSUE
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/*#define CONFIG_SIGNAL_DISPLAY_DBM*/ /* display RX signal with dbm */
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#ifdef CONFIG_SIGNAL_DISPLAY_DBM
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/*#define CONFIG_BACKGROUND_NOISE_MONITOR*/
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#endif
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/*
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* Software feature Related Config
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*/
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#define CONFIG_SCAN_BACKOP_STA
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/* #define CONFIG_RTW_CSI_CHANNEL_INFO */
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#ifdef CONFIG_RTW_CSI_CHANNEL_INFO
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#define CONFIG_RTW_CSI_NETLINK
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#define CONFIG_CSI_TIMER_POLLING
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#endif
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/*
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* Interface Related Config
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*/
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/* #define CONFIG_RTW_FORCE_PCI_MSI_DISABLE */
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/* #define CONFIG_64BIT_DMA */
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/*
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* HAL Related Config
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*/
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#define CONFIG_RX_PACKET_APPEND_FCS
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#define DISABLE_BB_RF 0
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#ifdef CONFIG_MP_INCLUDED
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#define MP_DRIVER 1
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#else
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#define MP_DRIVER 0
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#endif
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#ifndef EFUSE_MAP_PATH
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#define EFUSE_MAP_PATH "/system/etc/wifi/wifi_efuse.map"
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#endif
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#ifndef WIFIMAC_PATH
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#define WIFIMAC_PATH "/data/wifimac.txt"
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#endif
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/* Use cmd frame to issue beacon. Use a fixed buffer for beacon. */
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#define CONFIG_BCN_ICF
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#ifdef CONFIG_HWSIM
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/* Use pure sw beacon */
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#undef CONFIG_BCN_ICF
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#endif
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/* #define RTL8814BE_AMPDU_PRE_TX_OFF */
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/*
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* Platform Related Config
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*/
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/* #define CONFIG_TX_EARLY_MODE */
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/*
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* Debug Related Config
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*/
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#define DBG 1
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/*#define DBG_CONFIG_ERROR_DETECT*/
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/* #define DBG_CONFIG_ERROR_DETECT_INT */
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/* #define DBG_CONFIG_ERROR_RESET */
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/* #define DBG_IO */
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/* #define DBG_DELAY_OS */
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/* #define DBG_MEM_ALLOC */
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/* #define DBG_IOCTL */
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/* #define DBG_TX */
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/* #define DBG_XMIT_BUF */
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/* #define DBG_XMIT_BUF_EXT */
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/* #define DBG_TX_DROP_FRAME */
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/* #define DBG_RX_DROP_FRAME */
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/* #define DBG_RX_SEQ */
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/* #define DBG_RX_SIGNAL_DISPLAY_PROCESSING */
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/* #define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap" */
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/* #define DBG_ROAMING_TEST */
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/* #define DBG_HAL_INIT_PROFILING */
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/*#define DBG_MEMORY_LEAK*/
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/* #define CONFIG_FW_C2H_DEBUG */
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#define CONFIG_DBG_COUNTER
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#define DBG_RX_DFRAME_RAW_DATA
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/*#define DBG_TXBD_DESC_DUMP*/
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#define CONFIG_PCI_BCN_POLLING
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//#define RTW_PHL_TEST_FPGA //For 8852A PCIE FPGA TEST
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#define CONFIG_RTW_NORMAL_DMA
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/* #define CONFIG_RTW_SECURE_DMA */
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/* #define CONFIG_RTW_SWIOTLB_DMA */
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#if defined(CONFIG_RTW_SECURE_DMA) || defined(CONFIG_RTW_SWIOTLB_DMA)
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#undef CONFIG_RTW_NORMAL_DMA
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#endif
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#ifdef CONFIG_RTW_NORMAL_DMA
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/* #define CONFIG_TX_REQ_NONCACHE_ADDR */
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#define CONFIG_TXBD_NONCACHE_ADDR
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#define CONFIG_TX_PKT_NONCACHE_ADDR
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/* #define CONFIG_RX_BUFF_NONCACHE_ADDR */
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#define CONFIG_RXBD_NONCACHE_ADDR
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/* #define CONFIG_WD_PAGE_NONCACHE_ADDR */
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/* #define CONFIG_WD_WORK_RING_NONCACHE_ADDR */
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/* #define CONFIG_H2C_NONCACHE_ADDR */
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#elif defined (CONFIG_RTW_SECURE_DMA)
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#define CONFIG_TX_REQ_NONCACHE_ADDR
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#define CONFIG_TXBD_NONCACHE_ADDR
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#define CONFIG_TX_PKT_NONCACHE_ADDR
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#define CONFIG_RX_BUFF_NONCACHE_ADDR
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#define CONFIG_RXBD_NONCACHE_ADDR
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#define CONFIG_WD_PAGE_NONCACHE_ADDR
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#define CONFIG_WD_WORK_RING_NONCACHE_ADDR
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#define CONFIG_H2C_NONCACHE_ADDR
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#elif defined (CONFIG_RTW_SWIOTLB_DMA)
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/* #define CONFIG_TX_REQ_NONCACHE_ADDR */
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/* #define CONFIG_TXBD_NONCACHE_ADDR */
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/* #define CONFIG_TX_PKT_NONCACHE_ADDR */
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/* #define CONFIG_RX_BUFF_NONCACHE_ADDR */
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/* #define CONFIG_RXBD_NONCACHE_ADDR */
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/* #define CONFIG_WD_PAGE_NONCACHE_ADDR */
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#define CONFIG_WD_WORK_RING_NONCACHE_ADDR
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#define CONFIG_H2C_NONCACHE_ADDR
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#else
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#error "Wrong DMA mode"
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#endif
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#if !defined(CONFIG_DIS_DYN_RXBUF) && !defined(CONFIG_RX_BUFF_NONCACHE_ADDR)
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#define CONFIG_DYNAMIC_RX_BUF
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#endif
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#if defined(CONFIG_DIS_DYN_RXBUF) && !defined(CONFIG_RX_BUFF_NONCACHE_ADDR)
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#define CONFIG_RTW_RXSKB_KMALOC
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#endif
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#ifndef CONFIG_WD_PAGE_NONCACHE_ADDR
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#define RTW_WD_PAGE_USE_SHMEM_POOL
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#endif
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#ifdef CONFIG_RTW_SECURE_DMA
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/* #define CONFIG_RTW_DEDICATED_CMA_POOL */
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#endif
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/*#define CONFIG_RTW_BTM_ROAM*/
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/*#define CONFIG_RTW_80211R*/
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#ifdef CONFIG_RTW_MBO
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#ifndef CONFIG_RTW_WNM
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#define CONFIG_RTW_WNM
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#endif
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#ifndef CONFIG_RTW_80211K
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#define CONFIG_RTW_80211K
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#endif
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#endif /* CONFIG_RTW_MBO */
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/* TRx Thread mode setting */
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/* #define CONFIG_RTW_TX_HDL_USE_THREAD */
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/* #define CONFIG_RTW_RX_HDL_USE_THREAD */
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/* #define CONFIG_RTW_RX_EVENT_USE_THREAD */
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/* Separate TRX path into different CPUs */
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/* Note: if CPU balance is enabled, thread mode setting will be invalid.*/
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/*#define CONFIG_CPU_BALANCE*/
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#ifdef CONFIG_CPU_BALANCE
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#define CONFIG_RTW_TX_HDL_USE_WQ /* TX Handler Workqueue */
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/*#define CONFIG_RTW_TX_AMSDU_USE_WQ*/ /* TX AMSDU Handler Workqueue */
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/*#define CONFIG_RTW_RX_HDL_USE_WQ*/ /* RX Handler Workqueue */
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/*#define CONFIG_RTW_EVENT_HDL_USE_WQ*/ /* EVENT Handler Workqueue */
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/*#define CONFIG_CPU_SPECIFIC*/
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#ifdef CONFIG_CPU_SPECIFIC /* Specific CPU */
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#define CPU_ID_TX_HDL 1 /* bound to CPU1 */
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#define CPU_ID_TX_AMSDU 3 /* bound to CPU3 */
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#define CPU_ID_RX_HDL 0 /* bound to CPU0 */
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#define CPU_ID_EVENT_HDL 2 /* bound to CPU2 */
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#else /* not bound to any CPU, prefer the local CPU */
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#define CPU_ID_TX_HDL WORK_CPU_UNBOUND
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#define CPU_ID_TX_AMSDU WORK_CPU_UNBOUND
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#define CPU_ID_RX_HDL WORK_CPU_UNBOUND
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#define CPU_ID_EVENT_HDL WORK_CPU_UNBOUND
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#endif
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#endif
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/* Use workqueue highpri to handle phl_handler */
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/*#define CONFIG_PHL_HANDLER_WQ_HIGHPRI*/
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#ifdef CONFIG_CPU_BALANCE
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#undef CONFIG_PHL_HANDLER_WQ_HIGHPRI
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#endif
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/* Alignment to improve memcpy efficiency */
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/*#define CONFIG_RTW_RX_SKB_DATA_ALIGNMENT*/
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/* NEON mode to improve performance */
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#if defined(CONFIG_RTW_RX_SKB_DATA_ALIGNMENT) && defined(CONFIG_CPU_BALANCE)
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/*#define CONFIG_RTW_NEON_MODE*/
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#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 12, 0))
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#undef CONFIG_RTW_NEON_MODE
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#endif
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#endif
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|
#ifdef RTW_PHL_TEST_FPGA
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#ifndef RTW_PHL_TX
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#define RTW_PHL_TX
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#endif
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#ifndef RTW_PHL_RX
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#define RTW_PHL_RX
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#endif
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#ifndef DIRTY_FOR_WORK
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#define DIRTY_FOR_WORK
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#endif
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#ifndef CONFIG_DYNAMIC_RX_BUF
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#define CONFIG_DYNAMIC_RX_BUF
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#endif
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#ifndef RTW_PHL_DBG_CMD
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#define RTW_PHL_DBG_CMD
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#endif
|
#ifndef CONFIG_DRV_FAKE_AP
|
#error "Please enable CONFIG_DRV_FAKE_AP in Makefile before Beacon ready\n"
|
#endif
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#ifndef RTW_PHL_FWDL
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#define RTW_PHL_FWDL
|
#endif
|
|
#ifdef CONFIG_RTW_NAPI
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#undef CONFIG_RTW_NAPI
|
#endif
|
#ifdef CONFIG_RTW_GRO
|
#undef CONFIG_RTW_GRO
|
#endif
|
#ifdef CONFIG_RTW_NETIF_SG
|
#undef CONFIG_RTW_NETIF_SG
|
#endif
|
|
#if 1
|
#define DBGP(fmt, args...) printk("dbg [%s][%d]"fmt, __FUNCTION__, __LINE__, ## args)
|
#else
|
#define DBGP(arg...) do {} while (0)
|
#endif
|
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#else //RTW_PHL_TEST_FPGA
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#define DBGP(arg...) do {} while (0)
|
|
#endif
|
|
/* Platform dependent config, shall put on the bottom of this file */
|
#ifdef CONFIG_PLATFORM_RTL8198D
|
#include "autoconf_mips_98d.h"
|
#endif
|
|
/* Platform dependent config, shall put on the bottom of this file */
|
#ifdef CONFIG_I386_BUILD_VERIFY
|
#include "autoconf_i386_ap_func.h"
|
#endif
|
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#ifdef CONFIG_ARCH_CORTINA
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#include "autoconf_arm_9617b.h"
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#endif /* CONFIG_ARCH_CORTINA */
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