/* SPDX-License-Identifier: GPL-2.0 */
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/******************************************************************************
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*
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* Copyright(c) 2016 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _RTL8821CS_IO_C_
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#include <drv_types.h> /* PADAPTER and etc. */
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#include <hal_data.h> /* HAL_DATA_TYPE */
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#include <rtw_sdio.h> /* rtw_sdio_write_cmd53() */
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#include <sdio_ops_linux.h> /* SDIO_ERR_VAL8 and etc. */
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#include "rtl8821cs.h" /* rtl8821cs_get_interrupt(), rtl8821cs_clear_interrupt() */
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#include "rtl8821cs_recv.h" /* rtl8821cs_rxhandler() */
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#include "../../hal_halmac.h" /* rtw_halmac_sdio_get_rx_addr and etc. */
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/*#define SDIO_DEBUG_IO 1*/
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/*
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* For Core I/O API
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*/
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static u8 sdio_f0_read8(struct intf_hdl *pintfhdl, u32 addr)
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{
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struct dvobj_priv *d;
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u8 val = 0;
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u8 ret;
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d = pintfhdl->pintf_dev;
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ret = rtw_sdio_f0_read(d, addr, &val, 1);
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if (_FAIL == ret)
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RTW_ERR("%s: Read f0 register(0x%x) FAIL!\n",
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__FUNCTION__, addr);
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return val;
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}
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/*
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* Description:
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* Read from RX FIFO
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* Round read size to block size,
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* and make sure data transfer will be done in one command.
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*
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* Parameters:
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* pintfhdl a pointer of intf_hdl
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* addr port ID
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* cnt size to read
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* mem address to put data
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*
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* Return:
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* _SUCCESS(1) Success
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* _FAIL(0) Fail
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*/
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/* #define CONFIG_NEW_SDIO_RP_FUNC*/ /*will cause system crash*/
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#ifdef CONFIG_NEW_SDIO_RP_FUNC
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static s32 _sdio_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *mem)
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{
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struct dvobj_priv *d;
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PHAL_DATA_TYPE hal;
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u32 rxaddr;
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size_t buflen;
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u32 ret;
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d = pintfhdl->pintf_dev;
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hal = GET_HAL_DATA(pintfhdl->padapter);
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cnt = _RND4(cnt);
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rxaddr = rtw_halmac_sdio_get_rx_addr(d, &hal->SdioRxFIFOCnt);
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/* align size to guarantee I/O would be done in one command */
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buflen = rtw_sdio_cmd53_align_size(d, cnt);
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if (buflen >= (MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ)) {
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RTW_INFO("%s [ERROR] buflen(%zu) > skb_len(%d), may cause memory overwrite\n"
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, __func__, buflen, (MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ));
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rtw_warn_on(1);
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buflen = MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ;
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}
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ret = rtw_sdio_read_cmd53(d, rxaddr, mem, buflen);
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return ret;
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}
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#else
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static u32 _sdio_read_port(
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struct intf_hdl *pintfhdl,
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u32 addr,
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u32 cnt,
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u8 *mem)
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{
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struct dvobj_priv *d = pintfhdl->pintf_dev;
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PADAPTER padapter = pintfhdl->padapter;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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s32 err;
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addr = rtw_halmac_sdio_get_rx_addr(d, &pHalData->SdioRxFIFOCnt);
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cnt = _RND4(cnt);
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cnt = rtw_sdio_cmd53_align_size(d, cnt);
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err = _sd_read(pintfhdl, addr, cnt, mem);
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/*err = sd_read(pintfhdl, addr, cnt, mem);*/
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if (err)
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return _FAIL;
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return _SUCCESS;
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}
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#endif
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/*
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* Description:
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* Read from RX FIFO
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* Round read size to block size,
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* and make sure data transfer will be done in one command.
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*
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* Parameters:
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* pintfhdl a pointer of intf_hdl
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* addr port ID
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* cnt size to read
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* mem struct recv_buf*
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*
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* Return:
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* _SUCCESS(1) Success
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* _FAIL(0) Fail
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*/
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static u32 sdio_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *mem)
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{
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return _sdio_read_port(pintfhdl, addr, cnt, mem);
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#if 0
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RTW_INFO("SDIO can not handle recvbuf->pbuf\n");
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rtw_warn_on(1);
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return _FALSE;
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struct recv_buf *recvbuf;
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recvbuf = (struct recv_buf *)mem;
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return _sdio_read_port(pintfhdl, addr, cnt, recvbuf->pbuf);
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#endif
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}
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/*
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* Description:
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* Write to TX FIFO
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* Align write size to block size,
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* and check enough FIFO size to write.
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*
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* Parameters:
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* d a pointer of dvobj_priv
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* addr not use
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* cnt size to write
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* mem buffer to write
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*
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* Return:
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* _SUCCESS(1) Success
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* _FAIL(0) Fail
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*/
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u32 rtl8821cs_write_port(struct dvobj_priv *d, u32 cnt, u8 *mem)
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{
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u32 txaddr, txsize;
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u32 ret = _FAIL;
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cnt = _RND4(cnt);
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txaddr = rtw_halmac_sdio_get_tx_addr(d, mem, cnt);
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if (!txaddr)
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goto exit;
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/* align size to guarantee I/O would be done in one command */
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txsize = rtw_sdio_cmd53_align_size(d, cnt);
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ret = rtw_sdio_write_cmd53(d, txaddr, mem, txsize);
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exit:
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return ret;
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}
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#ifdef CONFIG_NEW_SDIO_WP_FUNC
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/*
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* Description:
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* Write to TX FIFO
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* Align write size to block size,
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* and check enough FIFO size to write.
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*
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* Parameters:
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* pintfhdl a pointer of intf_hdl
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* addr not use
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* cnt size to write
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* mem struct xmit_buf*
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*
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* Return:
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* _SUCCESS(1) Success
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* _FAIL(0) Fail
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*/
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static u32 sdio_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *mem)
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{
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struct dvobj_priv *d;
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PADAPTER adapter;
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struct xmit_buf *xmitbuf;
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u32 txaddr, txsize;
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u32 ret = _FAIL;
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d = pintfhdl->pintf_dev;
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adapter = pintfhdl->padapter;
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xmitbuf = (struct xmit_buf *)mem;
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#if 0 /* who will call this when hardware not be initialized? */
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if (!rtw_is_hw_init_completed(adapter)) {
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RTW_INFO("%s [addr=0x%x cnt=%d] adapter->hw_init_completed == _FALSE\n",
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__FUNCTION__, addr, cnt);
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goto exit;
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}
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#endif
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ret = rtl8821cs_write_port(d, cnt, xmitbuf->pdata);
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rtw_sctx_done_err(&xmitbuf->sctx,
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(_FAIL == ret) ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS);
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return ret;
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}
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#else
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static u32 sdio_write_port(
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struct intf_hdl *pintfhdl,
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u32 addr,
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u32 cnt,
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u8 *mem)
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{
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PADAPTER padapter;
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s32 err;
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struct xmit_buf *xmitbuf = (struct xmit_buf *)mem;
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padapter = pintfhdl->padapter;
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if (!rtw_is_hw_init_completed(padapter)) {
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RTW_INFO("%s [addr=0x%x cnt=%d] padapter->hw_init_completed == _FALSE\n", __func__, addr, cnt);
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return _FAIL;
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}
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cnt = _RND4(cnt);
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addr = rtw_halmac_sdio_get_tx_addr(adapter_to_dvobj(padapter), xmitbuf->pdata, cnt);
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if (!addr) {
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RTW_ERR("%s, addr error=%d\n", __func__, addr);
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return _FAIL;
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}
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cnt = rtw_sdio_cmd53_align_size(adapter_to_dvobj(padapter), cnt);
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err = sd_write(pintfhdl, addr, cnt, xmitbuf->pdata);
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rtw_sctx_done_err(&xmitbuf->sctx,
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err ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS);
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if (err) {
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RTW_ERR("%s, error=%d\n", __func__, err);
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return _FAIL;
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}
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return _SUCCESS;
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}
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#endif
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void sdio_set_intf_ops(PADAPTER adapter, struct _io_ops *pops)
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{
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pops->_read8 = rtw_halmac_read8;
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pops->_read16 = rtw_halmac_read16;
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pops->_read32 = rtw_halmac_read32;
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pops->_read_mem = rtw_halmac_read_mem;
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pops->_read_port = sdio_read_port;
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pops->_write8 = rtw_halmac_write8;
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pops->_write16 = rtw_halmac_write16;
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pops->_write32 = rtw_halmac_write32;
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pops->_writeN = NULL;
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pops->_write_mem = NULL;
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pops->_write_port = sdio_write_port;
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pops->_sd_f0_read8 = sdio_f0_read8;
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#ifdef CONFIG_SDIO_INDIRECT_ACCESS
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pops->_sd_iread8 = rtw_halmac_iread8;
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pops->_sd_iread16 = rtw_halmac_iread16;
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pops->_sd_iread32 = rtw_halmac_iread32;
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pops->_sd_iwrite8 = rtw_halmac_write8;
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pops->_sd_iwrite16 = rtw_halmac_write16;
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pops->_sd_iwrite32 = rtw_halmac_write32;
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#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
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}
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#ifdef CONFIG_SDIO_RX_COPY
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static u32 sd_recv_rxfifo(PADAPTER padapter, u32 size, struct recv_buf **recvbuf_ret)
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{
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u32 readsize, ret = _SUCCESS;
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u8 *preadbuf;
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struct recv_priv *precvpriv;
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struct recv_buf *precvbuf;
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*recvbuf_ret = NULL;
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readsize = size;
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if (readsize > MAX_RECVBUF_SZ) {
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RTW_ERR(FUNC_ADPT_FMT" %u\n", FUNC_ADPT_ARG(padapter), readsize);
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rtw_warn_on(readsize > MAX_RECVBUF_SZ);
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}
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/*1. alloc recvbuf*/
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precvpriv = &padapter->recvpriv;
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precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue);
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if (precvbuf == NULL) {
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/*RTW_ERR("%s: recvbuf unavailable\n", __func__);*/
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return RTW_RBUF_UNAVAIL;
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}
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/* 2. alloc skb*/
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if (precvbuf->pskb == NULL) {
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SIZE_PTR tmpaddr = 0;
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SIZE_PTR alignment = 0;
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RTW_WARN("%s- [WARN] - alloc_skb for rx buffer\n", __func__);
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precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
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if (precvbuf->pskb == NULL) {
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RTW_ERR("%s: alloc_skb fail! read=%d\n", __func__, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
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rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue);
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return RTW_RBUF_PKT_UNAVAIL;
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}
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if (precvbuf->pskb) {
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precvbuf->pskb->dev = padapter->pnetdev;
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tmpaddr = (SIZE_PTR)precvbuf->pskb->data;
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alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1);
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skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
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precvbuf->phead = precvbuf->pskb->head;
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precvbuf->pdata = precvbuf->pskb->data;
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precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
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precvbuf->pend = skb_end_pointer(precvbuf->pskb);
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precvbuf->len = 0;
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}
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}
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/*3. read data from rxfifo*/
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preadbuf = precvbuf->pdata;
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ret = _sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf);
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if (ret == _FAIL) {
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RTW_ERR("%s: sdio read port FAIL!\n", __func__);
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rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue);
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return RTW_SDIO_READ_PORT_FAIL;
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}
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/*4. init recvbuf*/
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precvbuf->len = readsize;
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*recvbuf_ret = precvbuf;
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return ret;
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}
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static u32 sd_recv_and_drop(PADAPTER adapter, u32 size)
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{
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u32 readsize, buflen;
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u8 *rbuf;
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s32 ret = _FAIL;
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readsize = RND4(size);
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buflen = rtw_sdio_cmd53_align_size(adapter_to_dvobj(adapter), readsize);
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if (buflen > MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ) {
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RTW_ERR(FUNC_ADPT_FMT" %u\n", FUNC_ADPT_ARG(adapter), readsize);
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rtw_warn_on(readsize > MAX_RECVBUF_SZ);
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}
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rbuf = rtw_zmalloc(buflen);
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if (rbuf) {
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if (_sdio_read_port(&adapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, buflen, rbuf) == _FAIL) {
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RTW_ERR("%s: sdio read port FAIL!\n", __func__);
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ret = RTW_SDIO_READ_PORT_FAIL;
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} else
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ret = _SUCCESS;
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rtw_mfree(rbuf, buflen);
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}
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return ret;
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}
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#else
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static struct recv_buf *sd_recv_rxfifo(PADAPTER padapter, u32 size)
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{
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u32 readsize, allocsize, ret;
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u8 *preadbuf;
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_pkt *ppkt;
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struct recv_priv *precvpriv;
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struct recv_buf *precvbuf;
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readsize = size;
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/*1.alloc skb*/
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/* align to block size*/
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allocsize = _RND(readsize, rtw_sdio_get_block_size(adapter_to_dvobj(padapter)));
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ppkt = rtw_skb_alloc(allocsize);
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if (ppkt == NULL) {
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RTW_INFO("%s: alloc_skb fail! alloc=%d read=%d\n", __func__, allocsize, readsize);
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return NULL;
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}
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/*2. read data from rxfifo*/
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preadbuf = skb_put(ppkt, readsize);
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/* rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); */
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ret = _sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf);
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if (ret == _FAIL) {
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rtw_skb_free(ppkt);
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RTW_INFO("%s: read port FAIL!\n", __func__);
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return NULL;
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}
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/*3. alloc recvbuf*/
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precvpriv = &padapter->recvpriv;
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precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue);
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if (precvbuf == NULL) {
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rtw_skb_free(ppkt);
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/*RTW_INFO("%s: alloc recvbuf FAIL!\n", __func__);*/
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return NULL;
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}
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/*4. init recvbuf*/
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precvbuf->pskb = ppkt;
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precvbuf->len = ppkt->len;
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precvbuf->phead = ppkt->head;
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precvbuf->pdata = ppkt->data;
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precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
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precvbuf->pend = skb_end_pointer(precvbuf->pskb);
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return precvbuf;
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}
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#endif
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#if 0
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static struct recv_buf *sd_recv_rxfifo(PADAPTER adapter, u32 size)
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{
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struct recv_priv *recvpriv;
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struct recv_buf *recvbuf;
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u32 readsz, bufsz;
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u8 *rbuf;
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_pkt *pkt;
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s32 ret;
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/*
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* Patch for some SDIO Host 4 bytes issue
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* ex. RK3188
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*/
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readsz = RND4(size);
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/* round to block size */
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bufsz = rtw_sdio_cmd53_align_size(adapter_to_dvobj(padapter), readsz);
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/*1.alloc recvbuf*/
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recvpriv = &adapter->recvpriv;
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recvbuf = rtw_dequeue_recvbuf(&recvpriv->free_recv_buf_queue);
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if (recvbuf == NULL) {
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RTW_INFO("%s: <ERR> alloc recvbuf FAIL!\n", __FUNCTION__);
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return NULL;
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}
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/*2.alloc skb*/
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pkt = rtl8821cs_alloc_recvbuf_skb(recvbuf, bufsz);
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if (!pkt) {
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RTW_INFO("%s: <ERR> alloc_skb fail! alloc=%d read=%d\n", __FUNCTION__, bufsz, size);
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rtw_enqueue_recvbuf(recvbuf, &recvpriv->free_recv_buf_queue);
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return NULL;
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}
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/* 3.read data from rxfifo*/
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rbuf = skb_put(pkt, size);
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ret = _sdio_read_port(&adapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, bufsz, rbuf);
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if (_FAIL == ret) {
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RTW_INFO("%s: <ERR> read port FAIL!\n", __FUNCTION__);
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rtl8821cs_free_recvbuf_skb(recvbuf);
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rtw_enqueue_recvbuf(recvbuf, &recvpriv->free_recv_buf_queue);
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return NULL;
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}
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/*4.init recvbuf*/
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recvbuf->len = pkt->len;
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recvbuf->phead = pkt->head;
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recvbuf->pdata = pkt->data;
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recvbuf->ptail = skb_tail_pointer(pkt);
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recvbuf->pend = skb_end_pointer(pkt);
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return recvbuf;
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}
|
#endif
|
|
void sd_int_dpc(PADAPTER adapter)
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{
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struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
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HAL_DATA_TYPE *phal_Data = GET_HAL_DATA(adapter);
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struct intf_hdl *pintfhdl = &adapter->iopriv.intf;
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|
|
#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT
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if (phal_Data->sdio_hisr & BIT_SDIO_AVAL_8821C) {
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u32 freepage;
|
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freepage = rtw_read32(adapter, SDIO_REG_FREE_TXPG);
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_rtw_up_sema(&adapter->xmitpriv.xmit_sema);
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}
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#endif
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if (phal_Data->sdio_hisr & BIT_SDIO_CPWM1_8821C) {
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struct reportpwrstate_parm report;
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|
#ifdef CONFIG_LPS_RPWM_TIMER
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_cancel_timer_ex(&pwrctl->pwr_rpwm_timer);
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#endif /* CONFIG_LPS_RPWM_TIMER */
|
|
report.state = rtw_read8(adapter, REG_SDIO_HCPWM1_V2_8821C);
|
|
#ifdef CONFIG_LPS_LCLK
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_set_workitem(&(pwrctl->cpwm_event));
|
#endif
|
}
|
#ifdef CONFIG_WOWLAN
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if (phal_Data->sdio_hisr & BIT_SDIO_CPWM2_8821C) {
|
u32 value;
|
|
value = rtw_read32(adapter, REG_SDIO_HISR_8821C);
|
|
RTW_PRINT("Reset SDIO HISR(0x%08x) original:0x%08x\n",
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REG_SDIO_HISR_8821C, value);
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value |= BIT19;
|
rtw_write32(adapter, REG_SDIO_HISR_8821C, value);
|
|
value = rtw_read8(adapter, REG_SDIO_HIMR_8821C + 2);
|
RTW_PRINT("Reset SDIO HIMR CPWM2(0x%08x) original:0x%02x\n",
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SDIO_LOCAL_BASE + SDIO_REG_HIMR + 2, value);
|
}
|
#endif
|
|
#ifdef CONFIG_ERROR_STATE_MONITOR
|
if (phal_Data->sdio_hisr & BIT_SDIO_TXERR_8821C) {
|
u32 status = 0;
|
|
status = rtw_read32(adapter, REG_TXDMA_STATUS_8821C);
|
rtw_write32(adapter, REG_TXDMA_STATUS_8821C, status);
|
|
RTW_ERR("[DMA ERROR] TXDMA_STATUS (0x%08x)\n", status);
|
}
|
|
if (phal_Data->sdio_hisr & BIT_SDIO_RXERR_8821C) {
|
u32 status = 0;
|
|
status = rtw_read32(adapter, REG_RXDMA_STATUS_8821C);
|
rtw_write32(adapter, REG_RXDMA_STATUS_8821C, status);
|
RTW_ERR("[DMA ERROR] RXDMA_STATUS (0x%08x)\n", status);
|
|
}
|
#endif
|
#ifdef CONFIG_MONITOR_OVERFLOW
|
if (phal_Data->sdio_hisr & BIT_SDIO_TXFOVW_8821C)
|
RTW_ERR("%s TXFOVW\n", __func__);
|
|
if (phal_Data->sdio_hisr & BIT_SDIO_RXFOVW_8821C)
|
RTW_ERR("%s RXFOVW\n", __func__);
|
#endif
|
|
|
#ifdef CONFIG_INTERRUPT_BASED_TXBCN
|
#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
|
if (phal_Data->sdio_hisr & BIT_SDIO_BCNERLY_INT_8821C) {
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/*RTW_INFO("%s: SDIO_BCNERLY_INT\n", __func__);*/
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rtw_mi_set_tx_beacon_cmd(adapter);
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}
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#endif
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#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
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if (phal_Data->sdio_hisr & (BIT_SDIO_TXBCNOK_8821C | BIT_SDIO_TXBCNERR_8821C)) {
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if (phal_Data->sdio_hisr & BIT_SDIO_TXBCNOK_8821C)
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RTW_INFO("%s: SDIO_HISR_TXBCNOK\n", __func__);
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|
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if (phal_Data->sdio_hisr & BIT_SDIO_TXBCNERR_8821C)
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RTW_INFO("%s: SDIO_HISR_TXBCNERR\n", __func__);
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rtw_mi_set_tx_beacon_cmd(adapter);
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}
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#endif
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#endif /* CONFIG_INTERRUPT_BASED_TXBCN */
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#ifdef CONFIG_C2H_EVT_INT
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if (phal_Data->sdio_hisr & BIT_SDIO_C2HCMD_INT_8821C) {
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}
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#endif
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if (phal_Data->sdio_hisr & BIT_RX_REQUEST_8821C) {
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struct recv_buf *precvbuf = NULL;
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int alloc_fail_time = 0;
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u8 data[4] = {0};
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u32 ret;
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phal_Data->sdio_hisr ^= BIT_RX_REQUEST_8821C;
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do {
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if (phal_Data->SdioRxFIFOSize == 0) {
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rtw_read_mem(adapter, REG_SDIO_RX_REQ_LEN_8821C, 4, data);
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phal_Data->SdioRxFIFOSize = le16_to_cpu(*(u16 *)data);
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}
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if (phal_Data->SdioRxFIFOSize) {
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ret = sd_recv_rxfifo(adapter, phal_Data->SdioRxFIFOSize, &precvbuf);
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if (precvbuf) {
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rtl8821cs_rxhandler(adapter, precvbuf);
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} else {
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if (RTW_SDIO_READ_PORT_FAIL == ret) {
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RTW_ERR("%s: sd_recv_rxfifo - SDIO read port failed\n", __func__);
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rtw_warn_on(1);
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break;
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}
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alloc_fail_time++;
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/*RTW_ERR("%s: recv fail!(time=%d)\n", __func__, alloc_fail_time);*/
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if (alloc_fail_time >= 10) {
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if (sd_recv_and_drop(adapter, phal_Data->SdioRxFIFOSize) == RTW_SDIO_READ_PORT_FAIL) {
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RTW_ERR("%s: sd_recv_and_drop - SDIO read port failed\n", __func__);
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rtw_warn_on(1);
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break;
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}
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#ifdef CONFIG_RECV_THREAD_MODE
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alloc_fail_time = 0;
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#else
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break;
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#endif
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} else
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rtw_msleep_os(1);
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}
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phal_Data->SdioRxFIFOSize = 0;
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} else
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break;
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#ifdef CONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP
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} while (0);
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#else
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} while (1);
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#endif
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if (alloc_fail_time >= 10)
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RTW_INFO("%s: exit because recv failed more than 10 times!\n", __FUNCTION__);
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}
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}
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void sd_int_hdl(PADAPTER adapter)
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{
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u8 data[8] = {0};
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u32 v32 = 0;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
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u8 pwr;
|
|
if (RTW_CANNOT_RUN(adapter))
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return;
|
|
rtw_hal_get_hwreg(adapter, HW_VAR_APFM_ON_MAC, &pwr);
|
if (pwr != _TRUE) {
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RTW_WARN("%s: unexpected interrupt!\n", __FUNCTION__);
|
return;
|
}
|
|
|
/*pHalData->sdio_hisr = rtl8821cs_get_interrupt(adapter);*/
|
rtw_read_mem(adapter, REG_SDIO_HISR_8821C, 8, data);
|
|
pHalData->sdio_hisr = le32_to_cpu(*(u32 *)data);
|
pHalData->SdioRxFIFOSize = le16_to_cpu(*(u16 *)&data[4]);
|
|
|
if (pHalData->sdio_hisr & pHalData->sdio_himr) {
|
pHalData->sdio_hisr &= pHalData->sdio_himr;
|
|
/* clear HISR */
|
v32 = cpu_to_le32(pHalData->sdio_hisr & MASK_SDIO_HISR_CLEAR);
|
if (v32)
|
rtl8821cs_clear_interrupt(adapter, v32);
|
|
sd_int_dpc(adapter);
|
}
|
#ifdef CONFIG_PLATFORM_INT_MONITOR
|
else {
|
RTW_INFO("%s: HISR(0x%08x) and HIMR(0x%08x) no match!\n",
|
__FUNCTION__, pHalData->sdio_hisr, pHalData->sdio_himr);
|
}
|
#endif
|
}
|
|
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
|
u8 rtw_hal_enable_cpwm2(_adapter *adapter)
|
{
|
#ifdef CONFIG_GPIO_WAKEUP
|
return _SUCCESS;
|
#else
|
u32 himr = 0;
|
|
RTW_PRINT("%s\n", __func__);
|
himr = rtl8821cs_get_himr(adapter);
|
RTW_INFO("read SDIO_REG_HIMR: 0x%08x\n", himr);
|
|
himr = BIT_SDIO_CPWM2_MSK_8821C;
|
rtl8821cs_update_himr(adapter, himr);
|
RTW_INFO("update SDIO_REG_HIMR: 0x%08x\n", himr);
|
|
himr = rtl8821cs_get_himr(adapter);
|
RTW_INFO("read again SDIO_REG_HIMR: 0x%08x\n", himr);
|
return _SUCCESS;
|
#endif
|
}
|
|
u8 RecvOnePkt(PADAPTER adapter)
|
{
|
struct recv_buf *precvbuf;
|
struct dvobj_priv *psddev;
|
PSDIO_DATA psdio_data;
|
struct sdio_func *func;
|
u8 res = _TRUE;
|
u8 data[4] = {0};
|
u16 len = 0;
|
u32 ret;
|
if (adapter == NULL) {
|
RTW_ERR("%s: adapter is NULL!\n", __func__);
|
return _FALSE;
|
}
|
psddev = adapter->dvobj;
|
psdio_data = &psddev->intf_data;
|
func = psdio_data->func;
|
|
rtw_read_mem(adapter, REG_SDIO_RX_REQ_LEN_8821C, 4, data);
|
len = le16_to_cpu(*(u16 *)data);
|
|
RTW_INFO("+%s: size=%d+\n", __func__, len);
|
|
if (len) {
|
sdio_claim_host(func);
|
ret = sd_recv_rxfifo(adapter, len, &precvbuf);
|
if (precvbuf)
|
rtl8821cs_rxhandler(adapter, precvbuf);
|
else
|
res = _FALSE;
|
sdio_release_host(func);
|
}
|
RTW_INFO("-%s-\n", __func__);
|
return res;
|
}
|
#endif /* CONFIG_WOWLAN */
|
