/* SPDX-License-Identifier: GPL-2.0 */
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#include "mp_precomp.h"
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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#if RT_PLATFORM == PLATFORM_MACOSX
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#include "phydm_precomp.h"
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#else
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#include "../phydm_precomp.h"
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#endif
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#else
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#include "../../phydm_precomp.h"
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#endif
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#if (RTL8821C_SUPPORT == 1)
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void halrf_rf_lna_setting_8821c(struct dm_struct *dm_void,
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enum halrf_lna_set type)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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u8 path = 0x0;
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if (type == HALRF_LNA_DISABLE) {
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0xef, BIT(19), 0x1);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x33, RFREGOFFSETMASK, 0x00003);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3e, RFREGOFFSETMASK, 0x00064);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3f, RFREGOFFSETMASK, 0x0afce);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0xef, BIT(19), 0x0);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0xee, BIT(12), 0x1);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x33, RFREGOFFSETMASK, 0x00003);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3e, RFREGOFFSETMASK, 0x00064);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3f, RFREGOFFSETMASK, 0x0280d);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0xee, BIT(12), 0x0);
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} else if (type == HALRF_LNA_ENABLE) {
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0xef, BIT(19), 0x1);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x33, RFREGOFFSETMASK, 0x00003);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3e, RFREGOFFSETMASK, 0x00064);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3f, RFREGOFFSETMASK, 0x1afce);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0xef, BIT(19), 0x0);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0xee, BIT(12), 0x1);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x33, RFREGOFFSETMASK, 0x00003);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3e, RFREGOFFSETMASK, 0x00064);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3f, RFREGOFFSETMASK, 0x0281d);
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odm_set_rf_reg(dm, (enum rf_path)path, RF_0xee, BIT(12), 0x0);
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}
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}
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boolean
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get_mix_mode_tx_agc_bbs_wing_offset_8821c(void *dm_void,
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enum pwrtrack_method method,
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u8 rf_path,
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u8 tx_power_index_offest_upper_bound,
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s8 tx_power_index_offest_lower_bound)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
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u8 bb_swing_upper_bound = cali_info->default_ofdm_index + 10;
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u8 bb_swing_lower_bound = 0;
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s8 tx_agc_index = 0;
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u8 tx_bb_swing_index = cali_info->default_ofdm_index;
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RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
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"Path_%d pRF->absolute_ofdm_swing_idx[rf_path]=%d, tx_power_index_offest_upper_bound=%d, tx_power_index_offest_lower_bound=%d\n",
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rf_path, cali_info->absolute_ofdm_swing_idx[rf_path],
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tx_power_index_offest_upper_bound,
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tx_power_index_offest_lower_bound);
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if (tx_power_index_offest_upper_bound > 0XF)
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tx_power_index_offest_upper_bound = 0XF;
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if (tx_power_index_offest_lower_bound < -15)
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tx_power_index_offest_lower_bound = -15;
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if (cali_info->absolute_ofdm_swing_idx[rf_path] >= 0 && cali_info->absolute_ofdm_swing_idx[rf_path] <= tx_power_index_offest_upper_bound) {
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tx_agc_index = cali_info->absolute_ofdm_swing_idx[rf_path];
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tx_bb_swing_index = cali_info->default_ofdm_index;
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} else if (cali_info->absolute_ofdm_swing_idx[rf_path] >= 0 && (cali_info->absolute_ofdm_swing_idx[rf_path] > tx_power_index_offest_upper_bound)) {
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tx_agc_index = tx_power_index_offest_upper_bound;
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cali_info->remnant_ofdm_swing_idx[rf_path] = cali_info->absolute_ofdm_swing_idx[rf_path] - tx_power_index_offest_upper_bound;
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tx_bb_swing_index = cali_info->default_ofdm_index + cali_info->remnant_ofdm_swing_idx[rf_path];
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if (tx_bb_swing_index > bb_swing_upper_bound)
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tx_bb_swing_index = bb_swing_upper_bound;
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} else if (cali_info->absolute_ofdm_swing_idx[rf_path] < 0 && (cali_info->absolute_ofdm_swing_idx[rf_path] >= tx_power_index_offest_lower_bound)) {
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tx_agc_index = cali_info->absolute_ofdm_swing_idx[rf_path];
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tx_bb_swing_index = cali_info->default_ofdm_index;
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} else if (cali_info->absolute_ofdm_swing_idx[rf_path] < 0 && (cali_info->absolute_ofdm_swing_idx[rf_path] < tx_power_index_offest_lower_bound)) {
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tx_agc_index = tx_power_index_offest_lower_bound;
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cali_info->remnant_ofdm_swing_idx[rf_path] = cali_info->absolute_ofdm_swing_idx[rf_path] - tx_power_index_offest_lower_bound;
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if (cali_info->default_ofdm_index > (cali_info->remnant_ofdm_swing_idx[rf_path] * (-1)))
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tx_bb_swing_index = cali_info->default_ofdm_index + cali_info->remnant_ofdm_swing_idx[rf_path];
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else
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tx_bb_swing_index = bb_swing_lower_bound;
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}
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cali_info->absolute_ofdm_swing_idx[rf_path] = tx_agc_index;
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cali_info->bb_swing_idx_ofdm[rf_path] = tx_bb_swing_index;
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RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
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"MixMode Offset Path_%d pRF->absolute_ofdm_swing_idx[rf_path]=%d pRF->bb_swing_idx_ofdm[rf_path]=%d TxPwrIdxOffestUpper=%d TxPwrIdxOffestLower=%d\n",
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rf_path, cali_info->absolute_ofdm_swing_idx[rf_path],
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cali_info->bb_swing_idx_ofdm[rf_path],
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tx_power_index_offest_upper_bound,
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tx_power_index_offest_lower_bound);
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return true;
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}
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void odm_tx_pwr_track_set_pwr8821c(void *dm_void, enum pwrtrack_method method,
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u8 rf_path, u8 channel_mapped_index)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
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struct _ADAPTER *adapter = dm->adapter;
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u8 channel = *dm->channel;
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u8 band_width = *dm->band_width;
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#endif
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struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
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struct _hal_rf_ *rf = &dm->rf_table;
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u8 tx_power_index_offest_upper_bound = 0;
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s8 tx_power_index_offest_lower_bound = 0;
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u8 tx_power_index = 0;
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u8 tx_rate = 0xFF;
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if (*dm->mp_mode) {
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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#if (MP_DRIVER == 1)
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PMPT_CONTEXT p_mpt_ctx = &adapter->MptCtx;
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tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex);
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#endif
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#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
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#ifdef CONFIG_MP_INCLUDED
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PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx);
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tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
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#endif
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#endif
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#endif
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} else {
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u16 rate = *dm->forced_data_rate;
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if (!rate) { /*auto rate*/
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate);
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#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
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tx_rate = dm->tx_rate;
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#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
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if (dm->number_linked_client != 0)
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tx_rate = hw_rate_to_m_rate(dm->tx_rate);
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else
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tx_rate = rf->p_rate_index;
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#endif
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} else { /*force rate*/
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tx_rate = (u8)rate;
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}
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}
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RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Call:%s tx_rate=0x%X\n", __func__,
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tx_rate);
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RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
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"pRF->default_ofdm_index=%d pRF->default_cck_index=%d\n",
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cali_info->default_ofdm_index, cali_info->default_cck_index);
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RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
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"pRF->absolute_ofdm_swing_idx=%d pRF->remnant_ofdm_swing_idx=%d pRF->absolute_cck_swing_idx=%d pRF->remnant_cck_swing_idx=%d rf_path=%d\n",
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cali_info->absolute_ofdm_swing_idx[rf_path],
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cali_info->remnant_ofdm_swing_idx[rf_path],
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cali_info->absolute_cck_swing_idx[rf_path],
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cali_info->remnant_cck_swing_idx, rf_path);
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
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tx_power_index = odm_get_tx_power_index(dm, (enum rf_path)rf_path, tx_rate, band_width, channel);
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#else
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tx_power_index = config_phydm_read_txagc_8821c(dm, rf_path, 0x04); /*0x04(TX_AGC_OFDM_6M)*/
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#endif
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if (tx_power_index >= 63)
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tx_power_index = 63;
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tx_power_index_offest_upper_bound = 63 - tx_power_index;
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tx_power_index_offest_lower_bound = 0 - tx_power_index;
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RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
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"tx_power_index=%d tx_power_index_offest_upper_bound=%d tx_power_index_offest_lower_bound=%d rf_path=%d\n",
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tx_power_index, tx_power_index_offest_upper_bound,
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tx_power_index_offest_lower_bound, rf_path);
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if (method == BBSWING) { /*use for mp driver clean power tracking status*/
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switch (rf_path) {
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case RF_PATH_A:
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odm_set_bb_reg(dm, R_0xc94, (BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)), ((cali_info->absolute_ofdm_swing_idx[rf_path]) & 0x3f));
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odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[cali_info->bb_swing_idx_ofdm[rf_path]]);
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break;
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default:
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break;
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}
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} else if (method == MIX_MODE) {
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switch (rf_path) {
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case RF_PATH_A:
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get_mix_mode_tx_agc_bbs_wing_offset_8821c(dm, method, rf_path, tx_power_index_offest_upper_bound, tx_power_index_offest_lower_bound);
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odm_set_bb_reg(dm, R_0xc94, (BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)), ((cali_info->absolute_ofdm_swing_idx[rf_path]) & 0x3f));
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odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[cali_info->bb_swing_idx_ofdm[rf_path]]);
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RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
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"TXAGC(0xC94)=0x%x BBSwing(0xc1c)=0x%x BBSwingIndex=%d rf_path=%d\n",
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odm_get_bb_reg(dm, R_0xc94,
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(BIT(6) | BIT(5) | BIT(4) |
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BIT(3) | BIT(2) | BIT(1))),
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odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000),
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cali_info->bb_swing_idx_ofdm[rf_path], rf_path);
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break;
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default:
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break;
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}
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}
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}
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void get_delta_swing_table_8821c(void *dm_void,
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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u8 **temperature_up_a, u8 **temperature_down_a,
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u8 **temperature_up_b, u8 **temperature_down_b,
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u8 **temperature_up_cck_a,
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u8 **temperature_down_cck_a,
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u8 **temperature_up_cck_b,
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u8 **temperature_down_cck_b
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#else
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u8 **temperature_up_a, u8 **temperature_down_a,
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u8 **temperature_up_b,
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u8 **temperature_down_b
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#endif
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)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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u8 channel = *(dm->channel);
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#else
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u8 channel = *dm->channel;
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#endif
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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*temperature_up_cck_a = cali_info->delta_swing_table_idx_2g_cck_a_p;
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*temperature_down_cck_a = cali_info->delta_swing_table_idx_2g_cck_a_n;
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*temperature_up_cck_b = cali_info->delta_swing_table_idx_2g_cck_b_p;
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*temperature_down_cck_b = cali_info->delta_swing_table_idx_2g_cck_b_n;
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#endif
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*temperature_up_a = cali_info->delta_swing_table_idx_2ga_p;
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*temperature_down_a = cali_info->delta_swing_table_idx_2ga_n;
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*temperature_up_b = cali_info->delta_swing_table_idx_2gb_p;
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*temperature_down_b = cali_info->delta_swing_table_idx_2gb_n;
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if (channel >= 36 && channel <= 64) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[0];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[0];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[0];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[0];
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} else if (channel >= 100 && channel <= 144) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[1];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[1];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[1];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[1];
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} else if (channel >= 149 && channel <= 177) {
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*temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[2];
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*temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[2];
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*temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[2];
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*temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[2];
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}
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}
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void aac_check_8821c(struct dm_struct *dm)
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{
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struct _hal_rf_ *rf = &dm->rf_table;
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u32 temp;
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if (!rf->aac_checked) {
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RF_DBG(dm, DBG_RF_LCK, "[LCK]AAC check for 8821c\n");
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temp = odm_get_rf_reg(dm, RF_PATH_A, 0xc9, 0xf8);
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if (temp < 4 || temp > 7) {
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odm_set_rf_reg(dm, RF_PATH_A, 0xca, BIT(19), 0x0);
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odm_set_rf_reg(dm, RF_PATH_A, 0xb2, 0x7c000, 0x6);
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}
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rf->aac_checked = true;
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}
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}
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void _phy_aac_calibrate_8821c(struct dm_struct *dm)
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{
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#if 0
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u32 cnt = 0;
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RF_DBG(dm, DBG_RF_LCK, "[AACK]AACK start!!!!!!!\n");
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odm_set_rf_reg(dm, RF_PATH_A, RF_0xb8, RFREGOFFSETMASK, 0x80a00);
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odm_set_rf_reg(dm, RF_PATH_A, RF_0xb0, RFREGOFFSETMASK, 0xff0fa);
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ODM_delay_ms(10);
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odm_set_rf_reg(dm, RF_PATH_A, RF_0xca, RFREGOFFSETMASK, 0x80000);
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odm_set_rf_reg(dm, RF_PATH_A, RF_0xc9, RFREGOFFSETMASK, 0x1c141);
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for (cnt = 0; cnt < 100; cnt++) {
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ODM_delay_ms(1);
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if (odm_get_rf_reg(dm, RF_PATH_A, RF_0xca, 0x1000) != 0x1)
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break;
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}
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odm_set_rf_reg(dm, RF_PATH_A, RF_0xb0, RFREGOFFSETMASK, 0xff0f8);
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RF_DBG(dm, DBG_RF_IQK, "[AACK]AACK end!!!!!!!\n");
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#endif
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}
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void _phy_lc_calibrate_8821c(struct dm_struct *dm)
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{
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#if 1
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aac_check_8821c(dm);
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RF_DBG(dm, DBG_RF_LCK, "[LCK]real-time LCK!!!!!!!\n");
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odm_set_rf_reg(dm, RF_PATH_A, RF_0xcc, RFREGOFFSETMASK, 0x2018);
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odm_set_rf_reg(dm, RF_PATH_A, RF_0xc4, RFREGOFFSETMASK, 0x8f602);
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odm_set_rf_reg(dm, RF_PATH_A, RF_0xcc, RFREGOFFSETMASK, 0x201c);
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#endif
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#if 0
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u32 lc_cal = 0, cnt = 0, tmp0xc00;
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/*RF to standby mode*/
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tmp0xc00 = odm_read_4byte(dm, 0xc00);
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odm_write_4byte(dm, 0xc00, 0x4);
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odm_set_rf_reg(dm, RF_PATH_A, RF_0x0, RFREGOFFSETMASK, 0x10000);
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_phy_aac_calibrate_8821c(dm);
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/*backup RF0x18*/
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lc_cal = odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK);
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/*Start LCK*/
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odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal | 0x08000);
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ODM_delay_ms(50);
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for (cnt = 0; cnt < 100; cnt++) {
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if (odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
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break;
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ODM_delay_ms(10);
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}
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/*Recover channel number*/
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odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal);
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/**restore*/
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odm_write_4byte(dm, 0xc00, tmp0xc00);
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odm_set_rf_reg(dm, RF_PATH_A, RF_0x0, RFREGOFFSETMASK, 0x3ffff);
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RF_DBG(dm, DBG_RF_IQK, "[LCK]LCK end!!!!!!!\n");
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#endif
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}
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/*LCK:0x2*/
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/*1. add AACK check*/
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void phy_lc_calibrate_8821c(void *dm_void)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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_phy_lc_calibrate_8821c(dm);
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}
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void configure_txpower_track_8821c(struct txpwrtrack_cfg *config)
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{
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config->swing_table_size_cck = TXSCALE_TABLE_SIZE;
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config->swing_table_size_ofdm = TXSCALE_TABLE_SIZE;
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config->threshold_iqk = IQK_THRESHOLD;
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config->threshold_dpk = DPK_THRESHOLD;
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config->average_thermal_num = AVG_THERMAL_NUM_8821C;
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config->rf_path_count = MAX_PATH_NUM_8821C;
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config->thermal_reg_addr = RF_T_METER_8821C;
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config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr8821c;
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config->do_iqk = do_iqk_8821c;
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config->phy_lc_calibrate = halrf_lck_trigger;
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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config->get_delta_all_swing_table = get_delta_swing_table_8821c;
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#else
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config->get_delta_swing_table = get_delta_swing_table_8821c;
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#endif
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}
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#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
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void phy_set_rf_path_switch_8821c(struct dm_struct *dm,
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#else
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void phy_set_rf_path_switch_8821c(void *adapter,
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#endif
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boolean is_main)
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{
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
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struct dm_struct *dm = &hal_data->DM_OutSrc;
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#endif
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#endif
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u8 ant_num = 0; /*0: ANT_1, 1: ANT_2*/
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if (is_main)
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ant_num = SWITCH_TO_ANT1; /*Main = ANT_1*/
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else
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ant_num = SWITCH_TO_ANT2; /*Aux = ANT_2*/
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config_phydm_set_ant_path(dm, dm->current_rf_set_8821c, ant_num);
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}
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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boolean _phy_query_rf_path_switch_8821c(struct dm_struct *dm
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#else
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boolean _phy_query_rf_path_switch_8821c(void *adapter
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#endif
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)
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{
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#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
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HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
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#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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struct dm_struct *dm = &hal_data->odmpriv;
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#endif
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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struct dm_struct *dm = &hal_data->DM_OutSrc;
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#endif
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#endif
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u8 ant_num = 0; /*0: ANT_1, 1: ANT_2*/
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ODM_delay_ms(300);
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ant_num = query_phydm_current_ant_num_8821c(dm);
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if (ant_num == SWITCH_TO_ANT1)
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return true; /*Main = ANT_1*/
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else
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return false; /*Aux = ANT_2*/
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}
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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boolean phy_query_rf_path_switch_8821c(struct dm_struct *dm
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#else
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boolean phy_query_rf_path_switch_8821c(void *adapter
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#endif
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)
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{
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#if DISABLE_BB_RF
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return true;
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#endif
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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return _phy_query_rf_path_switch_8821c(dm);
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#else
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return _phy_query_rf_path_switch_8821c(adapter);
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#endif
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}
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#endif /* (RTL8821C_SUPPORT == 0)*/
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