/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2017 Oracle and/or its affiliates. All rights reserved. */
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#ifndef _IXGBE_IPSEC_H_
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#define _IXGBE_IPSEC_H_
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#define IXGBE_IPSEC_MAX_SA_COUNT 1024
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#define IXGBE_IPSEC_MAX_RX_IP_COUNT 128
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#define IXGBE_IPSEC_BASE_RX_INDEX 0
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#define IXGBE_IPSEC_BASE_TX_INDEX IXGBE_IPSEC_MAX_SA_COUNT
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#define IXGBE_IPSEC_AUTH_BITS 128
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#define IXGBE_RXTXIDX_IPS_EN 0x00000001
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#define IXGBE_RXIDX_TBL_SHIFT 1
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enum ixgbe_ipsec_tbl_sel {
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ips_rx_ip_tbl = 0x01,
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ips_rx_spi_tbl = 0x02,
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ips_rx_key_tbl = 0x03,
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};
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#define IXGBE_RXTXIDX_IDX_SHIFT 3
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#define IXGBE_RXTXIDX_READ 0x40000000
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#define IXGBE_RXTXIDX_WRITE 0x80000000
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#define IXGBE_RXMOD_VALID 0x00000001
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#define IXGBE_RXMOD_PROTO_ESP 0x00000004
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#define IXGBE_RXMOD_DECRYPT 0x00000008
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#define IXGBE_RXMOD_IPV6 0x00000010
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#define IXGBE_RXTXMOD_VF 0x00000020
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struct rx_sa {
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struct hlist_node hlist;
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struct xfrm_state *xs;
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__be32 ipaddr[4];
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u32 key[4];
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u32 salt;
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u32 mode;
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u8 iptbl_ind;
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bool used;
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bool decrypt;
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u32 vf;
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};
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struct rx_ip_sa {
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__be32 ipaddr[4];
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u32 ref_cnt;
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bool used;
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};
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struct tx_sa {
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struct xfrm_state *xs;
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u32 key[4];
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u32 salt;
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u32 mode;
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bool encrypt;
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bool used;
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u32 vf;
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};
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struct ixgbe_ipsec_tx_data {
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u32 flags;
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u16 trailer_len;
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u16 sa_idx;
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};
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struct ixgbe_ipsec {
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u16 num_rx_sa;
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u16 num_tx_sa;
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struct rx_ip_sa *ip_tbl;
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struct rx_sa *rx_tbl;
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struct tx_sa *tx_tbl;
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DECLARE_HASHTABLE(rx_sa_list, 10);
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};
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struct sa_mbx_msg {
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__be32 spi;
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u8 flags;
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u8 proto;
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u16 family;
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__be32 addr[4];
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u32 key[5];
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};
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#endif /* _IXGBE_IPSEC_H_ */
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