/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 1999 - 2008 Intel Corporation. */
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#ifndef _IXGB_EE_H_
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#define _IXGB_EE_H_
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#define IXGB_EEPROM_SIZE 64 /* Size in words */
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/* EEPROM Commands */
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#define EEPROM_READ_OPCODE 0x6 /* EEPROM read opcode */
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#define EEPROM_WRITE_OPCODE 0x5 /* EEPROM write opcode */
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#define EEPROM_ERASE_OPCODE 0x7 /* EEPROM erase opcode */
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#define EEPROM_EWEN_OPCODE 0x13 /* EEPROM erase/write enable */
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#define EEPROM_EWDS_OPCODE 0x10 /* EEPROM erase/write disable */
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/* EEPROM MAP (Word Offsets) */
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#define EEPROM_IA_1_2_REG 0x0000
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#define EEPROM_IA_3_4_REG 0x0001
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#define EEPROM_IA_5_6_REG 0x0002
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#define EEPROM_COMPATIBILITY_REG 0x0003
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#define EEPROM_PBA_1_2_REG 0x0008
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#define EEPROM_PBA_3_4_REG 0x0009
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#define EEPROM_INIT_CONTROL1_REG 0x000A
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#define EEPROM_SUBSYS_ID_REG 0x000B
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#define EEPROM_SUBVEND_ID_REG 0x000C
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#define EEPROM_DEVICE_ID_REG 0x000D
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#define EEPROM_VENDOR_ID_REG 0x000E
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#define EEPROM_INIT_CONTROL2_REG 0x000F
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#define EEPROM_SWDPINS_REG 0x0020
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#define EEPROM_CIRCUIT_CTRL_REG 0x0021
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#define EEPROM_D0_D3_POWER_REG 0x0022
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#define EEPROM_FLASH_VERSION 0x0032
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#define EEPROM_CHECKSUM_REG 0x003F
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/* Mask bits for fields in Word 0x0a of the EEPROM */
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#define EEPROM_ICW1_SIGNATURE_MASK 0xC000
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#define EEPROM_ICW1_SIGNATURE_VALID 0x4000
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#define EEPROM_ICW1_SIGNATURE_CLEAR 0x0000
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/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
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#define EEPROM_SUM 0xBABA
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/* EEPROM Map Sizes (Byte Counts) */
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#define PBA_SIZE 4
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/* EEPROM Map defines (WORD OFFSETS)*/
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/* EEPROM structure */
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struct ixgb_ee_map_type {
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u8 mac_addr[ETH_ALEN];
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__le16 compatibility;
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__le16 reserved1[4];
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__le32 pba_number;
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__le16 init_ctrl_reg_1;
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__le16 subsystem_id;
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__le16 subvendor_id;
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__le16 device_id;
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__le16 vendor_id;
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__le16 init_ctrl_reg_2;
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__le16 oem_reserved[16];
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__le16 swdpins_reg;
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__le16 circuit_ctrl_reg;
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u8 d3_power;
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u8 d0_power;
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__le16 reserved2[28];
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__le16 checksum;
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};
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/* EEPROM Functions */
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u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
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bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
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void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
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void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
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#endif /* IXGB_EE_H */
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