/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* linux/drivers/mtd/rknand/rknand_base.c
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*
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* Copyright (C) 2005-2009 Fuzhou Rockchip Electronics
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* ZYF <zyf@rock-chips.com>
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*
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*
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*/
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#include <linux/version.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mutex.h>
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#include <linux/kthread.h>
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#include <linux/dma-mapping.h>
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#include <asm/dma.h>
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#include <asm/cacheflush.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/reboot.h>
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#include <asm/io.h>
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#include <asm/mach/flash.h>
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//#include "api_flash.h"
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#include "rknand_base.h"
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#include "../mtdcore.h"
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#include <linux/clk.h>
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#include <linux/cpufreq.h>
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#ifdef CONFIG_OF
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#include <linux/of.h>
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#endif
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#define DRIVER_NAME "rk29xxnand"
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const char rknand_base_version[] = "rknand_base.c version: 4.38 20120717";
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#define NAND_DEBUG_LEVEL0 0
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#define NAND_DEBUG_LEVEL1 1
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#define NAND_DEBUG_LEVEL2 2
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#define NAND_DEBUG_LEVEL3 3
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int g_num_partitions = 0;
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unsigned long SysImageWriteEndAdd = 0;
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struct mtd_info rknand_mtd;
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struct mtd_partition *rknand_parts;
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struct rknand_info * gpNandInfo;
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#ifdef CONFIG_MTD_NAND_RK29XX_DEBUG
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static int s_debug = CONFIG_MTD_NAND_RK29XX_DEBUG_VERBOSE;
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#undef NAND_DEBUG
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#define NAND_DEBUG(n, format, arg...) \
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if (n <= s_debug) { \
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printk(format,##arg); \
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}
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#else
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#undef NAND_DEBUG
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#define NAND_DEBUG(n, arg...)
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static const int s_debug = 0;
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#endif
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#include <linux/proc_fs.h>
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#include <linux/version.h>
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#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26))
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#define NANDPROC_ROOT (&proc_root)
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#else
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#define NANDPROC_ROOT NULL
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#endif
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//#define RKNAND_TRAC_EN
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#ifdef RKNAND_TRAC_EN
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static struct proc_dir_entry *my_trac_proc_entry;
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#define MAX_TRAC_BUFFER_SIZE (long)(2048 * 8 * 512) //sector
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static char grknand_trac_buf[MAX_TRAC_BUFFER_SIZE];
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static char *ptrac_buf = grknand_trac_buf;
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void trac_log(long lba,int len, int mod)
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{
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unsigned long long t;
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unsigned long nanosec_rem;
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t = cpu_clock(UINT_MAX);
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nanosec_rem = do_div(t, 1000000000);
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if(mod)
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ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] W %d %d \n",(unsigned long) t, nanosec_rem / 1000,lba,len);
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else
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ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] R %d %d \n",(unsigned long) t, nanosec_rem / 1000,lba,len);
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}
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void trac_logs(char *s)
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{
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unsigned long long t;
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unsigned long nanosec_rem;
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t = cpu_clock(UINT_MAX);
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nanosec_rem = do_div(t, 1000000000);
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ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] %s\n",(unsigned long) t, nanosec_rem / 1000,s);
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}
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static int rkNand_trac_read(char *page, char **start, off_t off, int count, int *eof,
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void *data)
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{
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char *p = page;
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int len;
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len = ptrac_buf - grknand_trac_buf - off;
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//printk("rkNand_trac_read: page=%x,off=%x,count=%x ,len=%x \n",(int)page,(int)off,count,len);
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if (len < 0)
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len = 0;
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if(len > count)
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len = count;
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memcpy(p,grknand_trac_buf + off,len);
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*eof = (len < count) ? 1 : 0;
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*start = page;
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if(len < count)
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ptrac_buf = grknand_trac_buf;
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return len;
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}
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#endif
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#define DATA_LEN (1024*8*2/4) //Êý¾Ý¿éµ¥Î»word
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#define SPARE_LEN (32*8*2/4) //УÑéÊý¾Ý³¤¶È
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#define PAGE_LEN (DATA_LEN+SPARE_LEN) //ÿ¸öÊý¾Ýµ¥Î»µÄ³¤¶È
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#define MAX_BUFFER_SIZE (long)(2048 * 8) //sector
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//long grknand_buf[MAX_BUFFER_SIZE * 512/4] __attribute__((aligned(4096)));
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//long grknand_dma_buf[PAGE_LEN*4*5] __attribute__((aligned(4096)));
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static struct proc_dir_entry *my_proc_entry;
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extern int rkNand_proc_ftlread(char *page);
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extern int rkNand_proc_bufread(char *page);
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static int rkNand_proc_read(char *page,
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char **start,
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off_t offset, int count, int *eof, void *data)
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{
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char *buf = page;
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int step = offset;
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*(int *)start = 1;
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if(step == 0)
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{
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buf += sprintf(buf, "%s\n", rknand_base_version);
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if(gpNandInfo->proc_ftlread)
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buf += gpNandInfo->proc_ftlread(buf);
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if(gpNandInfo->proc_bufread)
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buf += gpNandInfo->proc_bufread(buf);
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#ifdef RKNAND_TRAC_EN
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buf += sprintf(buf, "trac data len:%d\n", ptrac_buf - grknand_trac_buf);
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#endif
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}
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return buf - page < count ? buf - page : count;
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}
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#if 0// (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))
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static void rknand_create_procfs(void)
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{
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/* Install the proc_fs entry */
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my_proc_entry = create_proc_entry("rknand",
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S_IRUGO | S_IFREG,
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NANDPROC_ROOT);
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if (my_proc_entry) {
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my_proc_entry->write_proc = NULL;
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my_proc_entry->read_proc = rkNand_proc_read;
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my_proc_entry->data = NULL;
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}
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#ifdef RKNAND_TRAC_EN
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/* Install the proc_fs entry */
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my_trac_proc_entry = create_proc_entry("rknand_trac",
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S_IRUGO | S_IFREG,
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NANDPROC_ROOT);
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if (my_trac_proc_entry) {
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my_trac_proc_entry->write_proc = NULL;
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my_trac_proc_entry->read_proc = rkNand_trac_read;
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my_trac_proc_entry->data = NULL;
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}
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#endif
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}
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#else
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static const struct file_operations my_proc_fops = {
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.owner = THIS_MODULE,
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.read = rkNand_proc_read,
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.write = NULL,
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};
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static void rknand_create_procfs(void)
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{
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/* Install the proc_fs entry */
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my_proc_entry = proc_create("rknand",
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S_IRUGO | S_IFREG,
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NANDPROC_ROOT,&my_proc_fops);
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}
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#endif
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void printk_write_log(long lba,int len, const u_char *pbuf)
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{
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char debug_buf[100];
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int i;
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for(i=0;i<len;i++)
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{
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sprintf(debug_buf,"%lx :",lba+i);
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print_hex_dump(KERN_WARNING, debug_buf, DUMP_PREFIX_NONE, 16,4, &pbuf[512*i], 8, 0);
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}
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}
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static int rknand_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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int ret = 0;
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int sector = len>>9;
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int LBA = (int)(from>>9);
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#ifdef RKNAND_TRAC_EN
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//trac_log(LBA,sector,0);
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#endif
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//printk("R %d %d \n",(int)LBA,sector);
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//if(rknand_debug)
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// printk("rk28xxnand_read: from=%x,sector=%x,\n",(int)LBA,sector);
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if(sector && gpNandInfo->ftl_read)
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{
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ret = gpNandInfo->ftl_read(LBA, sector, buf);
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if(ret)
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*retlen = 0;
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}
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return ret;
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}
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static int rknand_write(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, const u_char *buf)
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{
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int ret = 0;
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int sector = len>>9;
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int LBA = (int)(from>>9);
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#ifdef RKNAND_TRAC_EN
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trac_log(LBA,sector,1);
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#endif
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//printk("W %d %d \n",(int)LBA,sector);
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//return 0;
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//printk("*");
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//if(rknand_debug)
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// printk(KERN_NOTICE "write: from=%lx,sector=%x\n",(int)LBA,sector);
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//printk_write_log(LBA,sector,buf);
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if(sector && gpNandInfo->ftl_write)// cmy
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{
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if(LBA < SysImageWriteEndAdd)//0x4E000)
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{
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//NAND_DEBUG(NAND_DEBUG_LEVEL0,">>> FtlWriteImage: LBA=0x%08X sector=%d\n",LBA, sector);
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ret = gpNandInfo->ftl_write(LBA, sector, (void *)buf,1);
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}
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else
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{
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ret = gpNandInfo->ftl_write(LBA, sector, (void *)buf,0);
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}
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}
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*retlen = len;
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return 0;
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}
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static int rknand_diacard(struct mtd_info *mtd, loff_t from, size_t len)
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{
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int ret = 0;
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int sector = len>>9;
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int LBA = (int)(from>>9);
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//printk("rknand_diacard: from=%x,sector=%x,\n",(int)LBA,sector);
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if(sector && gpNandInfo->ftl_discard)
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{
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ret = gpNandInfo->ftl_discard(LBA, sector);
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}
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return ret;
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}
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static int rknand_erase(struct mtd_info *mtd, struct erase_info *instr)
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{
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int ret = 0;
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if (instr->callback)
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instr->callback(instr);
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return ret;
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}
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static void rknand_sync(struct mtd_info *mtd)
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{
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NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk_nand_sync: \n");
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if(gpNandInfo->ftl_sync)
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gpNandInfo->ftl_sync();
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}
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extern void FtlWriteCacheEn(int);
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static int rknand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
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{
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int sector = len >> 9;
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int LBA = (int)(to >> 9);
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if (sector && gpNandInfo->ftl_write_panic) {
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if(gpNandInfo->ftl_cache_en)
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gpNandInfo->ftl_cache_en(0);
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gpNandInfo->ftl_write_panic(LBA, sector, (void *)buf);
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if(gpNandInfo->ftl_cache_en)
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gpNandInfo->ftl_cache_en(1);
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}
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*retlen = len;
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return 0;
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}
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int GetIdBlockSysData(char * buf, int Sector)
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{
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if(gpNandInfo->GetIdBlockSysData)
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return( gpNandInfo->GetIdBlockSysData( buf, Sector));
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return 0;
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}
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char GetSNSectorInfoBeforeNandInit(char * pbuf)
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{
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char * sn_addr = ioremap(0x10501600,0x200);
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memcpy(pbuf,sn_addr,0x200);
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iounmap(sn_addr);
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//print_hex_dump(KERN_WARNING, "sn:", DUMP_PREFIX_NONE, 16,1, sn_addr, 16, 0);
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return 0;
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}
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char GetSNSectorInfo(char * pbuf)
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{
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if(gpNandInfo->GetSNSectorInfo)
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return( gpNandInfo->GetSNSectorInfo( pbuf));
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else
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return GetSNSectorInfoBeforeNandInit(pbuf);
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return 0;
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}
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char GetVendor0InfoBeforeNandInit(char * pbuf)
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{
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char * sn_addr = ioremap(0x10501400,0x200);
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memcpy(pbuf,sn_addr + 8,504);
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iounmap(sn_addr);
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//print_hex_dump(KERN_WARNING, "sn:", DUMP_PREFIX_NONE, 16,1, sn_addr, 16, 0);
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return 0;
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}
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char GetChipSectorInfo(char * pbuf)
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{
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if(gpNandInfo->GetChipSectorInfo)
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return( gpNandInfo->GetChipSectorInfo( pbuf));
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return 0;
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}
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int GetParamterInfo(char * pbuf , int len)
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{
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int ret = -1;
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int sector = (len)>>9;
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int LBA = 0;
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if(sector && gpNandInfo->ftl_read)
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{
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ret = gpNandInfo->ftl_read(LBA, sector, pbuf);
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}
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return ret?-1:(sector<<9);
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}
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int GetflashDataByLba(int lba,char * pbuf , int len)
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{
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int ret = -1;
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int sector = (len)>>9;
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int LBA = lba;
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if(sector && gpNandInfo->ftl_read)
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{
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ret = gpNandInfo->ftl_read(LBA, sector, pbuf);
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}
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return ret?-1:(sector<<9);
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}
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void rknand_dev_cache_flush(void)
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{
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if(gpNandInfo->rknand_dev_cache_flush)
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gpNandInfo->rknand_dev_cache_flush();
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}
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static int rknand_block_isbad(struct mtd_info *mtd, loff_t ofs)
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{
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return 0;
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}
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static int rknand_block_markbad(struct mtd_info *mtd, loff_t ofs)
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{
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return 0;
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}
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static struct clk *nandc_clk;
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static unsigned long nandc_clk_rate = 0;
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static struct notifier_block nandc_freq_transition;
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/* cpufreq driver support */
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static int rknand_nand_timing_cfg(void)
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{
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unsigned long newclk;
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newclk = clk_get_rate(nandc_clk);
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//printk("rknand_nand_timing_cfg %d",newclk);
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if (newclk != nandc_clk_rate)
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{
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if(gpNandInfo->nand_timing_config)
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{
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nandc_clk_rate = newclk;
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//gpNandInfo->nand_timing_config( nandc_clk_rate / 1000); // KHz
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}
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}
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return 0;
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}
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static int rknand_info_init(struct rknand_info *nand_info)
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{
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struct mtd_info *mtd = &rknand_mtd;
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struct rknand_chip *rknand = &nand_info->rknand;
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rknand->state = FL_READY;
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rknand->rknand_schedule_enable = 1;
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rknand->pFlashCallBack = NULL;
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init_waitqueue_head(&rknand->wq);
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mtd->oobsize = 0;
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mtd->oobavail = 0;
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mtd->ecclayout = 0;
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mtd->erasesize = 32*0x200;
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mtd->writesize = 8*0x200;
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// Fill in remaining MTD driver data
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mtd->type = MTD_NANDFLASH;
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mtd->flags = (MTD_WRITEABLE|MTD_NO_ERASE);//
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mtd->_erase = rknand_erase;
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mtd->_point = NULL;
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mtd->_unpoint = NULL;
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mtd->_read = rknand_read;
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mtd->_write = rknand_write;
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//mtd->discard = rknand_diacard;
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mtd->_read_oob = NULL;
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mtd->_write_oob = NULL;
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mtd->_panic_write = rknand_panic_write;
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mtd->_sync = rknand_sync;
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mtd->_lock = NULL;
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mtd->_unlock = NULL;
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mtd->_suspend = NULL;
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mtd->_resume = NULL;
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mtd->_block_isbad = rknand_block_isbad;
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mtd->_block_markbad = rknand_block_markbad;
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mtd->owner = THIS_MODULE;
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return 0;
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}
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/*
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* CMY: Ôö¼ÓÁ˶ÔÃüÁîÐзÖÇøÐÅÏ¢µÄÖ§³Ö
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* ÈôcmdlineÓÐÌṩ·ÖÇøÐÅÏ¢£¬ÔòʹÓÃcmdlineµÄ·ÖÇøÐÅÏ¢½øÐзÖÇø
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* ÈôcmdlineûÓÐÌṩ·ÖÇøÐÅÏ¢£¬ÔòʹÓÃĬÈϵķÖÇøÐÅÏ¢(rk28_partition_info)½øÐзÖÇø
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*/
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#ifdef CONFIG_MTD_CMDLINE_PARTS
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const char *part_probes[] = { "cmdlinepart", NULL };
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#endif
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static int rknand_add_partitions(struct rknand_info *nand_info)
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{
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#ifdef CONFIG_MTD_CMDLINE_PARTS
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int num_partitions = 0;
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// ´ÓÃüÁîÐнâÎö·ÖÇøµÄÐÅÏ¢
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num_partitions = parse_mtd_partitions(&(rknand_mtd), part_probes, &rknand_parts, 0);
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NAND_DEBUG(NAND_DEBUG_LEVEL0,"num_partitions = %d\n",num_partitions);
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printk("num_partitions = %d\n",num_partitions);
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if(num_partitions > 0) {
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int i;
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for (i = 0; i < num_partitions; i++)
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{
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rknand_parts[i].offset *= 0x200;
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rknand_parts[i].size *=0x200;
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}
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rknand_parts[num_partitions - 1].size = rknand_mtd.size - rknand_parts[num_partitions - 1].offset;
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g_num_partitions = num_partitions;
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//#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
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// return mtd_device_register(&rknand_mtd, rknand_parts, num_partitions);
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//#else
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return add_mtd_partitions(&(rknand_mtd), rknand_parts, num_partitions);
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//#endif
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}
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#endif
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g_num_partitions = 0;
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return 0;
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}
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int add_rknand_device(struct rknand_info * prknand_Info)
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{
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struct mtd_partition *parts;
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int i;
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NAND_DEBUG(NAND_DEBUG_LEVEL0,"add_rknand_device: \n");
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printk("gpNandInfo->nandCapacity = %lx\n",gpNandInfo->nandCapacity);
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rknand_mtd.size = (uint64_t)gpNandInfo->nandCapacity*0x200;
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rknand_add_partitions(prknand_Info);
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parts = rknand_parts;
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SysImageWriteEndAdd = 0;
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for(i=0;i<g_num_partitions;i++)
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{
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//printk(">>> part[%d]: name=%s offset=0x%012llx\n", i, parts[i].name, parts[i].offset);
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if(strcmp(parts[i].name,"backup") == 0)
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{
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SysImageWriteEndAdd = (unsigned long)(parts[i].offset + parts[i].size)>>9;//sector
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//printk(">>> SysImageWriteEndAdd=0x%lx\n", SysImageWriteEndAdd);
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break;
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}
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}
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if(SysImageWriteEndAdd)
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gpNandInfo->SysImageWriteEndAdd = SysImageWriteEndAdd;
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//nandc_clk = clk_get(NULL, "nandc");
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//clk_enable(nandc_clk);
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//rknand_nand_timing_cfg();
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return 0;
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}
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int get_rknand_device(struct rknand_info ** prknand_Info)
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{
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*prknand_Info = gpNandInfo;
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return 0;
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}
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EXPORT_SYMBOL(get_rknand_device);
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int rknand_dma_map_single(unsigned long ptr,int size,int dir)
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{
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return dma_map_single(NULL, ptr,size, dir?DMA_TO_DEVICE:DMA_FROM_DEVICE);
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}
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EXPORT_SYMBOL(rknand_dma_map_single);
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void rknand_dma_unmap_single(unsigned long ptr,int size,int dir)
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{
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dma_unmap_single(NULL, ptr,size, dir?DMA_TO_DEVICE:DMA_FROM_DEVICE);
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}
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EXPORT_SYMBOL(rknand_dma_unmap_single);
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int rknand_flash_cs_init(void)
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{
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}
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EXPORT_SYMBOL(rknand_flash_cs_init);
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|
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int rknand_get_reg_addr(int *pNandc,int *pSDMMC0,int *pSDMMC1,int *pSDMMC2)
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{
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//*pNandc = ioremap(RK30_NANDC_PHYS,RK30_NANDC_SIZE);
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//*pSDMMC0 = ioremap(SDMMC0_BASE_ADDR, 0x4000);
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//*pSDMMC1 = ioremap(SDMMC1_BASE_ADDR, 0x4000);
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//*pSDMMC2 = ioremap(EMMC_BASE_ADDR, 0x4000);
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*pNandc = ioremap(0x10500000,0x4000);
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}
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EXPORT_SYMBOL(rknand_get_reg_addr);
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static int g_nandc_irq = 27;
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int rknand_nandc_irq_init(int mode,void * pfun)
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{
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int ret = 0;
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if(mode) //init
|
{
|
ret = request_irq(g_nandc_irq, pfun, 0, "nandc", NULL);
|
if(ret)
|
printk("request IRQ_NANDC irq , ret=%x.........\n", ret);
|
}
|
else //deinit
|
{
|
free_irq(g_nandc_irq, NULL);
|
}
|
return ret;
|
}
|
EXPORT_SYMBOL(rknand_nandc_irq_init);
|
static int rknand_probe(struct platform_device *pdev)
|
{
|
struct rknand_info *nand_info;
|
int err = 0;
|
NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk_nand_probe: \n");
|
gpNandInfo = kzalloc(sizeof(struct rknand_info), GFP_KERNEL);
|
if (!gpNandInfo)
|
return -ENOMEM;
|
|
nand_info = gpNandInfo;
|
printk("rknand_probe: \n");
|
|
g_nandc_irq = platform_get_irq(pdev, 0);
|
if (g_nandc_irq < 0) {
|
dev_err(&pdev->dev, "no irq resource?\n");
|
return g_nandc_irq;
|
}
|
|
memset(gpNandInfo,0,sizeof(struct rknand_info));
|
|
gpNandInfo->bufSize = MAX_BUFFER_SIZE * 512;
|
gpNandInfo->pbuf = (char *)NULL;//grknand_buf;
|
gpNandInfo->pdmaBuf = (char *)NULL;//grknand_dma_buf;
|
//printk(" gpNandInfo->pdmaBuf=0x%x\n", gpNandInfo->pdmaBuf);
|
#ifdef CONFIG_MTD_EMMC_CLK_POWER_SAVE
|
gpNandInfo->emmc_clk_power_save_en = 1;
|
#endif
|
|
rknand_mtd.name = DRIVER_NAME;//dev_name(&pdev->dev);
|
rknand_mtd.priv = &nand_info->rknand;
|
rknand_mtd.owner = THIS_MODULE;
|
|
if(rknand_info_init(nand_info))
|
{
|
err = -ENXIO;
|
goto exit_free;
|
}
|
|
nand_info->add_rknand_device = add_rknand_device;
|
nand_info->get_rknand_device = get_rknand_device;
|
|
rknand_create_procfs();
|
return 0;
|
|
exit_free:
|
if(nand_info)
|
kfree(nand_info);
|
|
return err;
|
}
|
|
static int rknand_suspend(struct platform_device *pdev, pm_message_t state)
|
{
|
gpNandInfo->rknand.rknand_schedule_enable = 0;
|
// if(gpNandInfo->rknand_suspend)
|
// gpNandInfo->rknand_suspend();
|
NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_suspend: \n");
|
return 0;
|
}
|
|
static int rknand_resume(struct platform_device *pdev)
|
{
|
//if(gpNandInfo->rknand_resume)
|
// gpNandInfo->rknand_resume();
|
gpNandInfo->rknand.rknand_schedule_enable = 1;
|
NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_resume: \n");
|
return 0;
|
}
|
|
void rknand_shutdown(struct platform_device *pdev)
|
{
|
printk("rknand_shutdown...\n");
|
gpNandInfo->rknand.rknand_schedule_enable = 0;
|
if(gpNandInfo->rknand_buffer_shutdown)
|
gpNandInfo->rknand_buffer_shutdown();
|
}
|
|
#ifdef CONFIG_OF
|
static const struct of_device_id of_rk_nandc_match[] = {
|
{ .compatible = "rockchip,rk-nandc" },
|
{ /* Sentinel */ }
|
};
|
#endif
|
|
static struct platform_driver rknand_driver = {
|
.probe = rknand_probe,
|
.suspend = rknand_suspend,
|
.resume = rknand_resume,
|
.shutdown = rknand_shutdown,
|
.driver = {
|
.name = DRIVER_NAME,
|
#ifdef CONFIG_OF
|
.of_match_table = of_rk_nandc_match,
|
#endif
|
.owner = THIS_MODULE,
|
},
|
};
|
|
|
MODULE_ALIAS(DRIVER_NAME);
|
|
static int __init rknand_init(void)
|
{
|
int ret;
|
NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_init: \n");
|
ret = platform_driver_register(&rknand_driver);
|
NAND_DEBUG(NAND_DEBUG_LEVEL0,"platform_driver_register:ret = %x \n",ret);
|
return ret;
|
}
|
|
static void __exit rknand_exit(void)
|
{
|
platform_driver_unregister(&rknand_driver);
|
}
|
|
module_init(rknand_init);
|
module_exit(rknand_exit);
|
|
MODULE_LICENSE("GPL");
|
MODULE_AUTHOR("ZYF <zyf@rock-chips.com>");
|
MODULE_DESCRIPTION("rknand driver.");
|
|
|
