// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Toradex AG
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*
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* Author: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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*/
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#include <linux/mtd/rawnand.h>
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#include "internals.h"
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static void esmt_nand_decode_id(struct nand_chip *chip)
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{
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struct nand_device *base = &chip->base;
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struct nand_ecc_props requirements = {};
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nand_decode_ext_id(chip);
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/* Extract ECC requirements from 5th id byte. */
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if (chip->id.len >= 5 && nand_is_slc(chip)) {
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requirements.step_size = 512;
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switch (chip->id.data[4] & 0x3) {
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case 0x0:
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requirements.strength = 4;
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break;
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case 0x1:
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requirements.strength = 2;
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break;
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case 0x2:
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requirements.strength = 1;
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break;
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default:
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WARN(1, "Could not get ECC info");
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requirements.step_size = 0;
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break;
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}
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}
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nanddev_set_ecc_requirements(base, &requirements);
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}
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static int esmt_nand_init(struct nand_chip *chip)
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{
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if (nand_is_slc(chip))
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/*
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* It is known that some ESMT SLC NANDs have been shipped
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* with the factory bad block markers in the first or last page
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* of the block, instead of the first or second page. To be on
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* the safe side, let's check all three locations.
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*/
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chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE |
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NAND_BBM_LASTPAGE;
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return 0;
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}
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const struct nand_manufacturer_ops esmt_nand_manuf_ops = {
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.detect = esmt_nand_decode_id,
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.init = esmt_nand_init,
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};
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