/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (c) 2001, 2003 Maciej W. Rozycki
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*
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* DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for
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* DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260
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* systems.
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*/
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#include <linux/ioport.h>
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#include <linux/mtd/mtd.h>
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/*
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* Addresses are decoded as follows:
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*
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* 0x000000 - 0x3fffff SRAM
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* 0x400000 - 0x7fffff CSR
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*
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* Within the SRAM area the following ranges are forced by the system
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* firmware:
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*
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* 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot
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* 0x000400 - ENDofRAM storage area, available to operating systems
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*
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* but we can't really use the available area right from 0x000400 as
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* the first word is used by the firmware as a status flag passed
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* from an operating system. If anything but the valid data magic
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* ID value is found, the firmware considers the SRAM clean, i.e.
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* containing no valid data, and disables the battery resulting in
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* data being erased as soon as power is switched off. So the choice
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* for the start address of the user-available is 0x001000 which is
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* nicely page aligned. The area between 0x000404 and 0x000fff may
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* be used by the driver for own needs.
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*
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* The diagnostic area defines two status words to be read by an
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* operating system, a magic ID to distinguish a MS02-NV board from
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* anything else and a status information providing results of tests
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* as well as the size of SRAM available, which can be 1MiB or 2MiB
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* (that's what the firmware handles; no idea if 2MiB modules ever
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* existed).
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*
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* The firmware only handles the MS02-NV board if installed in the
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* last (15th) slot, so for any other location the status information
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* stored in the SRAM cannot be relied upon. But from the hardware
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* point of view there is no problem using up to 14 such boards in a
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* system -- only the 1st slot needs to be filled with a DRAM module.
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* The MS02-NV board is ECC-protected, like other MS02 memory boards.
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*
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* The state of the battery as provided by the CSR is reflected on
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* the two onboard LEDs. When facing the battery side of the board,
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* with the LEDs at the top left and the battery at the bottom right
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* (i.e. looking from the back side of the system box), their meaning
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* is as follows (the system has to be powered on):
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*
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* left LED battery disable status: lit = enabled
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* right LED battery condition status: lit = OK
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*/
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/* MS02-NV iomem register offsets. */
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#define MS02NV_CSR 0x400000 /* control & status register */
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/* MS02-NV CSR status bits. */
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#define MS02NV_CSR_BATT_OK 0x01 /* battery OK */
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#define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */
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/* MS02-NV memory offsets. */
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#define MS02NV_DIAG 0x0003f8 /* diagnostic status */
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#define MS02NV_MAGIC 0x0003fc /* MS02-NV magic ID */
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#define MS02NV_VALID 0x000400 /* valid data magic ID */
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#define MS02NV_RAM 0x001000 /* user-exposed RAM start */
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/* MS02-NV diagnostic status bits. */
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#define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */
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#define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */
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#define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */
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#define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */
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#define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */
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#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* SRAM size shift (left) */
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/* MS02-NV general constants. */
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#define MS02NV_ID 0x03021966 /* MS02-NV magic ID value */
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#define MS02NV_VALID_ID 0xbd100248 /* valid data magic ID value */
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#define MS02NV_SLOT_SIZE 0x800000 /* size of the address space
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decoded by the module */
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typedef volatile u32 ms02nv_uint;
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struct ms02nv_private {
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struct mtd_info *next;
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struct {
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struct resource *module;
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struct resource *diag_ram;
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struct resource *user_ram;
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struct resource *csr;
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} resource;
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u_char *addr;
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size_t size;
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u_char *uaddr;
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};
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