1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
| /* SPDX-License-Identifier: GPL-2.0-only */
| /*
| * linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
| *
| * Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.
| */
|
| enum s3cmci_waitfor {
| COMPLETION_NONE,
| COMPLETION_FINALIZE,
| COMPLETION_CMDSENT,
| COMPLETION_RSPFIN,
| COMPLETION_XFERFINISH,
| COMPLETION_XFERFINISH_RSPFIN,
| };
|
| struct s3cmci_host {
| struct platform_device *pdev;
| struct s3c24xx_mci_pdata *pdata;
| struct mmc_host *mmc;
| struct resource *mem;
| struct clk *clk;
| void __iomem *base;
| int irq;
| int irq_cd;
| struct dma_chan *dma;
|
| unsigned long clk_rate;
| unsigned long clk_div;
| unsigned long real_rate;
| u8 prescaler;
|
| int is2440;
| unsigned sdiimsk;
| unsigned sdidata;
|
| bool irq_disabled;
| bool irq_enabled;
| bool irq_state;
| int sdio_irqen;
|
| struct mmc_request *mrq;
| int cmd_is_stop;
|
| spinlock_t complete_lock;
| enum s3cmci_waitfor complete_what;
|
| int dma_complete;
|
| u32 pio_sgptr;
| u32 pio_bytes;
| u32 pio_count;
| u32 *pio_ptr;
| #define XFER_NONE 0
| #define XFER_READ 1
| #define XFER_WRITE 2
| u32 pio_active;
|
| int bus_width;
|
| char dbgmsg_cmd[301];
| char dbgmsg_dat[301];
| char *status;
|
| unsigned int ccnt, dcnt;
| struct tasklet_struct pio_tasklet;
|
| #ifdef CONFIG_DEBUG_FS
| struct dentry *debug_root;
| #endif
|
| #ifdef CONFIG_ARM_S3C24XX_CPUFREQ
| struct notifier_block freq_transition;
| #endif
| };
|
|
