/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_TPC7_NRTR_REGS_H_
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#define ASIC_REG_TPC7_NRTR_REGS_H_
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/*
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*****************************************
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* TPC7_NRTR (Prototype: IF_NRTR)
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*****************************************
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*/
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#define mmTPC7_NRTR_HBW_MAX_CRED 0xFC0100
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#define mmTPC7_NRTR_LBW_MAX_CRED 0xFC0120
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#define mmTPC7_NRTR_DBG_E_ARB 0xFC0300
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#define mmTPC7_NRTR_DBG_W_ARB 0xFC0304
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#define mmTPC7_NRTR_DBG_N_ARB 0xFC0308
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#define mmTPC7_NRTR_DBG_S_ARB 0xFC030C
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#define mmTPC7_NRTR_DBG_L_ARB 0xFC0310
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#define mmTPC7_NRTR_DBG_E_ARB_MAX 0xFC0320
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#define mmTPC7_NRTR_DBG_W_ARB_MAX 0xFC0324
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#define mmTPC7_NRTR_DBG_N_ARB_MAX 0xFC0328
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#define mmTPC7_NRTR_DBG_S_ARB_MAX 0xFC032C
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#define mmTPC7_NRTR_DBG_L_ARB_MAX 0xFC0330
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#define mmTPC7_NRTR_SPLIT_COEF_0 0xFC0400
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#define mmTPC7_NRTR_SPLIT_COEF_1 0xFC0404
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#define mmTPC7_NRTR_SPLIT_COEF_2 0xFC0408
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#define mmTPC7_NRTR_SPLIT_COEF_3 0xFC040C
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#define mmTPC7_NRTR_SPLIT_COEF_4 0xFC0410
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#define mmTPC7_NRTR_SPLIT_COEF_5 0xFC0414
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#define mmTPC7_NRTR_SPLIT_COEF_6 0xFC0418
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#define mmTPC7_NRTR_SPLIT_COEF_7 0xFC041C
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#define mmTPC7_NRTR_SPLIT_COEF_8 0xFC0420
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#define mmTPC7_NRTR_SPLIT_COEF_9 0xFC0424
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#define mmTPC7_NRTR_SPLIT_CFG 0xFC0440
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#define mmTPC7_NRTR_SPLIT_RD_SAT 0xFC0444
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#define mmTPC7_NRTR_SPLIT_RD_RST_TOKEN 0xFC0448
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#define mmTPC7_NRTR_SPLIT_RD_TIMEOUT_0 0xFC044C
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#define mmTPC7_NRTR_SPLIT_RD_TIMEOUT_1 0xFC0450
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#define mmTPC7_NRTR_SPLIT_WR_SAT 0xFC0454
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#define mmTPC7_NRTR_WPLIT_WR_TST_TOLEN 0xFC0458
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#define mmTPC7_NRTR_SPLIT_WR_TIMEOUT_0 0xFC045C
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#define mmTPC7_NRTR_SPLIT_WR_TIMEOUT_1 0xFC0460
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#define mmTPC7_NRTR_HBW_RANGE_HIT 0xFC0470
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#define mmTPC7_NRTR_HBW_RANGE_MASK_L_0 0xFC0480
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#define mmTPC7_NRTR_HBW_RANGE_MASK_L_1 0xFC0484
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#define mmTPC7_NRTR_HBW_RANGE_MASK_L_2 0xFC0488
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#define mmTPC7_NRTR_HBW_RANGE_MASK_L_3 0xFC048C
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#define mmTPC7_NRTR_HBW_RANGE_MASK_L_4 0xFC0490
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#define mmTPC7_NRTR_HBW_RANGE_MASK_L_5 0xFC0494
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#define mmTPC7_NRTR_HBW_RANGE_MASK_L_6 0xFC0498
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#define mmTPC7_NRTR_HBW_RANGE_MASK_L_7 0xFC049C
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#define mmTPC7_NRTR_HBW_RANGE_MASK_H_0 0xFC04A0
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#define mmTPC7_NRTR_HBW_RANGE_MASK_H_1 0xFC04A4
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#define mmTPC7_NRTR_HBW_RANGE_MASK_H_2 0xFC04A8
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#define mmTPC7_NRTR_HBW_RANGE_MASK_H_3 0xFC04AC
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#define mmTPC7_NRTR_HBW_RANGE_MASK_H_4 0xFC04B0
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#define mmTPC7_NRTR_HBW_RANGE_MASK_H_5 0xFC04B4
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#define mmTPC7_NRTR_HBW_RANGE_MASK_H_6 0xFC04B8
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#define mmTPC7_NRTR_HBW_RANGE_MASK_H_7 0xFC04BC
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#define mmTPC7_NRTR_HBW_RANGE_BASE_L_0 0xFC04C0
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#define mmTPC7_NRTR_HBW_RANGE_BASE_L_1 0xFC04C4
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#define mmTPC7_NRTR_HBW_RANGE_BASE_L_2 0xFC04C8
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#define mmTPC7_NRTR_HBW_RANGE_BASE_L_3 0xFC04CC
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#define mmTPC7_NRTR_HBW_RANGE_BASE_L_4 0xFC04D0
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#define mmTPC7_NRTR_HBW_RANGE_BASE_L_5 0xFC04D4
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#define mmTPC7_NRTR_HBW_RANGE_BASE_L_6 0xFC04D8
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#define mmTPC7_NRTR_HBW_RANGE_BASE_L_7 0xFC04DC
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#define mmTPC7_NRTR_HBW_RANGE_BASE_H_0 0xFC04E0
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#define mmTPC7_NRTR_HBW_RANGE_BASE_H_1 0xFC04E4
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#define mmTPC7_NRTR_HBW_RANGE_BASE_H_2 0xFC04E8
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#define mmTPC7_NRTR_HBW_RANGE_BASE_H_3 0xFC04EC
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#define mmTPC7_NRTR_HBW_RANGE_BASE_H_4 0xFC04F0
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#define mmTPC7_NRTR_HBW_RANGE_BASE_H_5 0xFC04F4
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#define mmTPC7_NRTR_HBW_RANGE_BASE_H_6 0xFC04F8
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#define mmTPC7_NRTR_HBW_RANGE_BASE_H_7 0xFC04FC
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#define mmTPC7_NRTR_LBW_RANGE_HIT 0xFC0500
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#define mmTPC7_NRTR_LBW_RANGE_MASK_0 0xFC0510
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#define mmTPC7_NRTR_LBW_RANGE_MASK_1 0xFC0514
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#define mmTPC7_NRTR_LBW_RANGE_MASK_2 0xFC0518
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#define mmTPC7_NRTR_LBW_RANGE_MASK_3 0xFC051C
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#define mmTPC7_NRTR_LBW_RANGE_MASK_4 0xFC0520
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#define mmTPC7_NRTR_LBW_RANGE_MASK_5 0xFC0524
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#define mmTPC7_NRTR_LBW_RANGE_MASK_6 0xFC0528
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#define mmTPC7_NRTR_LBW_RANGE_MASK_7 0xFC052C
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#define mmTPC7_NRTR_LBW_RANGE_MASK_8 0xFC0530
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#define mmTPC7_NRTR_LBW_RANGE_MASK_9 0xFC0534
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#define mmTPC7_NRTR_LBW_RANGE_MASK_10 0xFC0538
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#define mmTPC7_NRTR_LBW_RANGE_MASK_11 0xFC053C
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#define mmTPC7_NRTR_LBW_RANGE_MASK_12 0xFC0540
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#define mmTPC7_NRTR_LBW_RANGE_MASK_13 0xFC0544
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#define mmTPC7_NRTR_LBW_RANGE_MASK_14 0xFC0548
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#define mmTPC7_NRTR_LBW_RANGE_MASK_15 0xFC054C
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#define mmTPC7_NRTR_LBW_RANGE_BASE_0 0xFC0550
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#define mmTPC7_NRTR_LBW_RANGE_BASE_1 0xFC0554
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#define mmTPC7_NRTR_LBW_RANGE_BASE_2 0xFC0558
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#define mmTPC7_NRTR_LBW_RANGE_BASE_3 0xFC055C
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#define mmTPC7_NRTR_LBW_RANGE_BASE_4 0xFC0560
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#define mmTPC7_NRTR_LBW_RANGE_BASE_5 0xFC0564
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#define mmTPC7_NRTR_LBW_RANGE_BASE_6 0xFC0568
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#define mmTPC7_NRTR_LBW_RANGE_BASE_7 0xFC056C
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#define mmTPC7_NRTR_LBW_RANGE_BASE_8 0xFC0570
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#define mmTPC7_NRTR_LBW_RANGE_BASE_9 0xFC0574
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#define mmTPC7_NRTR_LBW_RANGE_BASE_10 0xFC0578
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#define mmTPC7_NRTR_LBW_RANGE_BASE_11 0xFC057C
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#define mmTPC7_NRTR_LBW_RANGE_BASE_12 0xFC0580
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#define mmTPC7_NRTR_LBW_RANGE_BASE_13 0xFC0584
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#define mmTPC7_NRTR_LBW_RANGE_BASE_14 0xFC0588
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#define mmTPC7_NRTR_LBW_RANGE_BASE_15 0xFC058C
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#define mmTPC7_NRTR_RGLTR 0xFC0590
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#define mmTPC7_NRTR_RGLTR_WR_RESULT 0xFC0594
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#define mmTPC7_NRTR_RGLTR_RD_RESULT 0xFC0598
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#define mmTPC7_NRTR_SCRAMB_EN 0xFC0600
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#define mmTPC7_NRTR_NON_LIN_SCRAMB 0xFC0604
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#endif /* ASIC_REG_TPC7_NRTR_REGS_H_ */
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