/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_TPC4_RTR_REGS_H_
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#define ASIC_REG_TPC4_RTR_REGS_H_
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/*
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*****************************************
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* TPC4_RTR (Prototype: TPC_RTR)
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*****************************************
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*/
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#define mmTPC4_RTR_HBW_RD_RQ_E_ARB 0xF00100
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#define mmTPC4_RTR_HBW_RD_RQ_W_ARB 0xF00104
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#define mmTPC4_RTR_HBW_RD_RQ_N_ARB 0xF00108
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#define mmTPC4_RTR_HBW_RD_RQ_S_ARB 0xF0010C
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#define mmTPC4_RTR_HBW_RD_RQ_L_ARB 0xF00110
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#define mmTPC4_RTR_HBW_E_ARB_MAX 0xF00120
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#define mmTPC4_RTR_HBW_W_ARB_MAX 0xF00124
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#define mmTPC4_RTR_HBW_N_ARB_MAX 0xF00128
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#define mmTPC4_RTR_HBW_S_ARB_MAX 0xF0012C
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#define mmTPC4_RTR_HBW_L_ARB_MAX 0xF00130
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#define mmTPC4_RTR_HBW_RD_RS_E_ARB 0xF00140
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#define mmTPC4_RTR_HBW_RD_RS_W_ARB 0xF00144
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#define mmTPC4_RTR_HBW_RD_RS_N_ARB 0xF00148
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#define mmTPC4_RTR_HBW_RD_RS_S_ARB 0xF0014C
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#define mmTPC4_RTR_HBW_RD_RS_L_ARB 0xF00150
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#define mmTPC4_RTR_HBW_WR_RQ_E_ARB 0xF00170
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#define mmTPC4_RTR_HBW_WR_RQ_W_ARB 0xF00174
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#define mmTPC4_RTR_HBW_WR_RQ_N_ARB 0xF00178
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#define mmTPC4_RTR_HBW_WR_RQ_S_ARB 0xF0017C
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#define mmTPC4_RTR_HBW_WR_RQ_L_ARB 0xF00180
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#define mmTPC4_RTR_HBW_WR_RS_E_ARB 0xF00190
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#define mmTPC4_RTR_HBW_WR_RS_W_ARB 0xF00194
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#define mmTPC4_RTR_HBW_WR_RS_N_ARB 0xF00198
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#define mmTPC4_RTR_HBW_WR_RS_S_ARB 0xF0019C
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#define mmTPC4_RTR_HBW_WR_RS_L_ARB 0xF001A0
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#define mmTPC4_RTR_LBW_RD_RQ_E_ARB 0xF00200
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#define mmTPC4_RTR_LBW_RD_RQ_W_ARB 0xF00204
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#define mmTPC4_RTR_LBW_RD_RQ_N_ARB 0xF00208
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#define mmTPC4_RTR_LBW_RD_RQ_S_ARB 0xF0020C
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#define mmTPC4_RTR_LBW_RD_RQ_L_ARB 0xF00210
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#define mmTPC4_RTR_LBW_E_ARB_MAX 0xF00220
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#define mmTPC4_RTR_LBW_W_ARB_MAX 0xF00224
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#define mmTPC4_RTR_LBW_N_ARB_MAX 0xF00228
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#define mmTPC4_RTR_LBW_S_ARB_MAX 0xF0022C
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#define mmTPC4_RTR_LBW_L_ARB_MAX 0xF00230
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#define mmTPC4_RTR_LBW_RD_RS_E_ARB 0xF00250
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#define mmTPC4_RTR_LBW_RD_RS_W_ARB 0xF00254
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#define mmTPC4_RTR_LBW_RD_RS_N_ARB 0xF00258
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#define mmTPC4_RTR_LBW_RD_RS_S_ARB 0xF0025C
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#define mmTPC4_RTR_LBW_RD_RS_L_ARB 0xF00260
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#define mmTPC4_RTR_LBW_WR_RQ_E_ARB 0xF00270
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#define mmTPC4_RTR_LBW_WR_RQ_W_ARB 0xF00274
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#define mmTPC4_RTR_LBW_WR_RQ_N_ARB 0xF00278
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#define mmTPC4_RTR_LBW_WR_RQ_S_ARB 0xF0027C
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#define mmTPC4_RTR_LBW_WR_RQ_L_ARB 0xF00280
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#define mmTPC4_RTR_LBW_WR_RS_E_ARB 0xF00290
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#define mmTPC4_RTR_LBW_WR_RS_W_ARB 0xF00294
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#define mmTPC4_RTR_LBW_WR_RS_N_ARB 0xF00298
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#define mmTPC4_RTR_LBW_WR_RS_S_ARB 0xF0029C
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#define mmTPC4_RTR_LBW_WR_RS_L_ARB 0xF002A0
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#define mmTPC4_RTR_DBG_E_ARB 0xF00300
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#define mmTPC4_RTR_DBG_W_ARB 0xF00304
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#define mmTPC4_RTR_DBG_N_ARB 0xF00308
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#define mmTPC4_RTR_DBG_S_ARB 0xF0030C
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#define mmTPC4_RTR_DBG_L_ARB 0xF00310
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#define mmTPC4_RTR_DBG_E_ARB_MAX 0xF00320
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#define mmTPC4_RTR_DBG_W_ARB_MAX 0xF00324
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#define mmTPC4_RTR_DBG_N_ARB_MAX 0xF00328
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#define mmTPC4_RTR_DBG_S_ARB_MAX 0xF0032C
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#define mmTPC4_RTR_DBG_L_ARB_MAX 0xF00330
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#define mmTPC4_RTR_SPLIT_COEF_0 0xF00400
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#define mmTPC4_RTR_SPLIT_COEF_1 0xF00404
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#define mmTPC4_RTR_SPLIT_COEF_2 0xF00408
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#define mmTPC4_RTR_SPLIT_COEF_3 0xF0040C
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#define mmTPC4_RTR_SPLIT_COEF_4 0xF00410
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#define mmTPC4_RTR_SPLIT_COEF_5 0xF00414
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#define mmTPC4_RTR_SPLIT_COEF_6 0xF00418
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#define mmTPC4_RTR_SPLIT_COEF_7 0xF0041C
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#define mmTPC4_RTR_SPLIT_COEF_8 0xF00420
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#define mmTPC4_RTR_SPLIT_COEF_9 0xF00424
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#define mmTPC4_RTR_SPLIT_CFG 0xF00440
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#define mmTPC4_RTR_SPLIT_RD_SAT 0xF00444
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#define mmTPC4_RTR_SPLIT_RD_RST_TOKEN 0xF00448
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#define mmTPC4_RTR_SPLIT_RD_TIMEOUT_0 0xF0044C
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#define mmTPC4_RTR_SPLIT_RD_TIMEOUT_1 0xF00450
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#define mmTPC4_RTR_SPLIT_WR_SAT 0xF00454
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#define mmTPC4_RTR_WPLIT_WR_TST_TOLEN 0xF00458
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#define mmTPC4_RTR_SPLIT_WR_TIMEOUT_0 0xF0045C
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#define mmTPC4_RTR_SPLIT_WR_TIMEOUT_1 0xF00460
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#define mmTPC4_RTR_HBW_RANGE_HIT 0xF00470
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#define mmTPC4_RTR_HBW_RANGE_MASK_L_0 0xF00480
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#define mmTPC4_RTR_HBW_RANGE_MASK_L_1 0xF00484
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#define mmTPC4_RTR_HBW_RANGE_MASK_L_2 0xF00488
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#define mmTPC4_RTR_HBW_RANGE_MASK_L_3 0xF0048C
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#define mmTPC4_RTR_HBW_RANGE_MASK_L_4 0xF00490
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#define mmTPC4_RTR_HBW_RANGE_MASK_L_5 0xF00494
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#define mmTPC4_RTR_HBW_RANGE_MASK_L_6 0xF00498
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#define mmTPC4_RTR_HBW_RANGE_MASK_L_7 0xF0049C
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#define mmTPC4_RTR_HBW_RANGE_MASK_H_0 0xF004A0
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#define mmTPC4_RTR_HBW_RANGE_MASK_H_1 0xF004A4
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#define mmTPC4_RTR_HBW_RANGE_MASK_H_2 0xF004A8
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#define mmTPC4_RTR_HBW_RANGE_MASK_H_3 0xF004AC
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#define mmTPC4_RTR_HBW_RANGE_MASK_H_4 0xF004B0
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#define mmTPC4_RTR_HBW_RANGE_MASK_H_5 0xF004B4
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#define mmTPC4_RTR_HBW_RANGE_MASK_H_6 0xF004B8
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#define mmTPC4_RTR_HBW_RANGE_MASK_H_7 0xF004BC
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#define mmTPC4_RTR_HBW_RANGE_BASE_L_0 0xF004C0
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#define mmTPC4_RTR_HBW_RANGE_BASE_L_1 0xF004C4
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#define mmTPC4_RTR_HBW_RANGE_BASE_L_2 0xF004C8
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#define mmTPC4_RTR_HBW_RANGE_BASE_L_3 0xF004CC
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#define mmTPC4_RTR_HBW_RANGE_BASE_L_4 0xF004D0
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#define mmTPC4_RTR_HBW_RANGE_BASE_L_5 0xF004D4
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#define mmTPC4_RTR_HBW_RANGE_BASE_L_6 0xF004D8
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#define mmTPC4_RTR_HBW_RANGE_BASE_L_7 0xF004DC
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#define mmTPC4_RTR_HBW_RANGE_BASE_H_0 0xF004E0
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#define mmTPC4_RTR_HBW_RANGE_BASE_H_1 0xF004E4
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#define mmTPC4_RTR_HBW_RANGE_BASE_H_2 0xF004E8
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#define mmTPC4_RTR_HBW_RANGE_BASE_H_3 0xF004EC
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#define mmTPC4_RTR_HBW_RANGE_BASE_H_4 0xF004F0
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#define mmTPC4_RTR_HBW_RANGE_BASE_H_5 0xF004F4
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#define mmTPC4_RTR_HBW_RANGE_BASE_H_6 0xF004F8
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#define mmTPC4_RTR_HBW_RANGE_BASE_H_7 0xF004FC
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#define mmTPC4_RTR_LBW_RANGE_HIT 0xF00500
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#define mmTPC4_RTR_LBW_RANGE_MASK_0 0xF00510
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#define mmTPC4_RTR_LBW_RANGE_MASK_1 0xF00514
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#define mmTPC4_RTR_LBW_RANGE_MASK_2 0xF00518
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#define mmTPC4_RTR_LBW_RANGE_MASK_3 0xF0051C
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#define mmTPC4_RTR_LBW_RANGE_MASK_4 0xF00520
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#define mmTPC4_RTR_LBW_RANGE_MASK_5 0xF00524
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#define mmTPC4_RTR_LBW_RANGE_MASK_6 0xF00528
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#define mmTPC4_RTR_LBW_RANGE_MASK_7 0xF0052C
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#define mmTPC4_RTR_LBW_RANGE_MASK_8 0xF00530
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#define mmTPC4_RTR_LBW_RANGE_MASK_9 0xF00534
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#define mmTPC4_RTR_LBW_RANGE_MASK_10 0xF00538
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#define mmTPC4_RTR_LBW_RANGE_MASK_11 0xF0053C
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#define mmTPC4_RTR_LBW_RANGE_MASK_12 0xF00540
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#define mmTPC4_RTR_LBW_RANGE_MASK_13 0xF00544
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#define mmTPC4_RTR_LBW_RANGE_MASK_14 0xF00548
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#define mmTPC4_RTR_LBW_RANGE_MASK_15 0xF0054C
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#define mmTPC4_RTR_LBW_RANGE_BASE_0 0xF00550
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#define mmTPC4_RTR_LBW_RANGE_BASE_1 0xF00554
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#define mmTPC4_RTR_LBW_RANGE_BASE_2 0xF00558
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#define mmTPC4_RTR_LBW_RANGE_BASE_3 0xF0055C
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#define mmTPC4_RTR_LBW_RANGE_BASE_4 0xF00560
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#define mmTPC4_RTR_LBW_RANGE_BASE_5 0xF00564
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#define mmTPC4_RTR_LBW_RANGE_BASE_6 0xF00568
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#define mmTPC4_RTR_LBW_RANGE_BASE_7 0xF0056C
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#define mmTPC4_RTR_LBW_RANGE_BASE_8 0xF00570
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#define mmTPC4_RTR_LBW_RANGE_BASE_9 0xF00574
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#define mmTPC4_RTR_LBW_RANGE_BASE_10 0xF00578
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#define mmTPC4_RTR_LBW_RANGE_BASE_11 0xF0057C
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#define mmTPC4_RTR_LBW_RANGE_BASE_12 0xF00580
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#define mmTPC4_RTR_LBW_RANGE_BASE_13 0xF00584
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#define mmTPC4_RTR_LBW_RANGE_BASE_14 0xF00588
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#define mmTPC4_RTR_LBW_RANGE_BASE_15 0xF0058C
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#define mmTPC4_RTR_RGLTR 0xF00590
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#define mmTPC4_RTR_RGLTR_WR_RESULT 0xF00594
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#define mmTPC4_RTR_RGLTR_RD_RESULT 0xF00598
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#define mmTPC4_RTR_SCRAMB_EN 0xF00600
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#define mmTPC4_RTR_NON_LIN_SCRAMB 0xF00604
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#endif /* ASIC_REG_TPC4_RTR_REGS_H_ */
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