/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_TPC0_EML_CFG_REGS_H_
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#define ASIC_REG_TPC0_EML_CFG_REGS_H_
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/*
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*****************************************
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* TPC0_EML_CFG (Prototype: TPC_EML_CFG)
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*****************************************
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*/
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#define mmTPC0_EML_CFG_DBG_CNT 0x3040000
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#define mmTPC0_EML_CFG_DBG_STS 0x3040004
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#define mmTPC0_EML_CFG_DBG_PADD_0 0x3040008
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#define mmTPC0_EML_CFG_DBG_PADD_1 0x304000C
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#define mmTPC0_EML_CFG_DBG_PADD_2 0x3040010
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#define mmTPC0_EML_CFG_DBG_PADD_3 0x3040014
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#define mmTPC0_EML_CFG_DBG_PADD_4 0x3040018
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#define mmTPC0_EML_CFG_DBG_PADD_5 0x304001C
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#define mmTPC0_EML_CFG_DBG_PADD_6 0x3040020
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#define mmTPC0_EML_CFG_DBG_PADD_7 0x3040024
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_0 0x3040028
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_1 0x304002C
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_2 0x3040030
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_3 0x3040034
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_4 0x3040038
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_5 0x304003C
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_6 0x3040040
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_7 0x3040044
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_MATCH_0 0x3040048
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_MATCH_1 0x304004C
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_MATCH_2 0x3040050
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_MATCH_3 0x3040054
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_MATCH_4 0x3040058
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_MATCH_5 0x304005C
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_MATCH_6 0x3040060
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#define mmTPC0_EML_CFG_DBG_PADD_COUNT_MATCH_7 0x3040064
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#define mmTPC0_EML_CFG_DBG_PADD_EN 0x3040068
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#define mmTPC0_EML_CFG_DBG_VPADD_HIGH_0 0x304006C
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#define mmTPC0_EML_CFG_DBG_VPADD_HIGH_1 0x3040070
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#define mmTPC0_EML_CFG_DBG_VPADD_LOW_0 0x3040074
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#define mmTPC0_EML_CFG_DBG_VPADD_LOW_1 0x3040078
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#define mmTPC0_EML_CFG_DBG_VPADD_COUNT_0 0x304007C
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#define mmTPC0_EML_CFG_DBG_VPADD_COUNT_1 0x3040080
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#define mmTPC0_EML_CFG_DBG_VPADD_COUNT_MATCH_0 0x3040084
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#define mmTPC0_EML_CFG_DBG_VPADD_COUNT_MATCH_1 0x3040088
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#define mmTPC0_EML_CFG_DBG_VPADD_EN 0x304008C
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#define mmTPC0_EML_CFG_DBG_SPADD_HIGH_0 0x3040090
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#define mmTPC0_EML_CFG_DBG_SPADD_HIGH_1 0x3040094
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#define mmTPC0_EML_CFG_DBG_SPADD_LOW_0 0x3040098
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#define mmTPC0_EML_CFG_DBG_SPADD_LOW_1 0x304009C
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#define mmTPC0_EML_CFG_DBG_SPADD_COUNT_0 0x30400A0
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#define mmTPC0_EML_CFG_DBG_SPADD_COUNT_1 0x30400A4
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#define mmTPC0_EML_CFG_DBG_SPADD_COUNT_MATCH_0 0x30400A8
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#define mmTPC0_EML_CFG_DBG_SPADD_COUNT_MATCH_1 0x30400AC
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#define mmTPC0_EML_CFG_DBG_SPADD_EN 0x30400B0
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#define mmTPC0_EML_CFG_DBG_AGUADD_MSB_HIGH_0 0x30400B4
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#define mmTPC0_EML_CFG_DBG_AGUADD_MSB_HIGH_1 0x30400B8
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#define mmTPC0_EML_CFG_DBG_AGUADD_MSB_LOW_0 0x30400BC
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#define mmTPC0_EML_CFG_DBG_AGUADD_MSB_LOW_1 0x30400C0
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#define mmTPC0_EML_CFG_DBG_AGUADD_LSB_HIGH_0 0x30400C4
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#define mmTPC0_EML_CFG_DBG_AGUADD_LSB_HIGH_1 0x30400C8
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#define mmTPC0_EML_CFG_DBG_AGUADD_LSB_LOW_0 0x30400CC
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#define mmTPC0_EML_CFG_DBG_AGUADD_LSB_LOW_1 0x30400D0
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#define mmTPC0_EML_CFG_DBG_AGUADD_COUNT_0 0x30400D4
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#define mmTPC0_EML_CFG_DBG_AGUADD_COUNT_1 0x30400D8
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#define mmTPC0_EML_CFG_DBG_AGUADD_COUNT_MATCH_0 0x30400DC
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#define mmTPC0_EML_CFG_DBG_AGUADD_COUNT_MATCH_1 0x30400E0
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#define mmTPC0_EML_CFG_DBG_AGUADD_EN 0x30400E4
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_MSB_HIGH_0 0x30400E8
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_MSB_HIGH_1 0x30400EC
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_MSB_LOW_0 0x30400F0
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_MSB_LOW_1 0x30400F4
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_LSB_HIGH_0 0x30400F8
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_LSB_HIGH_1 0x30400FC
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_LSB_LOW_0 0x3040100
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_LSB_LOW_1 0x3040104
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_COUNT_0 0x3040108
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_COUNT_1 0x304010C
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_COUNT_MATCH_0 0x3040110
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_COUNT_MATCH_1 0x3040114
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#define mmTPC0_EML_CFG_DBG_AXIHBWADD_EN 0x3040118
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_MSB_HIGH_0 0x304011C
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_MSB_HIGH_1 0x3040120
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_MSB_LOW_0 0x3040124
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_MSB_LOW_1 0x3040128
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_LSB_HIGH_0 0x304012C
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_LSB_HIGH_1 0x3040130
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_LSB_LOW_0 0x3040134
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_LSB_LOW_1 0x3040138
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_COUNT_0 0x304013C
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_COUNT_1 0x3040140
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_COUNT_MATCH_0 0x3040144
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_COUNT_MATCH_1 0x3040148
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#define mmTPC0_EML_CFG_DBG_AXILBWADD_EN 0x304014C
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#define mmTPC0_EML_CFG_DBG_SPDATA_0 0x3040150
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#define mmTPC0_EML_CFG_DBG_SPDATA_1 0x3040154
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#define mmTPC0_EML_CFG_DBG_SPDATA_COUNT_0 0x3040158
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#define mmTPC0_EML_CFG_DBG_SPDATA_COUNT_1 0x304015C
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#define mmTPC0_EML_CFG_DBG_SPDATA_COUNT_MATCH_0 0x3040160
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#define mmTPC0_EML_CFG_DBG_SPDATA_COUNT_MATCH_1 0x3040164
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#define mmTPC0_EML_CFG_DBG_SPDATA_EN 0x3040168
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_0 0x304016C
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_1 0x3040170
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_2 0x3040174
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_3 0x3040178
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_4 0x304017C
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_5 0x3040180
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_6 0x3040184
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_7 0x3040188
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_8 0x304018C
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_9 0x3040190
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_10 0x3040194
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_11 0x3040198
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_12 0x304019C
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_13 0x30401A0
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_14 0x30401A4
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_15 0x30401A8
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_16 0x30401AC
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_17 0x30401B0
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_18 0x30401B4
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_19 0x30401B8
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_20 0x30401BC
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_21 0x30401C0
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_22 0x30401C4
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_23 0x30401C8
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_24 0x30401CC
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_25 0x30401D0
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_26 0x30401D4
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_27 0x30401D8
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_28 0x30401DC
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_29 0x30401E0
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_30 0x30401E4
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_31 0x30401E8
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_COUNT 0x30401EC
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#define mmTPC0_EML_CFG_DBG_AXIHBWDAT_COUNT_MATCH 0x30401F0
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#define mmTPC0_EML_CFG_DBG_AXIHBWDATA_EN 0x30401F4
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#define mmTPC0_EML_CFG_DBG_AXILBWDATA 0x30401F8
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#define mmTPC0_EML_CFG_DBG_AXILBWDATA_COUNT 0x30401FC
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#define mmTPC0_EML_CFG_DBG_AXILBWDAT_COUNT_MATCH 0x3040200
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#define mmTPC0_EML_CFG_DBG_AXILBWDATA_EN 0x3040204
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#define mmTPC0_EML_CFG_DBG_D0_PC 0x3040208
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#define mmTPC0_EML_CFG_RTTCONFIG 0x3040300
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#define mmTPC0_EML_CFG_RTTPREDICATE 0x3040304
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#define mmTPC0_EML_CFG_RTTPREDICATE_INTV 0x3040308
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#define mmTPC0_EML_CFG_RTTTS 0x304030C
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#define mmTPC0_EML_CFG_RTTTS_INTV 0x3040310
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_0 0x3040314
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_1 0x3040318
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_2 0x304031C
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_3 0x3040320
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_4 0x3040324
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_5 0x3040328
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_6 0x304032C
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_7 0x3040330
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#define mmTPC0_EML_CFG_DBG_INST_INSERT_CTL 0x3040334
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#endif /* ASIC_REG_TPC0_EML_CFG_REGS_H_ */
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