/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_SIF_RTR_CTRL_5_REGS_H_
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#define ASIC_REG_SIF_RTR_CTRL_5_REGS_H_
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/*
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*****************************************
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* SIF_RTR_CTRL_5 (Prototype: RTR_CTRL)
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*****************************************
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*/
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#define mmSIF_RTR_CTRL_5_PERM_SEL 0x356108
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_0 0x356114
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_1 0x356118
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_2 0x35611C
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_3 0x356120
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_4 0x356124
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_5 0x356128
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_6 0x35612C
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_7 0x356130
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_8 0x356134
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_9 0x356138
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_10 0x35613C
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_11 0x356140
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_12 0x356144
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_13 0x356148
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_14 0x35614C
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_15 0x356150
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_16 0x356154
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_17 0x356158
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_18 0x35615C
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_19 0x356160
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_20 0x356164
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_21 0x356168
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_22 0x35616C
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_23 0x356170
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_24 0x356174
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_25 0x356178
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_26 0x35617C
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#define mmSIF_RTR_CTRL_5_HBM_POLY_H3_27 0x356180
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_0 0x356184
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_1 0x356188
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_2 0x35618C
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_3 0x356190
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_4 0x356194
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_5 0x356198
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_6 0x35619C
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_7 0x3561A0
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_8 0x3561A4
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_9 0x3561A8
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_10 0x3561AC
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_11 0x3561B0
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_12 0x3561B4
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_13 0x3561B8
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#define mmSIF_RTR_CTRL_5_SRAM_POLY_H3_14 0x3561BC
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#define mmSIF_RTR_CTRL_5_SCRAM_SRAM_EN 0x35626C
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#define mmSIF_RTR_CTRL_5_RL_HBM_EN 0x356274
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#define mmSIF_RTR_CTRL_5_RL_HBM_SAT 0x356278
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#define mmSIF_RTR_CTRL_5_RL_HBM_RST 0x35627C
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#define mmSIF_RTR_CTRL_5_RL_HBM_TIMEOUT 0x356280
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#define mmSIF_RTR_CTRL_5_SCRAM_HBM_EN 0x356284
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#define mmSIF_RTR_CTRL_5_RL_PCI_EN 0x356288
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#define mmSIF_RTR_CTRL_5_RL_PCI_SAT 0x35628C
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#define mmSIF_RTR_CTRL_5_RL_PCI_RST 0x356290
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#define mmSIF_RTR_CTRL_5_RL_PCI_TIMEOUT 0x356294
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#define mmSIF_RTR_CTRL_5_RL_SRAM_EN 0x35629C
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#define mmSIF_RTR_CTRL_5_RL_SRAM_SAT 0x3562A0
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#define mmSIF_RTR_CTRL_5_RL_SRAM_RST 0x3562A4
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#define mmSIF_RTR_CTRL_5_RL_SRAM_TIMEOUT 0x3562AC
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#define mmSIF_RTR_CTRL_5_RL_SRAM_RED 0x3562B4
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#define mmSIF_RTR_CTRL_5_E2E_HBM_EN 0x3562EC
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#define mmSIF_RTR_CTRL_5_E2E_PCI_EN 0x3562F0
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#define mmSIF_RTR_CTRL_5_E2E_HBM_WR_SIZE 0x3562F4
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#define mmSIF_RTR_CTRL_5_E2E_PCI_WR_SIZE 0x3562F8
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#define mmSIF_RTR_CTRL_5_E2E_AW_PCI_CTR_SET_EN 0x356404
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#define mmSIF_RTR_CTRL_5_E2E_AW_PCI_CTR_SET 0x356408
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#define mmSIF_RTR_CTRL_5_E2E_AW_PCI_CTR_WRAP 0x35640C
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#define mmSIF_RTR_CTRL_5_E2E_AW_PCI_CTR_CNT 0x356410
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM_CTR_SET_EN 0x356414
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM_CTR_SET 0x356418
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#define mmSIF_RTR_CTRL_5_E2E_HBM_RD_SIZE 0x35641C
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#define mmSIF_RTR_CTRL_5_E2E_PCI_RD_SIZE 0x356420
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#define mmSIF_RTR_CTRL_5_E2E_AR_PCI_CTR_SET_EN 0x356424
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#define mmSIF_RTR_CTRL_5_E2E_AR_PCI_CTR_SET 0x356428
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#define mmSIF_RTR_CTRL_5_E2E_AR_PCI_CTR_WRAP 0x35642C
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#define mmSIF_RTR_CTRL_5_E2E_AR_PCI_CTR_CNT 0x356430
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM_CTR_SET_EN 0x356434
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM_CTR_SET 0x356438
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#define mmSIF_RTR_CTRL_5_NL_HBM_SEL_0 0x356450
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#define mmSIF_RTR_CTRL_5_NL_HBM_SEL_1 0x356454
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#define mmSIF_RTR_CTRL_5_NON_LIN_EN 0x356480
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#define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_0 0x356500
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#define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_1 0x356504
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#define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_2 0x356508
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#define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_3 0x35650C
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#define mmSIF_RTR_CTRL_5_NL_SRAM_BANK_4 0x356510
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_0 0x356514
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_1 0x356520
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_2 0x356524
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_3 0x356528
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_4 0x35652C
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_5 0x356530
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_6 0x356534
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_7 0x356538
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_8 0x35653C
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#define mmSIF_RTR_CTRL_5_NL_SRAM_OFFSET_9 0x356540
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_0 0x356550
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_1 0x356554
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_2 0x356558
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_3 0x35655C
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_4 0x356560
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_5 0x356564
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_6 0x356568
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_7 0x35656C
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_8 0x356570
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_9 0x356574
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_10 0x356578
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_11 0x35657C
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_12 0x356580
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_13 0x356584
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_14 0x356588
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_15 0x35658C
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_16 0x356590
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_17 0x356594
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#define mmSIF_RTR_CTRL_5_NL_HBM_OFFSET_18 0x356598
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_0 0x3565E4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_1 0x3565E8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_2 0x3565EC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_3 0x3565F0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_4 0x3565F4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_5 0x3565F8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_6 0x3565FC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_7 0x356600
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_8 0x356604
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_9 0x356608
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_10 0x35660C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_11 0x356610
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_12 0x356614
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_13 0x356618
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_14 0x35661C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AW_15 0x356620
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_0 0x356624
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_1 0x356628
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_2 0x35662C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_3 0x356630
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_4 0x356634
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_5 0x356638
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_6 0x35663C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_7 0x356640
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_8 0x356644
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_9 0x356648
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_10 0x35664C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_11 0x356650
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_12 0x356654
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_13 0x356658
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_14 0x35665C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AW_15 0x356660
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_0 0x356664
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_1 0x356668
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_2 0x35666C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_3 0x356670
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_4 0x356674
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_5 0x356678
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_6 0x35667C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_7 0x356680
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_8 0x356684
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_9 0x356688
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_10 0x35668C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_11 0x356690
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_12 0x356694
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_13 0x356698
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_14 0x35669C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AW_15 0x3566A0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_0 0x3566A4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_1 0x3566A8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_2 0x3566AC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_3 0x3566B0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_4 0x3566B4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_5 0x3566B8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_6 0x3566BC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_7 0x3566C0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_8 0x3566C4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_9 0x3566C8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_10 0x3566CC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_11 0x3566D0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_12 0x3566D4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_13 0x3566D8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_14 0x3566DC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AW_15 0x3566E0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_0 0x3566E4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_1 0x3566E8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_2 0x3566EC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_3 0x3566F0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_4 0x3566F4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_5 0x3566F8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_6 0x3566FC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_7 0x356700
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_8 0x356704
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_9 0x356708
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_10 0x35670C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_11 0x356710
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_12 0x356714
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_13 0x356718
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_14 0x35671C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AW_15 0x356720
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_0 0x356724
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_1 0x356728
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_2 0x35672C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_3 0x356730
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_4 0x356734
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_5 0x356738
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_6 0x35673C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_7 0x356740
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_8 0x356744
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_9 0x356748
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_10 0x35674C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_11 0x356750
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_12 0x356754
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_13 0x356758
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_14 0x35675C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AW_15 0x356760
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_0 0x356764
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_1 0x356768
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_2 0x35676C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_3 0x356770
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_4 0x356774
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_5 0x356778
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_6 0x35677C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_7 0x356780
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_8 0x356784
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_9 0x356788
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_10 0x35678C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_11 0x356790
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_12 0x356794
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_13 0x356798
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_14 0x35679C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AW_15 0x3567A0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_0 0x3567A4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_1 0x3567A8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_2 0x3567AC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_3 0x3567B0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_4 0x3567B4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_5 0x3567B8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_6 0x3567BC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_7 0x3567C0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_8 0x3567C4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_9 0x3567C8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_10 0x3567CC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_11 0x3567D0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_12 0x3567D4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_13 0x3567D8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_14 0x3567DC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AW_15 0x3567E0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_0 0x356824
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_1 0x356828
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_2 0x35682C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_3 0x356830
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_4 0x356834
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_5 0x356838
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_6 0x35683C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_7 0x356840
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_8 0x356844
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_9 0x356848
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_10 0x35684C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_11 0x356850
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_12 0x356854
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_13 0x356858
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_14 0x35685C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_LOW_AR_15 0x356860
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_0 0x356864
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_1 0x356868
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_2 0x35686C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_3 0x356870
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_4 0x356874
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_5 0x356878
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_6 0x35687C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_7 0x356880
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_8 0x356884
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_9 0x356888
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_10 0x35688C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_11 0x356890
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_12 0x356894
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_13 0x356898
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_14 0x35689C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_BASE_HIGH_AR_15 0x3568A0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_0 0x3568A4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_1 0x3568A8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_2 0x3568AC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_3 0x3568B0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_4 0x3568B4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_5 0x3568B8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_6 0x3568BC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_7 0x3568C0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_8 0x3568C4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_9 0x3568C8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_10 0x3568CC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_11 0x3568D0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_12 0x3568D4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_13 0x3568D8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_14 0x3568DC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_LOW_AR_15 0x3568E0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_0 0x3568E4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_1 0x3568E8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_2 0x3568EC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_3 0x3568F0
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_4 0x3568F4
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_5 0x3568F8
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_6 0x3568FC
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_7 0x356900
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_8 0x356904
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_9 0x356908
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_10 0x35690C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_11 0x356910
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_12 0x356914
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_13 0x356918
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_14 0x35691C
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_MASK_HIGH_AR_15 0x356920
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_0 0x356924
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_1 0x356928
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_2 0x35692C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_3 0x356930
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_4 0x356934
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_5 0x356938
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_6 0x35693C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_7 0x356940
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_8 0x356944
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_9 0x356948
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_10 0x35694C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_11 0x356950
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_12 0x356954
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_13 0x356958
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_14 0x35695C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_LOW_AR_15 0x356960
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_0 0x356964
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_1 0x356968
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_2 0x35696C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_3 0x356970
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_4 0x356974
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_5 0x356978
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_6 0x35697C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_7 0x356980
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_8 0x356984
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_9 0x356988
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_10 0x35698C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_11 0x356990
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_12 0x356994
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_13 0x356998
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_14 0x35699C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_BASE_HIGH_AR_15 0x3569A0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_0 0x3569A4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_1 0x3569A8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_2 0x3569AC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_3 0x3569B0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_4 0x3569B4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_5 0x3569B8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_6 0x3569BC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_7 0x3569C0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_8 0x3569C4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_9 0x3569C8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_10 0x3569CC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_11 0x3569D0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_12 0x3569D4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_13 0x3569D8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_14 0x3569DC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_LOW_AR_15 0x3569E0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_0 0x3569E4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_1 0x3569E8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_2 0x3569EC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_3 0x3569F0
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_4 0x3569F4
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_5 0x3569F8
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_6 0x3569FC
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_7 0x356A00
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_8 0x356A04
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_9 0x356A08
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_10 0x356A0C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_11 0x356A10
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_12 0x356A14
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_13 0x356A18
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_14 0x356A1C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_MASK_HIGH_AR_15 0x356A20
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_HIT_AW 0x356A64
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#define mmSIF_RTR_CTRL_5_RANGE_SEC_HIT_AR 0x356A68
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_HIT_AW 0x356A6C
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#define mmSIF_RTR_CTRL_5_RANGE_PRIV_HIT_AR 0x356A70
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#define mmSIF_RTR_CTRL_5_RGL_CFG 0x356B64
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#define mmSIF_RTR_CTRL_5_RGL_SHIFT 0x356B68
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#define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_0 0x356B6C
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#define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_1 0x356B70
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#define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_2 0x356B74
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#define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_3 0x356B78
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#define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_4 0x356B7C
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#define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_5 0x356B80
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#define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_6 0x356B84
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#define mmSIF_RTR_CTRL_5_RGL_EXPECTED_LAT_7 0x356B88
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#define mmSIF_RTR_CTRL_5_RGL_TOKEN_0 0x356BAC
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#define mmSIF_RTR_CTRL_5_RGL_TOKEN_1 0x356BB0
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#define mmSIF_RTR_CTRL_5_RGL_TOKEN_2 0x356BB4
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#define mmSIF_RTR_CTRL_5_RGL_TOKEN_3 0x356BB8
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#define mmSIF_RTR_CTRL_5_RGL_TOKEN_4 0x356BBC
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#define mmSIF_RTR_CTRL_5_RGL_TOKEN_5 0x356BC0
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#define mmSIF_RTR_CTRL_5_RGL_TOKEN_6 0x356BC4
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#define mmSIF_RTR_CTRL_5_RGL_TOKEN_7 0x356BC8
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#define mmSIF_RTR_CTRL_5_RGL_BANK_ID_0 0x356BEC
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#define mmSIF_RTR_CTRL_5_RGL_BANK_ID_1 0x356BF0
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#define mmSIF_RTR_CTRL_5_RGL_BANK_ID_2 0x356BF4
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#define mmSIF_RTR_CTRL_5_RGL_BANK_ID_3 0x356BF8
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#define mmSIF_RTR_CTRL_5_RGL_BANK_ID_4 0x356BFC
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#define mmSIF_RTR_CTRL_5_RGL_BANK_ID_5 0x356C00
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#define mmSIF_RTR_CTRL_5_RGL_BANK_ID_6 0x356C04
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#define mmSIF_RTR_CTRL_5_RGL_BANK_ID_7 0x356C08
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#define mmSIF_RTR_CTRL_5_RGL_WDT 0x356C2C
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM0_CH0_CTR_WRAP 0x356C30
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM0_CH1_CTR_WRAP 0x356C34
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM1_CH0_CTR_WRAP 0x356C38
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM1_CH1_CTR_WRAP 0x356C3C
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM2_CH0_CTR_WRAP 0x356C40
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM2_CH1_CTR_WRAP 0x356C44
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM3_CH0_CTR_WRAP 0x356C48
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM3_CH1_CTR_WRAP 0x356C4C
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM0_CH0_CTR_CNT 0x356C50
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM0_CH1_CTR_CNT 0x356C54
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM1_CH0_CTR_CNT 0x356C58
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM1_CH1_CTR_CNT 0x356C5C
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM2_CH0_CTR_CNT 0x356C60
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM2_CH1_CTR_CNT 0x356C64
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM3_CH0_CTR_CNT 0x356C68
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#define mmSIF_RTR_CTRL_5_E2E_AR_HBM3_CH1_CTR_CNT 0x356C6C
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM0_CH0_CTR_WRAP 0x356C70
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM0_CH1_CTR_WRAP 0x356C74
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM1_CH0_CTR_WRAP 0x356C78
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM1_CH1_CTR_WRAP 0x356C7C
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM2_CH0_CTR_WRAP 0x356C80
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM2_CH1_CTR_WRAP 0x356C84
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM3_CH0_CTR_WRAP 0x356C88
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM3_CH1_CTR_WRAP 0x356C8C
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM0_CH0_CTR_CNT 0x356C90
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM0_CH1_CTR_CNT 0x356C94
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM1_CH0_CTR_CNT 0x356C98
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM1_CH1_CTR_CNT 0x356C9C
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM2_CH0_CTR_CNT 0x356CA0
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM2_CH1_CTR_CNT 0x356CA4
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM3_CH0_CTR_CNT 0x356CA8
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#define mmSIF_RTR_CTRL_5_E2E_AW_HBM3_CH1_CTR_CNT 0x356CAC
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#define mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_0 0x356CB0
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#define mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_1 0x356CB4
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#define mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_2 0x356CB8
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#define mmSIF_RTR_CTRL_5_NL_HBM_PC_SEL_3 0x356CBC
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#endif /* ASIC_REG_SIF_RTR_CTRL_5_REGS_H_ */
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