/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_SIF_RTR_CTRL_4_REGS_H_
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#define ASIC_REG_SIF_RTR_CTRL_4_REGS_H_
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/*
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*****************************************
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* SIF_RTR_CTRL_4 (Prototype: RTR_CTRL)
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*****************************************
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*/
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#define mmSIF_RTR_CTRL_4_PERM_SEL 0x346108
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_0 0x346114
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_1 0x346118
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_2 0x34611C
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_3 0x346120
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_4 0x346124
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_5 0x346128
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_6 0x34612C
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_7 0x346130
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_8 0x346134
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_9 0x346138
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_10 0x34613C
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_11 0x346140
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_12 0x346144
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_13 0x346148
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_14 0x34614C
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_15 0x346150
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_16 0x346154
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_17 0x346158
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_18 0x34615C
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_19 0x346160
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_20 0x346164
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_21 0x346168
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_22 0x34616C
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_23 0x346170
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_24 0x346174
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_25 0x346178
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_26 0x34617C
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#define mmSIF_RTR_CTRL_4_HBM_POLY_H3_27 0x346180
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_0 0x346184
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_1 0x346188
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_2 0x34618C
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_3 0x346190
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_4 0x346194
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_5 0x346198
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_6 0x34619C
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_7 0x3461A0
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_8 0x3461A4
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_9 0x3461A8
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_10 0x3461AC
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_11 0x3461B0
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_12 0x3461B4
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_13 0x3461B8
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#define mmSIF_RTR_CTRL_4_SRAM_POLY_H3_14 0x3461BC
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#define mmSIF_RTR_CTRL_4_SCRAM_SRAM_EN 0x34626C
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#define mmSIF_RTR_CTRL_4_RL_HBM_EN 0x346274
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#define mmSIF_RTR_CTRL_4_RL_HBM_SAT 0x346278
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#define mmSIF_RTR_CTRL_4_RL_HBM_RST 0x34627C
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#define mmSIF_RTR_CTRL_4_RL_HBM_TIMEOUT 0x346280
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#define mmSIF_RTR_CTRL_4_SCRAM_HBM_EN 0x346284
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#define mmSIF_RTR_CTRL_4_RL_PCI_EN 0x346288
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#define mmSIF_RTR_CTRL_4_RL_PCI_SAT 0x34628C
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#define mmSIF_RTR_CTRL_4_RL_PCI_RST 0x346290
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#define mmSIF_RTR_CTRL_4_RL_PCI_TIMEOUT 0x346294
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#define mmSIF_RTR_CTRL_4_RL_SRAM_EN 0x34629C
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#define mmSIF_RTR_CTRL_4_RL_SRAM_SAT 0x3462A0
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#define mmSIF_RTR_CTRL_4_RL_SRAM_RST 0x3462A4
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#define mmSIF_RTR_CTRL_4_RL_SRAM_TIMEOUT 0x3462AC
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#define mmSIF_RTR_CTRL_4_RL_SRAM_RED 0x3462B4
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#define mmSIF_RTR_CTRL_4_E2E_HBM_EN 0x3462EC
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#define mmSIF_RTR_CTRL_4_E2E_PCI_EN 0x3462F0
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#define mmSIF_RTR_CTRL_4_E2E_HBM_WR_SIZE 0x3462F4
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#define mmSIF_RTR_CTRL_4_E2E_PCI_WR_SIZE 0x3462F8
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#define mmSIF_RTR_CTRL_4_E2E_AW_PCI_CTR_SET_EN 0x346404
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#define mmSIF_RTR_CTRL_4_E2E_AW_PCI_CTR_SET 0x346408
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#define mmSIF_RTR_CTRL_4_E2E_AW_PCI_CTR_WRAP 0x34640C
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#define mmSIF_RTR_CTRL_4_E2E_AW_PCI_CTR_CNT 0x346410
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM_CTR_SET_EN 0x346414
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM_CTR_SET 0x346418
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#define mmSIF_RTR_CTRL_4_E2E_HBM_RD_SIZE 0x34641C
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#define mmSIF_RTR_CTRL_4_E2E_PCI_RD_SIZE 0x346420
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#define mmSIF_RTR_CTRL_4_E2E_AR_PCI_CTR_SET_EN 0x346424
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#define mmSIF_RTR_CTRL_4_E2E_AR_PCI_CTR_SET 0x346428
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#define mmSIF_RTR_CTRL_4_E2E_AR_PCI_CTR_WRAP 0x34642C
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#define mmSIF_RTR_CTRL_4_E2E_AR_PCI_CTR_CNT 0x346430
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM_CTR_SET_EN 0x346434
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM_CTR_SET 0x346438
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#define mmSIF_RTR_CTRL_4_NL_HBM_SEL_0 0x346450
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#define mmSIF_RTR_CTRL_4_NL_HBM_SEL_1 0x346454
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#define mmSIF_RTR_CTRL_4_NON_LIN_EN 0x346480
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#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_0 0x346500
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#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_1 0x346504
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#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_2 0x346508
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#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_3 0x34650C
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#define mmSIF_RTR_CTRL_4_NL_SRAM_BANK_4 0x346510
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_0 0x346514
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_1 0x346520
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_2 0x346524
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_3 0x346528
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_4 0x34652C
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_5 0x346530
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_6 0x346534
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_7 0x346538
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_8 0x34653C
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#define mmSIF_RTR_CTRL_4_NL_SRAM_OFFSET_9 0x346540
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_0 0x346550
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_1 0x346554
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_2 0x346558
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_3 0x34655C
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_4 0x346560
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_5 0x346564
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_6 0x346568
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_7 0x34656C
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_8 0x346570
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_9 0x346574
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_10 0x346578
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_11 0x34657C
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_12 0x346580
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_13 0x346584
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_14 0x346588
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_15 0x34658C
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_16 0x346590
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_17 0x346594
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#define mmSIF_RTR_CTRL_4_NL_HBM_OFFSET_18 0x346598
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_0 0x3465E4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_1 0x3465E8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_2 0x3465EC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_3 0x3465F0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_4 0x3465F4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_5 0x3465F8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_6 0x3465FC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_7 0x346600
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_8 0x346604
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_9 0x346608
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_10 0x34660C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_11 0x346610
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_12 0x346614
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_13 0x346618
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_14 0x34661C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AW_15 0x346620
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_0 0x346624
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_1 0x346628
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_2 0x34662C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_3 0x346630
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_4 0x346634
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_5 0x346638
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_6 0x34663C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_7 0x346640
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_8 0x346644
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_9 0x346648
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_10 0x34664C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_11 0x346650
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_12 0x346654
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_13 0x346658
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_14 0x34665C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AW_15 0x346660
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_0 0x346664
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_1 0x346668
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_2 0x34666C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_3 0x346670
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_4 0x346674
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_5 0x346678
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_6 0x34667C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_7 0x346680
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_8 0x346684
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_9 0x346688
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_10 0x34668C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_11 0x346690
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_12 0x346694
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_13 0x346698
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_14 0x34669C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AW_15 0x3466A0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_0 0x3466A4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_1 0x3466A8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_2 0x3466AC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_3 0x3466B0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_4 0x3466B4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_5 0x3466B8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_6 0x3466BC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_7 0x3466C0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_8 0x3466C4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_9 0x3466C8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_10 0x3466CC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_11 0x3466D0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_12 0x3466D4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_13 0x3466D8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_14 0x3466DC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AW_15 0x3466E0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_0 0x3466E4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_1 0x3466E8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_2 0x3466EC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_3 0x3466F0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_4 0x3466F4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_5 0x3466F8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_6 0x3466FC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_7 0x346700
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_8 0x346704
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_9 0x346708
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_10 0x34670C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_11 0x346710
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_12 0x346714
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_13 0x346718
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_14 0x34671C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AW_15 0x346720
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_0 0x346724
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_1 0x346728
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_2 0x34672C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_3 0x346730
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_4 0x346734
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_5 0x346738
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_6 0x34673C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_7 0x346740
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_8 0x346744
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_9 0x346748
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_10 0x34674C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_11 0x346750
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_12 0x346754
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_13 0x346758
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_14 0x34675C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AW_15 0x346760
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_0 0x346764
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_1 0x346768
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_2 0x34676C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_3 0x346770
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_4 0x346774
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_5 0x346778
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_6 0x34677C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_7 0x346780
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_8 0x346784
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_9 0x346788
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_10 0x34678C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_11 0x346790
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_12 0x346794
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_13 0x346798
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_14 0x34679C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AW_15 0x3467A0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_0 0x3467A4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_1 0x3467A8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_2 0x3467AC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_3 0x3467B0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_4 0x3467B4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_5 0x3467B8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_6 0x3467BC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_7 0x3467C0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_8 0x3467C4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_9 0x3467C8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_10 0x3467CC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_11 0x3467D0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_12 0x3467D4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_13 0x3467D8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_14 0x3467DC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AW_15 0x3467E0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_0 0x346824
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_1 0x346828
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_2 0x34682C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_3 0x346830
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_4 0x346834
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_5 0x346838
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_6 0x34683C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_7 0x346840
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_8 0x346844
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_9 0x346848
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_10 0x34684C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_11 0x346850
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_12 0x346854
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_13 0x346858
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_14 0x34685C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_LOW_AR_15 0x346860
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_0 0x346864
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_1 0x346868
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_2 0x34686C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_3 0x346870
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_4 0x346874
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_5 0x346878
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_6 0x34687C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_7 0x346880
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_8 0x346884
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_9 0x346888
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_10 0x34688C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_11 0x346890
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_12 0x346894
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_13 0x346898
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_14 0x34689C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_BASE_HIGH_AR_15 0x3468A0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_0 0x3468A4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_1 0x3468A8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_2 0x3468AC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_3 0x3468B0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_4 0x3468B4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_5 0x3468B8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_6 0x3468BC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_7 0x3468C0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_8 0x3468C4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_9 0x3468C8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_10 0x3468CC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_11 0x3468D0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_12 0x3468D4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_13 0x3468D8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_14 0x3468DC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_LOW_AR_15 0x3468E0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_0 0x3468E4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_1 0x3468E8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_2 0x3468EC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_3 0x3468F0
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_4 0x3468F4
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_5 0x3468F8
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_6 0x3468FC
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_7 0x346900
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_8 0x346904
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_9 0x346908
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_10 0x34690C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_11 0x346910
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_12 0x346914
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_13 0x346918
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_14 0x34691C
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_MASK_HIGH_AR_15 0x346920
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_0 0x346924
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_1 0x346928
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_2 0x34692C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_3 0x346930
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_4 0x346934
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_5 0x346938
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_6 0x34693C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_7 0x346940
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_8 0x346944
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_9 0x346948
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_10 0x34694C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_11 0x346950
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_12 0x346954
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_13 0x346958
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_14 0x34695C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_LOW_AR_15 0x346960
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_0 0x346964
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_1 0x346968
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_2 0x34696C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_3 0x346970
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_4 0x346974
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_5 0x346978
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_6 0x34697C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_7 0x346980
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_8 0x346984
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_9 0x346988
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_10 0x34698C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_11 0x346990
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_12 0x346994
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_13 0x346998
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_14 0x34699C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_BASE_HIGH_AR_15 0x3469A0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_0 0x3469A4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_1 0x3469A8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_2 0x3469AC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_3 0x3469B0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_4 0x3469B4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_5 0x3469B8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_6 0x3469BC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_7 0x3469C0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_8 0x3469C4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_9 0x3469C8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_10 0x3469CC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_11 0x3469D0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_12 0x3469D4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_13 0x3469D8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_14 0x3469DC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_LOW_AR_15 0x3469E0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_0 0x3469E4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_1 0x3469E8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_2 0x3469EC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_3 0x3469F0
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_4 0x3469F4
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_5 0x3469F8
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_6 0x3469FC
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_7 0x346A00
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_8 0x346A04
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_9 0x346A08
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_10 0x346A0C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_11 0x346A10
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_12 0x346A14
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_13 0x346A18
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_14 0x346A1C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_MASK_HIGH_AR_15 0x346A20
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_HIT_AW 0x346A64
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#define mmSIF_RTR_CTRL_4_RANGE_SEC_HIT_AR 0x346A68
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_HIT_AW 0x346A6C
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#define mmSIF_RTR_CTRL_4_RANGE_PRIV_HIT_AR 0x346A70
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#define mmSIF_RTR_CTRL_4_RGL_CFG 0x346B64
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#define mmSIF_RTR_CTRL_4_RGL_SHIFT 0x346B68
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#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_0 0x346B6C
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#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_1 0x346B70
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#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_2 0x346B74
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#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_3 0x346B78
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#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_4 0x346B7C
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#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_5 0x346B80
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#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_6 0x346B84
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#define mmSIF_RTR_CTRL_4_RGL_EXPECTED_LAT_7 0x346B88
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#define mmSIF_RTR_CTRL_4_RGL_TOKEN_0 0x346BAC
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#define mmSIF_RTR_CTRL_4_RGL_TOKEN_1 0x346BB0
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#define mmSIF_RTR_CTRL_4_RGL_TOKEN_2 0x346BB4
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#define mmSIF_RTR_CTRL_4_RGL_TOKEN_3 0x346BB8
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#define mmSIF_RTR_CTRL_4_RGL_TOKEN_4 0x346BBC
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#define mmSIF_RTR_CTRL_4_RGL_TOKEN_5 0x346BC0
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#define mmSIF_RTR_CTRL_4_RGL_TOKEN_6 0x346BC4
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#define mmSIF_RTR_CTRL_4_RGL_TOKEN_7 0x346BC8
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#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_0 0x346BEC
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#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_1 0x346BF0
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#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_2 0x346BF4
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#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_3 0x346BF8
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#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_4 0x346BFC
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#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_5 0x346C00
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#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_6 0x346C04
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#define mmSIF_RTR_CTRL_4_RGL_BANK_ID_7 0x346C08
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#define mmSIF_RTR_CTRL_4_RGL_WDT 0x346C2C
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM0_CH0_CTR_WRAP 0x346C30
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM0_CH1_CTR_WRAP 0x346C34
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM1_CH0_CTR_WRAP 0x346C38
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM1_CH1_CTR_WRAP 0x346C3C
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM2_CH0_CTR_WRAP 0x346C40
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM2_CH1_CTR_WRAP 0x346C44
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM3_CH0_CTR_WRAP 0x346C48
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM3_CH1_CTR_WRAP 0x346C4C
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM0_CH0_CTR_CNT 0x346C50
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM0_CH1_CTR_CNT 0x346C54
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM1_CH0_CTR_CNT 0x346C58
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM1_CH1_CTR_CNT 0x346C5C
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM2_CH0_CTR_CNT 0x346C60
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM2_CH1_CTR_CNT 0x346C64
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM3_CH0_CTR_CNT 0x346C68
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#define mmSIF_RTR_CTRL_4_E2E_AR_HBM3_CH1_CTR_CNT 0x346C6C
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM0_CH0_CTR_WRAP 0x346C70
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM0_CH1_CTR_WRAP 0x346C74
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM1_CH0_CTR_WRAP 0x346C78
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM1_CH1_CTR_WRAP 0x346C7C
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM2_CH0_CTR_WRAP 0x346C80
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM2_CH1_CTR_WRAP 0x346C84
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM3_CH0_CTR_WRAP 0x346C88
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM3_CH1_CTR_WRAP 0x346C8C
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM0_CH0_CTR_CNT 0x346C90
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM0_CH1_CTR_CNT 0x346C94
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM1_CH0_CTR_CNT 0x346C98
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM1_CH1_CTR_CNT 0x346C9C
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM2_CH0_CTR_CNT 0x346CA0
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM2_CH1_CTR_CNT 0x346CA4
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM3_CH0_CTR_CNT 0x346CA8
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#define mmSIF_RTR_CTRL_4_E2E_AW_HBM3_CH1_CTR_CNT 0x346CAC
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#define mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_0 0x346CB0
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#define mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_1 0x346CB4
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#define mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_2 0x346CB8
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#define mmSIF_RTR_CTRL_4_NL_HBM_PC_SEL_3 0x346CBC
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#endif /* ASIC_REG_SIF_RTR_CTRL_4_REGS_H_ */
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