/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_SIF_RTR_CTRL_1_REGS_H_
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#define ASIC_REG_SIF_RTR_CTRL_1_REGS_H_
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/*
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*****************************************
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* SIF_RTR_CTRL_1 (Prototype: RTR_CTRL)
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*****************************************
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*/
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#define mmSIF_RTR_CTRL_1_PERM_SEL 0x316108
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_0 0x316114
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_1 0x316118
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_2 0x31611C
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_3 0x316120
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_4 0x316124
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_5 0x316128
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_6 0x31612C
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_7 0x316130
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_8 0x316134
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_9 0x316138
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_10 0x31613C
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_11 0x316140
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_12 0x316144
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_13 0x316148
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_14 0x31614C
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_15 0x316150
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_16 0x316154
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_17 0x316158
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_18 0x31615C
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_19 0x316160
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_20 0x316164
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_21 0x316168
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_22 0x31616C
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_23 0x316170
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_24 0x316174
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_25 0x316178
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_26 0x31617C
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#define mmSIF_RTR_CTRL_1_HBM_POLY_H3_27 0x316180
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_0 0x316184
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_1 0x316188
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_2 0x31618C
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_3 0x316190
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_4 0x316194
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_5 0x316198
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_6 0x31619C
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_7 0x3161A0
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_8 0x3161A4
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_9 0x3161A8
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_10 0x3161AC
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_11 0x3161B0
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_12 0x3161B4
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_13 0x3161B8
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#define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_14 0x3161BC
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#define mmSIF_RTR_CTRL_1_SCRAM_SRAM_EN 0x31626C
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#define mmSIF_RTR_CTRL_1_RL_HBM_EN 0x316274
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#define mmSIF_RTR_CTRL_1_RL_HBM_SAT 0x316278
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#define mmSIF_RTR_CTRL_1_RL_HBM_RST 0x31627C
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#define mmSIF_RTR_CTRL_1_RL_HBM_TIMEOUT 0x316280
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#define mmSIF_RTR_CTRL_1_SCRAM_HBM_EN 0x316284
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#define mmSIF_RTR_CTRL_1_RL_PCI_EN 0x316288
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#define mmSIF_RTR_CTRL_1_RL_PCI_SAT 0x31628C
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#define mmSIF_RTR_CTRL_1_RL_PCI_RST 0x316290
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#define mmSIF_RTR_CTRL_1_RL_PCI_TIMEOUT 0x316294
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#define mmSIF_RTR_CTRL_1_RL_SRAM_EN 0x31629C
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#define mmSIF_RTR_CTRL_1_RL_SRAM_SAT 0x3162A0
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#define mmSIF_RTR_CTRL_1_RL_SRAM_RST 0x3162A4
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#define mmSIF_RTR_CTRL_1_RL_SRAM_TIMEOUT 0x3162AC
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#define mmSIF_RTR_CTRL_1_RL_SRAM_RED 0x3162B4
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#define mmSIF_RTR_CTRL_1_E2E_HBM_EN 0x3162EC
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#define mmSIF_RTR_CTRL_1_E2E_PCI_EN 0x3162F0
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#define mmSIF_RTR_CTRL_1_E2E_HBM_WR_SIZE 0x3162F4
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#define mmSIF_RTR_CTRL_1_E2E_PCI_WR_SIZE 0x3162F8
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#define mmSIF_RTR_CTRL_1_E2E_AW_PCI_CTR_SET_EN 0x316404
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#define mmSIF_RTR_CTRL_1_E2E_AW_PCI_CTR_SET 0x316408
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#define mmSIF_RTR_CTRL_1_E2E_AW_PCI_CTR_WRAP 0x31640C
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#define mmSIF_RTR_CTRL_1_E2E_AW_PCI_CTR_CNT 0x316410
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM_CTR_SET_EN 0x316414
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM_CTR_SET 0x316418
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#define mmSIF_RTR_CTRL_1_E2E_HBM_RD_SIZE 0x31641C
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#define mmSIF_RTR_CTRL_1_E2E_PCI_RD_SIZE 0x316420
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#define mmSIF_RTR_CTRL_1_E2E_AR_PCI_CTR_SET_EN 0x316424
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#define mmSIF_RTR_CTRL_1_E2E_AR_PCI_CTR_SET 0x316428
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#define mmSIF_RTR_CTRL_1_E2E_AR_PCI_CTR_WRAP 0x31642C
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#define mmSIF_RTR_CTRL_1_E2E_AR_PCI_CTR_CNT 0x316430
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM_CTR_SET_EN 0x316434
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM_CTR_SET 0x316438
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#define mmSIF_RTR_CTRL_1_NL_HBM_SEL_0 0x316450
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#define mmSIF_RTR_CTRL_1_NL_HBM_SEL_1 0x316454
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#define mmSIF_RTR_CTRL_1_NON_LIN_EN 0x316480
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#define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_0 0x316500
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#define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_1 0x316504
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#define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_2 0x316508
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#define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_3 0x31650C
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#define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_4 0x316510
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_0 0x316514
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_1 0x316520
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_2 0x316524
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_3 0x316528
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_4 0x31652C
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_5 0x316530
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_6 0x316534
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_7 0x316538
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_8 0x31653C
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#define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_9 0x316540
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_0 0x316550
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_1 0x316554
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_2 0x316558
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_3 0x31655C
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_4 0x316560
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_5 0x316564
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_6 0x316568
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_7 0x31656C
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_8 0x316570
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_9 0x316574
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_10 0x316578
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_11 0x31657C
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_12 0x316580
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_13 0x316584
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_14 0x316588
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_15 0x31658C
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_16 0x316590
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_17 0x316594
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#define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_18 0x316598
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_0 0x3165E4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_1 0x3165E8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_2 0x3165EC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_3 0x3165F0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_4 0x3165F4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_5 0x3165F8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_6 0x3165FC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_7 0x316600
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_8 0x316604
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_9 0x316608
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_10 0x31660C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_11 0x316610
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_12 0x316614
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_13 0x316618
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_14 0x31661C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_15 0x316620
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_0 0x316624
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_1 0x316628
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_2 0x31662C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_3 0x316630
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_4 0x316634
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_5 0x316638
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_6 0x31663C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_7 0x316640
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_8 0x316644
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_9 0x316648
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_10 0x31664C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_11 0x316650
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_12 0x316654
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_13 0x316658
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_14 0x31665C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_15 0x316660
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_0 0x316664
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_1 0x316668
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_2 0x31666C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_3 0x316670
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_4 0x316674
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_5 0x316678
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_6 0x31667C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_7 0x316680
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_8 0x316684
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_9 0x316688
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_10 0x31668C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_11 0x316690
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_12 0x316694
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_13 0x316698
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_14 0x31669C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_15 0x3166A0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_0 0x3166A4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_1 0x3166A8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_2 0x3166AC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_3 0x3166B0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_4 0x3166B4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_5 0x3166B8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_6 0x3166BC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_7 0x3166C0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_8 0x3166C4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_9 0x3166C8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_10 0x3166CC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_11 0x3166D0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_12 0x3166D4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_13 0x3166D8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_14 0x3166DC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_15 0x3166E0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_0 0x3166E4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_1 0x3166E8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_2 0x3166EC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_3 0x3166F0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_4 0x3166F4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_5 0x3166F8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_6 0x3166FC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_7 0x316700
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_8 0x316704
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_9 0x316708
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_10 0x31670C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_11 0x316710
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_12 0x316714
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_13 0x316718
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_14 0x31671C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_15 0x316720
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_0 0x316724
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_1 0x316728
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_2 0x31672C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_3 0x316730
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_4 0x316734
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_5 0x316738
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_6 0x31673C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_7 0x316740
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_8 0x316744
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_9 0x316748
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_10 0x31674C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_11 0x316750
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_12 0x316754
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_13 0x316758
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_14 0x31675C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_15 0x316760
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_0 0x316764
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_1 0x316768
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_2 0x31676C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_3 0x316770
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_4 0x316774
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_5 0x316778
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_6 0x31677C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_7 0x316780
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_8 0x316784
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_9 0x316788
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_10 0x31678C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_11 0x316790
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_12 0x316794
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_13 0x316798
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_14 0x31679C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_15 0x3167A0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_0 0x3167A4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_1 0x3167A8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_2 0x3167AC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_3 0x3167B0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_4 0x3167B4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_5 0x3167B8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_6 0x3167BC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_7 0x3167C0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_8 0x3167C4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_9 0x3167C8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_10 0x3167CC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_11 0x3167D0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_12 0x3167D4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_13 0x3167D8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_14 0x3167DC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_15 0x3167E0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_0 0x316824
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_1 0x316828
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_2 0x31682C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_3 0x316830
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_4 0x316834
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_5 0x316838
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_6 0x31683C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_7 0x316840
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_8 0x316844
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_9 0x316848
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_10 0x31684C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_11 0x316850
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_12 0x316854
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_13 0x316858
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_14 0x31685C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_15 0x316860
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_0 0x316864
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_1 0x316868
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_2 0x31686C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_3 0x316870
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_4 0x316874
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_5 0x316878
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_6 0x31687C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_7 0x316880
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_8 0x316884
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_9 0x316888
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_10 0x31688C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_11 0x316890
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_12 0x316894
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_13 0x316898
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_14 0x31689C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_15 0x3168A0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_0 0x3168A4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_1 0x3168A8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_2 0x3168AC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_3 0x3168B0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_4 0x3168B4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_5 0x3168B8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_6 0x3168BC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_7 0x3168C0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_8 0x3168C4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_9 0x3168C8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_10 0x3168CC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_11 0x3168D0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_12 0x3168D4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_13 0x3168D8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_14 0x3168DC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_15 0x3168E0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_0 0x3168E4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_1 0x3168E8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_2 0x3168EC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_3 0x3168F0
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_4 0x3168F4
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_5 0x3168F8
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_6 0x3168FC
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_7 0x316900
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_8 0x316904
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_9 0x316908
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_10 0x31690C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_11 0x316910
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_12 0x316914
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_13 0x316918
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_14 0x31691C
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_15 0x316920
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_0 0x316924
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_1 0x316928
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_2 0x31692C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_3 0x316930
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_4 0x316934
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_5 0x316938
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_6 0x31693C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_7 0x316940
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_8 0x316944
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_9 0x316948
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_10 0x31694C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_11 0x316950
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_12 0x316954
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_13 0x316958
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_14 0x31695C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_15 0x316960
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_0 0x316964
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_1 0x316968
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_2 0x31696C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_3 0x316970
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_4 0x316974
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_5 0x316978
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_6 0x31697C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_7 0x316980
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_8 0x316984
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_9 0x316988
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_10 0x31698C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_11 0x316990
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_12 0x316994
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_13 0x316998
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_14 0x31699C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_15 0x3169A0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_0 0x3169A4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_1 0x3169A8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_2 0x3169AC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_3 0x3169B0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_4 0x3169B4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_5 0x3169B8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_6 0x3169BC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_7 0x3169C0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_8 0x3169C4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_9 0x3169C8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_10 0x3169CC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_11 0x3169D0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_12 0x3169D4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_13 0x3169D8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_14 0x3169DC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_15 0x3169E0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_0 0x3169E4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_1 0x3169E8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_2 0x3169EC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_3 0x3169F0
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_4 0x3169F4
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_5 0x3169F8
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_6 0x3169FC
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_7 0x316A00
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_8 0x316A04
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_9 0x316A08
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_10 0x316A0C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_11 0x316A10
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_12 0x316A14
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_13 0x316A18
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_14 0x316A1C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_15 0x316A20
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_HIT_AW 0x316A64
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#define mmSIF_RTR_CTRL_1_RANGE_SEC_HIT_AR 0x316A68
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_HIT_AW 0x316A6C
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#define mmSIF_RTR_CTRL_1_RANGE_PRIV_HIT_AR 0x316A70
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#define mmSIF_RTR_CTRL_1_RGL_CFG 0x316B64
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#define mmSIF_RTR_CTRL_1_RGL_SHIFT 0x316B68
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#define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_0 0x316B6C
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#define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_1 0x316B70
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#define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_2 0x316B74
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#define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_3 0x316B78
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#define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_4 0x316B7C
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#define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_5 0x316B80
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#define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_6 0x316B84
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#define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_7 0x316B88
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#define mmSIF_RTR_CTRL_1_RGL_TOKEN_0 0x316BAC
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#define mmSIF_RTR_CTRL_1_RGL_TOKEN_1 0x316BB0
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#define mmSIF_RTR_CTRL_1_RGL_TOKEN_2 0x316BB4
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#define mmSIF_RTR_CTRL_1_RGL_TOKEN_3 0x316BB8
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#define mmSIF_RTR_CTRL_1_RGL_TOKEN_4 0x316BBC
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#define mmSIF_RTR_CTRL_1_RGL_TOKEN_5 0x316BC0
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#define mmSIF_RTR_CTRL_1_RGL_TOKEN_6 0x316BC4
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#define mmSIF_RTR_CTRL_1_RGL_TOKEN_7 0x316BC8
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#define mmSIF_RTR_CTRL_1_RGL_BANK_ID_0 0x316BEC
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#define mmSIF_RTR_CTRL_1_RGL_BANK_ID_1 0x316BF0
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#define mmSIF_RTR_CTRL_1_RGL_BANK_ID_2 0x316BF4
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#define mmSIF_RTR_CTRL_1_RGL_BANK_ID_3 0x316BF8
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#define mmSIF_RTR_CTRL_1_RGL_BANK_ID_4 0x316BFC
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#define mmSIF_RTR_CTRL_1_RGL_BANK_ID_5 0x316C00
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#define mmSIF_RTR_CTRL_1_RGL_BANK_ID_6 0x316C04
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#define mmSIF_RTR_CTRL_1_RGL_BANK_ID_7 0x316C08
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#define mmSIF_RTR_CTRL_1_RGL_WDT 0x316C2C
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM0_CH0_CTR_WRAP 0x316C30
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM0_CH1_CTR_WRAP 0x316C34
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM1_CH0_CTR_WRAP 0x316C38
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM1_CH1_CTR_WRAP 0x316C3C
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM2_CH0_CTR_WRAP 0x316C40
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM2_CH1_CTR_WRAP 0x316C44
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM3_CH0_CTR_WRAP 0x316C48
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM3_CH1_CTR_WRAP 0x316C4C
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM0_CH0_CTR_CNT 0x316C50
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM0_CH1_CTR_CNT 0x316C54
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM1_CH0_CTR_CNT 0x316C58
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM1_CH1_CTR_CNT 0x316C5C
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM2_CH0_CTR_CNT 0x316C60
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM2_CH1_CTR_CNT 0x316C64
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM3_CH0_CTR_CNT 0x316C68
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#define mmSIF_RTR_CTRL_1_E2E_AR_HBM3_CH1_CTR_CNT 0x316C6C
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM0_CH0_CTR_WRAP 0x316C70
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM0_CH1_CTR_WRAP 0x316C74
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM1_CH0_CTR_WRAP 0x316C78
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM1_CH1_CTR_WRAP 0x316C7C
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM2_CH0_CTR_WRAP 0x316C80
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM2_CH1_CTR_WRAP 0x316C84
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM3_CH0_CTR_WRAP 0x316C88
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM3_CH1_CTR_WRAP 0x316C8C
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM0_CH0_CTR_CNT 0x316C90
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM0_CH1_CTR_CNT 0x316C94
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM1_CH0_CTR_CNT 0x316C98
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM1_CH1_CTR_CNT 0x316C9C
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM2_CH0_CTR_CNT 0x316CA0
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM2_CH1_CTR_CNT 0x316CA4
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM3_CH0_CTR_CNT 0x316CA8
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#define mmSIF_RTR_CTRL_1_E2E_AW_HBM3_CH1_CTR_CNT 0x316CAC
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#define mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_0 0x316CB0
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#define mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_1 0x316CB4
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#define mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_2 0x316CB8
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#define mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_3 0x316CBC
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#endif /* ASIC_REG_SIF_RTR_CTRL_1_REGS_H_ */
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