/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_SIF_RTR_CTRL_0_REGS_H_
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#define ASIC_REG_SIF_RTR_CTRL_0_REGS_H_
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/*
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*****************************************
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* SIF_RTR_CTRL_0 (Prototype: RTR_CTRL)
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*****************************************
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*/
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#define mmSIF_RTR_CTRL_0_PERM_SEL 0x306108
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_0 0x306114
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_1 0x306118
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_2 0x30611C
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_3 0x306120
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_4 0x306124
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_5 0x306128
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_6 0x30612C
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_7 0x306130
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_8 0x306134
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_9 0x306138
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_10 0x30613C
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_11 0x306140
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_12 0x306144
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_13 0x306148
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_14 0x30614C
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_15 0x306150
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_16 0x306154
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_17 0x306158
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_18 0x30615C
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_19 0x306160
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_20 0x306164
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_21 0x306168
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_22 0x30616C
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_23 0x306170
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_24 0x306174
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_25 0x306178
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_26 0x30617C
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#define mmSIF_RTR_CTRL_0_HBM_POLY_H3_27 0x306180
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_0 0x306184
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_1 0x306188
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_2 0x30618C
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_3 0x306190
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_4 0x306194
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_5 0x306198
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_6 0x30619C
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_7 0x3061A0
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_8 0x3061A4
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_9 0x3061A8
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_10 0x3061AC
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_11 0x3061B0
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_12 0x3061B4
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_13 0x3061B8
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#define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_14 0x3061BC
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#define mmSIF_RTR_CTRL_0_SCRAM_SRAM_EN 0x30626C
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#define mmSIF_RTR_CTRL_0_RL_HBM_EN 0x306274
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#define mmSIF_RTR_CTRL_0_RL_HBM_SAT 0x306278
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#define mmSIF_RTR_CTRL_0_RL_HBM_RST 0x30627C
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#define mmSIF_RTR_CTRL_0_RL_HBM_TIMEOUT 0x306280
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#define mmSIF_RTR_CTRL_0_SCRAM_HBM_EN 0x306284
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#define mmSIF_RTR_CTRL_0_RL_PCI_EN 0x306288
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#define mmSIF_RTR_CTRL_0_RL_PCI_SAT 0x30628C
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#define mmSIF_RTR_CTRL_0_RL_PCI_RST 0x306290
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#define mmSIF_RTR_CTRL_0_RL_PCI_TIMEOUT 0x306294
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#define mmSIF_RTR_CTRL_0_RL_SRAM_EN 0x30629C
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#define mmSIF_RTR_CTRL_0_RL_SRAM_SAT 0x3062A0
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#define mmSIF_RTR_CTRL_0_RL_SRAM_RST 0x3062A4
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#define mmSIF_RTR_CTRL_0_RL_SRAM_TIMEOUT 0x3062AC
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#define mmSIF_RTR_CTRL_0_RL_SRAM_RED 0x3062B4
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#define mmSIF_RTR_CTRL_0_E2E_HBM_EN 0x3062EC
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#define mmSIF_RTR_CTRL_0_E2E_PCI_EN 0x3062F0
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#define mmSIF_RTR_CTRL_0_E2E_HBM_WR_SIZE 0x3062F4
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#define mmSIF_RTR_CTRL_0_E2E_PCI_WR_SIZE 0x3062F8
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#define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_SET_EN 0x306404
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#define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_SET 0x306408
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#define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_WRAP 0x30640C
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#define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_CNT 0x306410
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM_CTR_SET_EN 0x306414
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM_CTR_SET 0x306418
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#define mmSIF_RTR_CTRL_0_E2E_HBM_RD_SIZE 0x30641C
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#define mmSIF_RTR_CTRL_0_E2E_PCI_RD_SIZE 0x306420
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#define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_SET_EN 0x306424
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#define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_SET 0x306428
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#define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_WRAP 0x30642C
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#define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_CNT 0x306430
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM_CTR_SET_EN 0x306434
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM_CTR_SET 0x306438
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#define mmSIF_RTR_CTRL_0_NL_HBM_SEL_0 0x306450
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#define mmSIF_RTR_CTRL_0_NL_HBM_SEL_1 0x306454
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#define mmSIF_RTR_CTRL_0_NON_LIN_EN 0x306480
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#define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_0 0x306500
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#define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_1 0x306504
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#define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_2 0x306508
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#define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_3 0x30650C
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#define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_4 0x306510
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_0 0x306514
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_1 0x306520
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_2 0x306524
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_3 0x306528
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_4 0x30652C
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_5 0x306530
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_6 0x306534
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_7 0x306538
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_8 0x30653C
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#define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_9 0x306540
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_0 0x306550
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_1 0x306554
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_2 0x306558
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_3 0x30655C
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_4 0x306560
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_5 0x306564
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_6 0x306568
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_7 0x30656C
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_8 0x306570
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_9 0x306574
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_10 0x306578
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_11 0x30657C
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_12 0x306580
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_13 0x306584
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_14 0x306588
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_15 0x30658C
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_16 0x306590
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_17 0x306594
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#define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_18 0x306598
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_0 0x3065E4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_1 0x3065E8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_2 0x3065EC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_3 0x3065F0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_4 0x3065F4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_5 0x3065F8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_6 0x3065FC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_7 0x306600
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_8 0x306604
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_9 0x306608
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_10 0x30660C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_11 0x306610
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_12 0x306614
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_13 0x306618
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_14 0x30661C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_15 0x306620
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_0 0x306624
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_1 0x306628
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_2 0x30662C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_3 0x306630
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_4 0x306634
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_5 0x306638
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_6 0x30663C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_7 0x306640
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_8 0x306644
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_9 0x306648
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_10 0x30664C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_11 0x306650
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_12 0x306654
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_13 0x306658
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_14 0x30665C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_15 0x306660
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_0 0x306664
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_1 0x306668
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_2 0x30666C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_3 0x306670
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_4 0x306674
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_5 0x306678
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_6 0x30667C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_7 0x306680
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_8 0x306684
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_9 0x306688
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_10 0x30668C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_11 0x306690
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_12 0x306694
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_13 0x306698
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_14 0x30669C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_15 0x3066A0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_0 0x3066A4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_1 0x3066A8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_2 0x3066AC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_3 0x3066B0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_4 0x3066B4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_5 0x3066B8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_6 0x3066BC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_7 0x3066C0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_8 0x3066C4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_9 0x3066C8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_10 0x3066CC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_11 0x3066D0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_12 0x3066D4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_13 0x3066D8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_14 0x3066DC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_15 0x3066E0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_0 0x3066E4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_1 0x3066E8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_2 0x3066EC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_3 0x3066F0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_4 0x3066F4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_5 0x3066F8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_6 0x3066FC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_7 0x306700
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_8 0x306704
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_9 0x306708
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_10 0x30670C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_11 0x306710
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_12 0x306714
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_13 0x306718
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_14 0x30671C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_15 0x306720
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_0 0x306724
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_1 0x306728
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_2 0x30672C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_3 0x306730
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_4 0x306734
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_5 0x306738
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_6 0x30673C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_7 0x306740
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_8 0x306744
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_9 0x306748
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_10 0x30674C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_11 0x306750
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_12 0x306754
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_13 0x306758
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_14 0x30675C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_15 0x306760
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_0 0x306764
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_1 0x306768
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_2 0x30676C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_3 0x306770
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_4 0x306774
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_5 0x306778
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_6 0x30677C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_7 0x306780
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_8 0x306784
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_9 0x306788
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_10 0x30678C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_11 0x306790
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_12 0x306794
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_13 0x306798
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_14 0x30679C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_15 0x3067A0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_0 0x3067A4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_1 0x3067A8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_2 0x3067AC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_3 0x3067B0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_4 0x3067B4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_5 0x3067B8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_6 0x3067BC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_7 0x3067C0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_8 0x3067C4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_9 0x3067C8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_10 0x3067CC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_11 0x3067D0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_12 0x3067D4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_13 0x3067D8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_14 0x3067DC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_15 0x3067E0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_0 0x306824
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_1 0x306828
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_2 0x30682C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_3 0x306830
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_4 0x306834
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_5 0x306838
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_6 0x30683C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_7 0x306840
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_8 0x306844
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_9 0x306848
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_10 0x30684C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_11 0x306850
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_12 0x306854
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_13 0x306858
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_14 0x30685C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_15 0x306860
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_0 0x306864
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_1 0x306868
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_2 0x30686C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_3 0x306870
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_4 0x306874
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_5 0x306878
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_6 0x30687C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_7 0x306880
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_8 0x306884
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_9 0x306888
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_10 0x30688C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_11 0x306890
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_12 0x306894
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_13 0x306898
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_14 0x30689C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_15 0x3068A0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_0 0x3068A4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_1 0x3068A8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_2 0x3068AC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_3 0x3068B0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_4 0x3068B4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_5 0x3068B8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_6 0x3068BC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_7 0x3068C0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_8 0x3068C4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_9 0x3068C8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_10 0x3068CC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_11 0x3068D0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_12 0x3068D4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_13 0x3068D8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_14 0x3068DC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_15 0x3068E0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_0 0x3068E4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_1 0x3068E8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_2 0x3068EC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_3 0x3068F0
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_4 0x3068F4
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_5 0x3068F8
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_6 0x3068FC
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_7 0x306900
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_8 0x306904
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_9 0x306908
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_10 0x30690C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_11 0x306910
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_12 0x306914
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_13 0x306918
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_14 0x30691C
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_15 0x306920
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_0 0x306924
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_1 0x306928
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_2 0x30692C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_3 0x306930
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_4 0x306934
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_5 0x306938
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_6 0x30693C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_7 0x306940
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_8 0x306944
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_9 0x306948
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_10 0x30694C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_11 0x306950
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_12 0x306954
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_13 0x306958
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_14 0x30695C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_15 0x306960
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_0 0x306964
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_1 0x306968
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_2 0x30696C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_3 0x306970
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_4 0x306974
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_5 0x306978
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_6 0x30697C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_7 0x306980
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_8 0x306984
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_9 0x306988
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_10 0x30698C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_11 0x306990
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_12 0x306994
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_13 0x306998
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_14 0x30699C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_15 0x3069A0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_0 0x3069A4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_1 0x3069A8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_2 0x3069AC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_3 0x3069B0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_4 0x3069B4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_5 0x3069B8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_6 0x3069BC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_7 0x3069C0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_8 0x3069C4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_9 0x3069C8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_10 0x3069CC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_11 0x3069D0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_12 0x3069D4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_13 0x3069D8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_14 0x3069DC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_15 0x3069E0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_0 0x3069E4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_1 0x3069E8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_2 0x3069EC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_3 0x3069F0
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_4 0x3069F4
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_5 0x3069F8
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_6 0x3069FC
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_7 0x306A00
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_8 0x306A04
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_9 0x306A08
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_10 0x306A0C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_11 0x306A10
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_12 0x306A14
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_13 0x306A18
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_14 0x306A1C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_15 0x306A20
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_HIT_AW 0x306A64
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#define mmSIF_RTR_CTRL_0_RANGE_SEC_HIT_AR 0x306A68
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_HIT_AW 0x306A6C
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#define mmSIF_RTR_CTRL_0_RANGE_PRIV_HIT_AR 0x306A70
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#define mmSIF_RTR_CTRL_0_RGL_CFG 0x306B64
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#define mmSIF_RTR_CTRL_0_RGL_SHIFT 0x306B68
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#define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_0 0x306B6C
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#define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_1 0x306B70
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#define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_2 0x306B74
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#define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_3 0x306B78
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#define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_4 0x306B7C
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#define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_5 0x306B80
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#define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_6 0x306B84
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#define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_7 0x306B88
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#define mmSIF_RTR_CTRL_0_RGL_TOKEN_0 0x306BAC
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#define mmSIF_RTR_CTRL_0_RGL_TOKEN_1 0x306BB0
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#define mmSIF_RTR_CTRL_0_RGL_TOKEN_2 0x306BB4
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#define mmSIF_RTR_CTRL_0_RGL_TOKEN_3 0x306BB8
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#define mmSIF_RTR_CTRL_0_RGL_TOKEN_4 0x306BBC
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#define mmSIF_RTR_CTRL_0_RGL_TOKEN_5 0x306BC0
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#define mmSIF_RTR_CTRL_0_RGL_TOKEN_6 0x306BC4
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#define mmSIF_RTR_CTRL_0_RGL_TOKEN_7 0x306BC8
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#define mmSIF_RTR_CTRL_0_RGL_BANK_ID_0 0x306BEC
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#define mmSIF_RTR_CTRL_0_RGL_BANK_ID_1 0x306BF0
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#define mmSIF_RTR_CTRL_0_RGL_BANK_ID_2 0x306BF4
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#define mmSIF_RTR_CTRL_0_RGL_BANK_ID_3 0x306BF8
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#define mmSIF_RTR_CTRL_0_RGL_BANK_ID_4 0x306BFC
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#define mmSIF_RTR_CTRL_0_RGL_BANK_ID_5 0x306C00
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#define mmSIF_RTR_CTRL_0_RGL_BANK_ID_6 0x306C04
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#define mmSIF_RTR_CTRL_0_RGL_BANK_ID_7 0x306C08
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#define mmSIF_RTR_CTRL_0_RGL_WDT 0x306C2C
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH0_CTR_WRAP 0x306C30
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH1_CTR_WRAP 0x306C34
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH0_CTR_WRAP 0x306C38
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH1_CTR_WRAP 0x306C3C
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH0_CTR_WRAP 0x306C40
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH1_CTR_WRAP 0x306C44
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH0_CTR_WRAP 0x306C48
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH1_CTR_WRAP 0x306C4C
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH0_CTR_CNT 0x306C50
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH1_CTR_CNT 0x306C54
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH0_CTR_CNT 0x306C58
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH1_CTR_CNT 0x306C5C
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH0_CTR_CNT 0x306C60
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH1_CTR_CNT 0x306C64
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH0_CTR_CNT 0x306C68
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#define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH1_CTR_CNT 0x306C6C
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH0_CTR_WRAP 0x306C70
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH1_CTR_WRAP 0x306C74
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH0_CTR_WRAP 0x306C78
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH1_CTR_WRAP 0x306C7C
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH0_CTR_WRAP 0x306C80
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH1_CTR_WRAP 0x306C84
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH0_CTR_WRAP 0x306C88
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH1_CTR_WRAP 0x306C8C
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH0_CTR_CNT 0x306C90
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH1_CTR_CNT 0x306C94
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH0_CTR_CNT 0x306C98
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH1_CTR_CNT 0x306C9C
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH0_CTR_CNT 0x306CA0
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH1_CTR_CNT 0x306CA4
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH0_CTR_CNT 0x306CA8
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#define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH1_CTR_CNT 0x306CAC
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#define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_0 0x306CB0
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#define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_1 0x306CB4
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#define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_2 0x306CB8
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#define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_3 0x306CBC
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#endif /* ASIC_REG_SIF_RTR_CTRL_0_REGS_H_ */
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