/* SPDX-License-Identifier: GPL-2.0
|
*
|
* Copyright 2016-2018 HabanaLabs, Ltd.
|
* All Rights Reserved.
|
*
|
*/
|
|
/************************************
|
** This is an auto-generated file **
|
** DO NOT EDIT BELOW **
|
************************************/
|
|
#ifndef ASIC_REG_NIF_RTR_CTRL_3_REGS_H_
|
#define ASIC_REG_NIF_RTR_CTRL_3_REGS_H_
|
|
/*
|
*****************************************
|
* NIF_RTR_CTRL_3 (Prototype: RTR_CTRL)
|
*****************************************
|
*/
|
|
#define mmNIF_RTR_CTRL_3_PERM_SEL 0x3B6108
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_0 0x3B6114
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_1 0x3B6118
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_2 0x3B611C
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_3 0x3B6120
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_4 0x3B6124
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_5 0x3B6128
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_6 0x3B612C
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_7 0x3B6130
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_8 0x3B6134
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_9 0x3B6138
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_10 0x3B613C
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_11 0x3B6140
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_12 0x3B6144
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_13 0x3B6148
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_14 0x3B614C
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_15 0x3B6150
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_16 0x3B6154
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_17 0x3B6158
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_18 0x3B615C
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_19 0x3B6160
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_20 0x3B6164
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_21 0x3B6168
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_22 0x3B616C
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_23 0x3B6170
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_24 0x3B6174
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_25 0x3B6178
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_26 0x3B617C
|
|
#define mmNIF_RTR_CTRL_3_HBM_POLY_H3_27 0x3B6180
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_0 0x3B6184
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_1 0x3B6188
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_2 0x3B618C
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_3 0x3B6190
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_4 0x3B6194
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_5 0x3B6198
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_6 0x3B619C
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_7 0x3B61A0
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_8 0x3B61A4
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_9 0x3B61A8
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_10 0x3B61AC
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_11 0x3B61B0
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_12 0x3B61B4
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_13 0x3B61B8
|
|
#define mmNIF_RTR_CTRL_3_SRAM_POLY_H3_14 0x3B61BC
|
|
#define mmNIF_RTR_CTRL_3_SCRAM_SRAM_EN 0x3B626C
|
|
#define mmNIF_RTR_CTRL_3_RL_HBM_EN 0x3B6274
|
|
#define mmNIF_RTR_CTRL_3_RL_HBM_SAT 0x3B6278
|
|
#define mmNIF_RTR_CTRL_3_RL_HBM_RST 0x3B627C
|
|
#define mmNIF_RTR_CTRL_3_RL_HBM_TIMEOUT 0x3B6280
|
|
#define mmNIF_RTR_CTRL_3_SCRAM_HBM_EN 0x3B6284
|
|
#define mmNIF_RTR_CTRL_3_RL_PCI_EN 0x3B6288
|
|
#define mmNIF_RTR_CTRL_3_RL_PCI_SAT 0x3B628C
|
|
#define mmNIF_RTR_CTRL_3_RL_PCI_RST 0x3B6290
|
|
#define mmNIF_RTR_CTRL_3_RL_PCI_TIMEOUT 0x3B6294
|
|
#define mmNIF_RTR_CTRL_3_RL_SRAM_EN 0x3B629C
|
|
#define mmNIF_RTR_CTRL_3_RL_SRAM_SAT 0x3B62A0
|
|
#define mmNIF_RTR_CTRL_3_RL_SRAM_RST 0x3B62A4
|
|
#define mmNIF_RTR_CTRL_3_RL_SRAM_TIMEOUT 0x3B62AC
|
|
#define mmNIF_RTR_CTRL_3_RL_SRAM_RED 0x3B62B4
|
|
#define mmNIF_RTR_CTRL_3_E2E_HBM_EN 0x3B62EC
|
|
#define mmNIF_RTR_CTRL_3_E2E_PCI_EN 0x3B62F0
|
|
#define mmNIF_RTR_CTRL_3_E2E_HBM_WR_SIZE 0x3B62F4
|
|
#define mmNIF_RTR_CTRL_3_E2E_PCI_WR_SIZE 0x3B62F8
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_PCI_CTR_SET_EN 0x3B6404
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_PCI_CTR_SET 0x3B6408
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_PCI_CTR_WRAP 0x3B640C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_PCI_CTR_CNT 0x3B6410
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM_CTR_SET_EN 0x3B6414
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM_CTR_SET 0x3B6418
|
|
#define mmNIF_RTR_CTRL_3_E2E_HBM_RD_SIZE 0x3B641C
|
|
#define mmNIF_RTR_CTRL_3_E2E_PCI_RD_SIZE 0x3B6420
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_PCI_CTR_SET_EN 0x3B6424
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_PCI_CTR_SET 0x3B6428
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_PCI_CTR_WRAP 0x3B642C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_PCI_CTR_CNT 0x3B6430
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM_CTR_SET_EN 0x3B6434
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM_CTR_SET 0x3B6438
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_SEL_0 0x3B6450
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_SEL_1 0x3B6454
|
|
#define mmNIF_RTR_CTRL_3_NON_LIN_EN 0x3B6480
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_BANK_0 0x3B6500
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_BANK_1 0x3B6504
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_BANK_2 0x3B6508
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_BANK_3 0x3B650C
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_BANK_4 0x3B6510
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_0 0x3B6514
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_1 0x3B6520
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_2 0x3B6524
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_3 0x3B6528
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_4 0x3B652C
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_5 0x3B6530
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_6 0x3B6534
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_7 0x3B6538
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_8 0x3B653C
|
|
#define mmNIF_RTR_CTRL_3_NL_SRAM_OFFSET_9 0x3B6540
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_0 0x3B6550
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_1 0x3B6554
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_2 0x3B6558
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_3 0x3B655C
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_4 0x3B6560
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_5 0x3B6564
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_6 0x3B6568
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_7 0x3B656C
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_8 0x3B6570
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_9 0x3B6574
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_10 0x3B6578
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_11 0x3B657C
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_12 0x3B6580
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_13 0x3B6584
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_14 0x3B6588
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_15 0x3B658C
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_16 0x3B6590
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_17 0x3B6594
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_OFFSET_18 0x3B6598
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_0 0x3B65E4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_1 0x3B65E8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_2 0x3B65EC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_3 0x3B65F0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_4 0x3B65F4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_5 0x3B65F8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_6 0x3B65FC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_7 0x3B6600
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_8 0x3B6604
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_9 0x3B6608
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_10 0x3B660C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_11 0x3B6610
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_12 0x3B6614
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_13 0x3B6618
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_14 0x3B661C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_15 0x3B6620
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_0 0x3B6624
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_1 0x3B6628
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_2 0x3B662C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_3 0x3B6630
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_4 0x3B6634
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_5 0x3B6638
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_6 0x3B663C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_7 0x3B6640
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_8 0x3B6644
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_9 0x3B6648
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_10 0x3B664C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_11 0x3B6650
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_12 0x3B6654
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_13 0x3B6658
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_14 0x3B665C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_15 0x3B6660
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_0 0x3B6664
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_1 0x3B6668
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_2 0x3B666C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_3 0x3B6670
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_4 0x3B6674
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_5 0x3B6678
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_6 0x3B667C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_7 0x3B6680
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_8 0x3B6684
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_9 0x3B6688
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_10 0x3B668C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_11 0x3B6690
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_12 0x3B6694
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_13 0x3B6698
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_14 0x3B669C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_15 0x3B66A0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_0 0x3B66A4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_1 0x3B66A8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_2 0x3B66AC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_3 0x3B66B0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_4 0x3B66B4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_5 0x3B66B8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_6 0x3B66BC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_7 0x3B66C0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_8 0x3B66C4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_9 0x3B66C8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_10 0x3B66CC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_11 0x3B66D0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_12 0x3B66D4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_13 0x3B66D8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_14 0x3B66DC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_15 0x3B66E0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_0 0x3B66E4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_1 0x3B66E8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_2 0x3B66EC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_3 0x3B66F0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_4 0x3B66F4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_5 0x3B66F8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_6 0x3B66FC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_7 0x3B6700
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_8 0x3B6704
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_9 0x3B6708
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_10 0x3B670C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_11 0x3B6710
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_12 0x3B6714
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_13 0x3B6718
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_14 0x3B671C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_15 0x3B6720
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_0 0x3B6724
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_1 0x3B6728
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_2 0x3B672C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_3 0x3B6730
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_4 0x3B6734
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_5 0x3B6738
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_6 0x3B673C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_7 0x3B6740
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_8 0x3B6744
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_9 0x3B6748
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_10 0x3B674C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_11 0x3B6750
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_12 0x3B6754
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_13 0x3B6758
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_14 0x3B675C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_15 0x3B6760
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_0 0x3B6764
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_1 0x3B6768
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_2 0x3B676C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_3 0x3B6770
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_4 0x3B6774
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_5 0x3B6778
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_6 0x3B677C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_7 0x3B6780
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_8 0x3B6784
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_9 0x3B6788
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_10 0x3B678C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_11 0x3B6790
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_12 0x3B6794
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_13 0x3B6798
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_14 0x3B679C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_15 0x3B67A0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_0 0x3B67A4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_1 0x3B67A8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_2 0x3B67AC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_3 0x3B67B0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_4 0x3B67B4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_5 0x3B67B8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_6 0x3B67BC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_7 0x3B67C0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_8 0x3B67C4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_9 0x3B67C8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_10 0x3B67CC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_11 0x3B67D0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_12 0x3B67D4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_13 0x3B67D8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_14 0x3B67DC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_15 0x3B67E0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_0 0x3B6824
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_1 0x3B6828
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_2 0x3B682C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_3 0x3B6830
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_4 0x3B6834
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_5 0x3B6838
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_6 0x3B683C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_7 0x3B6840
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_8 0x3B6844
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_9 0x3B6848
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_10 0x3B684C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_11 0x3B6850
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_12 0x3B6854
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_13 0x3B6858
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_14 0x3B685C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_15 0x3B6860
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_0 0x3B6864
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_1 0x3B6868
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_2 0x3B686C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_3 0x3B6870
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_4 0x3B6874
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_5 0x3B6878
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_6 0x3B687C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_7 0x3B6880
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_8 0x3B6884
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_9 0x3B6888
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_10 0x3B688C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_11 0x3B6890
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_12 0x3B6894
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_13 0x3B6898
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_14 0x3B689C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_15 0x3B68A0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_0 0x3B68A4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_1 0x3B68A8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_2 0x3B68AC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_3 0x3B68B0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_4 0x3B68B4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_5 0x3B68B8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_6 0x3B68BC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_7 0x3B68C0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_8 0x3B68C4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_9 0x3B68C8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_10 0x3B68CC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_11 0x3B68D0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_12 0x3B68D4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_13 0x3B68D8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_14 0x3B68DC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_15 0x3B68E0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_0 0x3B68E4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_1 0x3B68E8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_2 0x3B68EC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_3 0x3B68F0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_4 0x3B68F4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_5 0x3B68F8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_6 0x3B68FC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_7 0x3B6900
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_8 0x3B6904
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_9 0x3B6908
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_10 0x3B690C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_11 0x3B6910
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_12 0x3B6914
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_13 0x3B6918
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_14 0x3B691C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_15 0x3B6920
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_0 0x3B6924
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_1 0x3B6928
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_2 0x3B692C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_3 0x3B6930
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_4 0x3B6934
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_5 0x3B6938
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_6 0x3B693C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_7 0x3B6940
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_8 0x3B6944
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_9 0x3B6948
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_10 0x3B694C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_11 0x3B6950
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_12 0x3B6954
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_13 0x3B6958
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_14 0x3B695C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_15 0x3B6960
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_0 0x3B6964
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_1 0x3B6968
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_2 0x3B696C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_3 0x3B6970
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_4 0x3B6974
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_5 0x3B6978
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_6 0x3B697C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_7 0x3B6980
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_8 0x3B6984
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_9 0x3B6988
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_10 0x3B698C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_11 0x3B6990
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_12 0x3B6994
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_13 0x3B6998
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_14 0x3B699C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_15 0x3B69A0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_0 0x3B69A4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_1 0x3B69A8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_2 0x3B69AC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_3 0x3B69B0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_4 0x3B69B4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_5 0x3B69B8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_6 0x3B69BC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_7 0x3B69C0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_8 0x3B69C4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_9 0x3B69C8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_10 0x3B69CC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_11 0x3B69D0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_12 0x3B69D4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_13 0x3B69D8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_14 0x3B69DC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_15 0x3B69E0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_0 0x3B69E4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_1 0x3B69E8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_2 0x3B69EC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_3 0x3B69F0
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_4 0x3B69F4
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_5 0x3B69F8
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_6 0x3B69FC
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_7 0x3B6A00
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_8 0x3B6A04
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_9 0x3B6A08
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_10 0x3B6A0C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_11 0x3B6A10
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_12 0x3B6A14
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_13 0x3B6A18
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_14 0x3B6A1C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_15 0x3B6A20
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_HIT_AW 0x3B6A64
|
|
#define mmNIF_RTR_CTRL_3_RANGE_SEC_HIT_AR 0x3B6A68
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_HIT_AW 0x3B6A6C
|
|
#define mmNIF_RTR_CTRL_3_RANGE_PRIV_HIT_AR 0x3B6A70
|
|
#define mmNIF_RTR_CTRL_3_RGL_CFG 0x3B6B64
|
|
#define mmNIF_RTR_CTRL_3_RGL_SHIFT 0x3B6B68
|
|
#define mmNIF_RTR_CTRL_3_RGL_EXPECTED_LAT_0 0x3B6B6C
|
|
#define mmNIF_RTR_CTRL_3_RGL_EXPECTED_LAT_1 0x3B6B70
|
|
#define mmNIF_RTR_CTRL_3_RGL_EXPECTED_LAT_2 0x3B6B74
|
|
#define mmNIF_RTR_CTRL_3_RGL_EXPECTED_LAT_3 0x3B6B78
|
|
#define mmNIF_RTR_CTRL_3_RGL_EXPECTED_LAT_4 0x3B6B7C
|
|
#define mmNIF_RTR_CTRL_3_RGL_EXPECTED_LAT_5 0x3B6B80
|
|
#define mmNIF_RTR_CTRL_3_RGL_EXPECTED_LAT_6 0x3B6B84
|
|
#define mmNIF_RTR_CTRL_3_RGL_EXPECTED_LAT_7 0x3B6B88
|
|
#define mmNIF_RTR_CTRL_3_RGL_TOKEN_0 0x3B6BAC
|
|
#define mmNIF_RTR_CTRL_3_RGL_TOKEN_1 0x3B6BB0
|
|
#define mmNIF_RTR_CTRL_3_RGL_TOKEN_2 0x3B6BB4
|
|
#define mmNIF_RTR_CTRL_3_RGL_TOKEN_3 0x3B6BB8
|
|
#define mmNIF_RTR_CTRL_3_RGL_TOKEN_4 0x3B6BBC
|
|
#define mmNIF_RTR_CTRL_3_RGL_TOKEN_5 0x3B6BC0
|
|
#define mmNIF_RTR_CTRL_3_RGL_TOKEN_6 0x3B6BC4
|
|
#define mmNIF_RTR_CTRL_3_RGL_TOKEN_7 0x3B6BC8
|
|
#define mmNIF_RTR_CTRL_3_RGL_BANK_ID_0 0x3B6BEC
|
|
#define mmNIF_RTR_CTRL_3_RGL_BANK_ID_1 0x3B6BF0
|
|
#define mmNIF_RTR_CTRL_3_RGL_BANK_ID_2 0x3B6BF4
|
|
#define mmNIF_RTR_CTRL_3_RGL_BANK_ID_3 0x3B6BF8
|
|
#define mmNIF_RTR_CTRL_3_RGL_BANK_ID_4 0x3B6BFC
|
|
#define mmNIF_RTR_CTRL_3_RGL_BANK_ID_5 0x3B6C00
|
|
#define mmNIF_RTR_CTRL_3_RGL_BANK_ID_6 0x3B6C04
|
|
#define mmNIF_RTR_CTRL_3_RGL_BANK_ID_7 0x3B6C08
|
|
#define mmNIF_RTR_CTRL_3_RGL_WDT 0x3B6C2C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM0_CH0_CTR_WRAP 0x3B6C30
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM0_CH1_CTR_WRAP 0x3B6C34
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM1_CH0_CTR_WRAP 0x3B6C38
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM1_CH1_CTR_WRAP 0x3B6C3C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM2_CH0_CTR_WRAP 0x3B6C40
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM2_CH1_CTR_WRAP 0x3B6C44
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM3_CH0_CTR_WRAP 0x3B6C48
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM3_CH1_CTR_WRAP 0x3B6C4C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM0_CH0_CTR_CNT 0x3B6C50
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM0_CH1_CTR_CNT 0x3B6C54
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM1_CH0_CTR_CNT 0x3B6C58
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM1_CH1_CTR_CNT 0x3B6C5C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM2_CH0_CTR_CNT 0x3B6C60
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM2_CH1_CTR_CNT 0x3B6C64
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM3_CH0_CTR_CNT 0x3B6C68
|
|
#define mmNIF_RTR_CTRL_3_E2E_AR_HBM3_CH1_CTR_CNT 0x3B6C6C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM0_CH0_CTR_WRAP 0x3B6C70
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM0_CH1_CTR_WRAP 0x3B6C74
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM1_CH0_CTR_WRAP 0x3B6C78
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM1_CH1_CTR_WRAP 0x3B6C7C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM2_CH0_CTR_WRAP 0x3B6C80
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM2_CH1_CTR_WRAP 0x3B6C84
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM3_CH0_CTR_WRAP 0x3B6C88
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM3_CH1_CTR_WRAP 0x3B6C8C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM0_CH0_CTR_CNT 0x3B6C90
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM0_CH1_CTR_CNT 0x3B6C94
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM1_CH0_CTR_CNT 0x3B6C98
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM1_CH1_CTR_CNT 0x3B6C9C
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM2_CH0_CTR_CNT 0x3B6CA0
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM2_CH1_CTR_CNT 0x3B6CA4
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM3_CH0_CTR_CNT 0x3B6CA8
|
|
#define mmNIF_RTR_CTRL_3_E2E_AW_HBM3_CH1_CTR_CNT 0x3B6CAC
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_PC_SEL_0 0x3B6CB0
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_PC_SEL_1 0x3B6CB4
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_PC_SEL_2 0x3B6CB8
|
|
#define mmNIF_RTR_CTRL_3_NL_HBM_PC_SEL_3 0x3B6CBC
|
|
#endif /* ASIC_REG_NIF_RTR_CTRL_3_REGS_H_ */
|