/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2018-2020 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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#ifndef HL_BOOT_IF_H
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#define HL_BOOT_IF_H
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#define LKD_HARD_RESET_MAGIC 0xED7BD694
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#define HL_POWER9_HOST_MAGIC 0x1DA30009
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#define BOOT_FIT_SRAM_OFFSET 0x200000
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/*
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* CPU error bits in BOOT_ERROR registers
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*
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* CPU_BOOT_ERR0_DRAM_INIT_FAIL DRAM initialization failed.
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* DRAM is not reliable to use.
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*
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* CPU_BOOT_ERR0_FIT_CORRUPTED FIT data integrity verification of the
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* image provided by the host has failed.
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*
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* CPU_BOOT_ERR0_TS_INIT_FAIL Thermal Sensor initialization failed.
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* Boot continues as usual, but keep in
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* mind this is a warning.
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*
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* CPU_BOOT_ERR0_DRAM_SKIPPED DRAM initialization has been skipped.
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* Skipping DRAM initialization has been
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* requested (e.g. strap, command, etc.)
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* and FW skipped the DRAM initialization.
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* Host can initialize the DRAM.
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*
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* CPU_BOOT_ERR0_BMC_WAIT_SKIPPED Waiting for BMC data will be skipped.
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* Meaning the BMC data might not be
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* available until reset.
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*
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* CPU_BOOT_ERR0_NIC_DATA_NOT_RDY NIC data from BMC is not ready.
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* BMC has not provided the NIC data yet.
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* Once provided this bit will be cleared.
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*
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* CPU_BOOT_ERR0_NIC_FW_FAIL NIC FW loading failed.
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* The NIC FW loading and initialization
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* failed. This means NICs are not usable.
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*
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* CPU_BOOT_ERR0_SECURITY_NOT_RDY Chip security initialization has been
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* started, but is not ready yet - chip
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* cannot be accessed.
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*
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* CPU_BOOT_ERR0_SECURITY_FAIL Security related tasks have failed.
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* The tasks are security init (root of
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* trust), boot authentication (chain of
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* trust), data packets authentication.
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*
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* CPU_BOOT_ERR0_ENABLED Error registers enabled.
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* This is a main indication that the
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* running FW populates the error
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* registers. Meaning the error bits are
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* not garbage, but actual error statuses.
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*/
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#define CPU_BOOT_ERR0_DRAM_INIT_FAIL (1 << 0)
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#define CPU_BOOT_ERR0_FIT_CORRUPTED (1 << 1)
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#define CPU_BOOT_ERR0_TS_INIT_FAIL (1 << 2)
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#define CPU_BOOT_ERR0_DRAM_SKIPPED (1 << 3)
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#define CPU_BOOT_ERR0_BMC_WAIT_SKIPPED (1 << 4)
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#define CPU_BOOT_ERR0_NIC_DATA_NOT_RDY (1 << 5)
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#define CPU_BOOT_ERR0_NIC_FW_FAIL (1 << 6)
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#define CPU_BOOT_ERR0_SECURITY_NOT_RDY (1 << 7)
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#define CPU_BOOT_ERR0_SECURITY_FAIL (1 << 8)
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#define CPU_BOOT_ERR0_ENABLED (1 << 31)
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enum cpu_boot_status {
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CPU_BOOT_STATUS_NA = 0, /* Default value after reset of chip */
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CPU_BOOT_STATUS_IN_WFE = 1,
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CPU_BOOT_STATUS_DRAM_RDY = 2,
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CPU_BOOT_STATUS_SRAM_AVAIL = 3,
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CPU_BOOT_STATUS_IN_BTL = 4, /* BTL is H/W FSM */
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CPU_BOOT_STATUS_IN_PREBOOT = 5,
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CPU_BOOT_STATUS_IN_SPL, /* deprecated - not reported */
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CPU_BOOT_STATUS_IN_UBOOT = 7,
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CPU_BOOT_STATUS_DRAM_INIT_FAIL, /* deprecated - will be removed */
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CPU_BOOT_STATUS_FIT_CORRUPTED, /* deprecated - will be removed */
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/* U-Boot console prompt activated, commands are not processed */
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CPU_BOOT_STATUS_UBOOT_NOT_READY = 10,
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/* Finished NICs init, reported after DRAM and NICs */
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CPU_BOOT_STATUS_NIC_FW_RDY = 11,
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CPU_BOOT_STATUS_TS_INIT_FAIL, /* deprecated - will be removed */
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CPU_BOOT_STATUS_DRAM_SKIPPED, /* deprecated - will be removed */
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CPU_BOOT_STATUS_BMC_WAITING_SKIPPED, /* deprecated - will be removed */
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/* Last boot loader progress status, ready to receive commands */
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CPU_BOOT_STATUS_READY_TO_BOOT = 15,
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/* Internal Boot finished, ready for boot-fit */
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CPU_BOOT_STATUS_WAITING_FOR_BOOT_FIT = 16,
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/* Internal Security has been initialized, device can be accessed */
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CPU_BOOT_STATUS_SECURITY_READY = 17,
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};
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enum kmd_msg {
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KMD_MSG_NA = 0,
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KMD_MSG_GOTO_WFE,
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KMD_MSG_FIT_RDY,
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KMD_MSG_SKIP_BMC,
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};
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enum cpu_msg_status {
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CPU_MSG_CLR = 0,
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CPU_MSG_OK,
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CPU_MSG_ERR,
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};
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#endif /* HL_BOOT_IF_H */
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