/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Arm v8 Self-Hosted trace support.
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*
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* Copyright (C) 2021 ARM Ltd.
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*/
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#ifndef __CORESIGHT_SELF_HOSTED_TRACE_H
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#define __CORESIGHT_SELF_HOSTED_TRACE_H
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#include <asm/sysreg.h>
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static inline u64 read_trfcr(void)
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{
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return read_sysreg_s(SYS_TRFCR_EL1);
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}
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static inline void write_trfcr(u64 val)
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{
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write_sysreg_s(val, SYS_TRFCR_EL1);
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isb();
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}
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static inline void cpu_prohibit_trace(void)
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{
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u64 trfcr = read_trfcr();
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/* Prohibit tracing at EL0 & the kernel EL */
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write_trfcr(trfcr & ~(TRFCR_ELx_ExTRE | TRFCR_ELx_E0TRE));
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}
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#endif /* __CORESIGHT_SELF_HOSTED_TRACE_H */
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