// SPDX-License-Identifier: GPL-2.0
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///*****************************************
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// Copyright (C) 2009-2019
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// ITE Tech. Inc. All Rights Reserved
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///*****************************************
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// @file <mipi_rx.h>
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// @author Pet.Weng@ite.com.tw
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// @date 2019/02/15
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// @fileversion: IT6161_SAMPLE_0.50
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//******************************************/
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#ifndef _MIPIRX_H_
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#define _MIPIRX_H_
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#define MIPIRX_Debug_message 1
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#define DEBUG_MIPIRX
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#ifdef DEBUG_MIPIRX
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#define MIPIRX_DEBUG_PRINT(x) printf x
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#else
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#define MIPIRX_DEBUG_PRINT(x)
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#endif
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#define ENABLE_MIPI_SOURCE (0)
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//////////////////////////////////////////////////////////////////////
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//reference: MIPI Alliance Specification for DSI Ch8.7 Table 16 Data Types for Processor-sourced Packets
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#define RGB_24b 0x3E
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#define RGB_30b 0x0D
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#define RGB_36b 0x1D
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#define RGB_18b 0x1E
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#define RGB_18b_L 0x2E
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#define YCbCr_16b 0x2C
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#define YCbCr_20b 0x0C
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#define YCbCr_24b 0x1C
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#define FrmPkt 0
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#define SbSFull 3
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#define TopBtm 6
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#define SbSHalf 8
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#define DDC75K 0
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#define DDC125K 1
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#define DDC312K 2
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#define PICAR_NO 0
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#define PICAR4_3 1
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#define PICAR16_9 2
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#define ACTAR_PIC 8
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#define ACTAR4_3 9
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#define ACTAR16_9 10
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#define ACTAR14_9 11
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// int LaneNo, EnLBR, VidFmt, TstPat, LaneNoOri, EnLBROri;
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// Debug Option
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//int EnDebug = FALSE; // (default = FALSE)
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//int REG_RXTXDebug = 1; // 1:TX 0:RX
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//tx
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//int TxDbgSel = 0x00; //0x10:test
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//int REGDBGMUX = 0;
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//int EnDbgTxOut = 0;
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//rx
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// int RxDbgSel = 3;//0x11:PPS
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// int PPSDbgSel = 0;
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#define LMDbgSel 0 //int LMDbgSel= 0; //0~7
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///////////////////////////MPRX/////////////////////
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// for PatGen
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#define EnRxPatGen FALSE// int EnRxPatGen = FALSE; // TRUE : HSync , VSync , DE from patgen, progressive mode only (default = FALSE)
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// MP PtGen option
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#define MPVidType RGB_24b//RGB_24b//RGB_24b//int MPVidType = RGB_18b_L; // RGB_24b, RGB_18b, RGB_18b_L
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//system control
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// #define MPPHYPCLKInv FALSE//int MPPHYPCLKInv = FALSE; // for FPGA only, >200MHz set TRUE
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#if (IC_VERSION == 0xC0)
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// #define MPPHYMCLKInv FALSE//int MPPHYMCLKInv = TRUE; //default:TRUE
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#define InvMCLK TRUE //int InvMCLK = FALSE; //FALSE for solomon, if NonUFO, MCLK max = 140MHz with InvMCLK=TRUE
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#else
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// #define MPPHYMCLKInv TRUE//int MPPHYMCLKInv = TRUE; //default:TRUE
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#define InvMCLK FALSE //int InvMCLK = FALSE; //FALSE for solomon, if NonUFO, MCLK max = 140MHz with InvMCLK=TRUE
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#endif //#if (IC_VERSION == 0xC0)
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// #define MPPHYMCLKOInv FALSE//int MPPHYMCLKOInv = FALSE;
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#define InvPCLK FALSE//int InvPCLK = FALSE;
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//#define MPLaneNum (MIPIRX_LANE_NUM - 1)//3//int MPLaneNum = 3; // 0: 1-lane, 1: 2-lane, 2: 3-lane, 3: 4-lane
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// int MPPCLKSel = AUTO;
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// #define EnMPx1PCLK FALSE//int EnMPx1PCLK = FALSE;//FALSE; // FALSE: 3/4(for 4 Lane) , 3/2(for 2 Lane) , 3(for 1 Lane) PCLK
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// TRUE : 1 (for 4 Lane) , 2 (for 2 Lane) , 4(for 1 Lane) PCLK
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//system misc control
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#if (IC_VERSION == 0xC0)
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#define PDREFCLK FALSE//int PDREFCLK = TRUE;
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#else
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#define PDREFCLK TRUE//int PDREFCLK = TRUE;
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#endif //#if (IC_VERSION == C0)
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#define PDREFCNT 0//int PDREFCNT = 0; //when PDREFCLK=TRUE, 0:div2, 1:div4, 2:div8, 3:divg16
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#define EnIntWakeU3 FALSE//int EnIntWakeU3 = FALSE;
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#define EnIOIDDQ FALSE//int EnIOIDDQ = FALSE;
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#define EnStb2Rst FALSE//int EnStb2Rst = FALSE;
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#define EnExtStdby FALSE//int EnExtStdby = FALSE;
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#define EnStandby FALSE//int EnStandby = FALSE;
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#define MPLaneSwap FALSE//int MPLaneSwap = FALSE;
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#define MPPNSwap FALSE//int MPPNSwap = FALSE; //TRUE: MTK , FALSE: Solomon
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// int ForceTxCLKStb = FALSE; //TRUE:define _hdmitx_jitter_
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//int DisMHSyncErr = FALSE;
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#define DisPHSyncErr FALSE//int DisPHSyncErr = FALSE;
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#define DisECCErr FALSE//int DisECCErr = FALSE;
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// PPI option
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#define EnContCK TRUE//int EnContCK = TRUE;
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#define HSSetNum 3//int HSSetNum = 3;
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#if (IC_VERSION == 0xC0)
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#define SkipStg 4//int SkipStg = 2;
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#else
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#define SkipStg 2//int SkipStg = 2;
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#endif //#if (IC_VERSION == 0xC0)
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#define EnDeSkew TRUE//int EnDeSkew = TRUE;
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#define PPIDbgSel 12//0//int PPIDbgSel= 0; //0~15
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#define RegIgnrNull 1//int RegIgnrNull = 1;
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#define RegIgnrBlk 1//int RegIgnrBlk = 1;
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#define RegEnDummyECC 0//int RegEnDummyECC = 0;
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// LM option
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#define EOTPSel 0//int EOTPSel = 0; //0~15
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// PPS option
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#define EnMBPM FALSE//FALSE//int EnMBPM = FALSE; // enable MIPI Bypass Mode
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#if (EnMBPM == TRUE)
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#define PREC_Update TRUE//int PREC_Update = FALSE; // enable P-timing update
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#define MREC_Update TRUE//int MREC_Update = FALSE; // enable M-timing update
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#define EnTBPM TRUE//int EnTBPM = FALSE; // enable HDMITX Bypass Mode
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#else
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#define PREC_Update FALSE//int PREC_Update = FALSE; // enable P-timing update
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#define MREC_Update FALSE//int MREC_Update = FALSE; // enable M-timing update
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#define EnTBPM FALSE//int EnTBPM = FALSE; // enable HDMITX Bypass Mode
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#endif //#if (EnMBPM == TRUE)
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#define REGSELDEF FALSE//int REGSELDEF = FALSE;
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#define EnMPExtPCLK FALSE//int EnMPExtPCLK = FALSE;
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#define MPForceStb FALSE//int MPForceStb = FALSE;
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#define EnHReSync FALSE//int EnHReSync = FALSE ; // default FALSE
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#define EnVReSync FALSE//int EnVReSync = FALSE; // default TRUE
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#define EnFReSync FALSE//int EnFReSync = FALSE;
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#define EnVREnh FALSE//int EnVREnh = FALSE; // default TRUE
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#define EnVREnhSel 1//int EnVREnhSel = 1; // 0:Div2, 1:Div4, 2:Div8, 3:Div16, 4:Div32
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#define EnMAvg TRUE//int EnMAvg = TRUE;
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#if (IC_VERSION == 0xC0)
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#define MShift 4//int MShift = 5; // default: 0 //fmt2 fmt4 :4
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#define PPSFFRdStg 0x04//int PPSFFRdStg = 0x10; //PPSFFRdStg(2:0)
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#define RegAutoSync TRUE//int RegAutoSync = TRUE;//add sync falling //pet:D0 20200211
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#else
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#define MShift 5//int MShift = 5; // default: 0 //fmt2 fmt4 :4
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#define PPSFFRdStg 0x10//int PPSFFRdStg = 0x10; //PPSFFRdStg(2:0)
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#endif //#if (IC_VERSION == 0xC0)
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#define PShift 3//int PShift = 3; // default: 3
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#define EnFFAutoRst TRUE//int EnFFAutoRst = TRUE;
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#define RegEnSyncErr FALSE//int RegEnSyncErr = FALSE;
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#define EnTxCRC TRUE//int EnTxCRC = TRUE;
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#define TxCRCnum (0x20) //D0 20200211//(0x00)//TxCRCnum(6:0)//int TxCRCnum = 0x00; //TxCRCnum(6:0)
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//////////////////////////////////////////////////////////////////////
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void DumpMIPIRXReg(void);
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void MIPIRX_DevLoopProc(void);
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void set_ppara(void);
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#endif // _MIPIRX_H_
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