/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "common_baco.h"
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static bool baco_wait_register(struct pp_hwmgr *hwmgr, u32 reg, u32 mask, u32 value)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
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u32 timeout = 5000, data;
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do {
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msleep(1);
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data = RREG32(reg);
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timeout--;
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} while (value != (data & mask) && (timeout != 0));
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if (timeout == 0)
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return false;
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return true;
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}
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static bool baco_cmd_handler(struct pp_hwmgr *hwmgr, u32 command, u32 reg, u32 mask,
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u32 shift, u32 value, u32 timeout)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
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u32 data;
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bool ret = true;
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switch (command) {
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case CMD_WRITE:
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WREG32(reg, value << shift);
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break;
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case CMD_READMODIFYWRITE:
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data = RREG32(reg);
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data = (data & (~mask)) | (value << shift);
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WREG32(reg, data);
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break;
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case CMD_WAITFOR:
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ret = baco_wait_register(hwmgr, reg, mask, value);
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break;
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case CMD_DELAY_MS:
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if (timeout)
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/* Delay in milli Seconds */
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msleep(timeout);
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break;
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case CMD_DELAY_US:
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if (timeout)
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/* Delay in micro Seconds */
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udelay(timeout);
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break;
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default:
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dev_warn(adev->dev, "Invalid BACO command.\n");
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ret = false;
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}
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return ret;
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}
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bool baco_program_registers(struct pp_hwmgr *hwmgr,
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const struct baco_cmd_entry *entry,
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const u32 array_size)
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{
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u32 i, reg = 0;
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for (i = 0; i < array_size; i++) {
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if ((entry[i].cmd == CMD_WRITE) ||
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(entry[i].cmd == CMD_READMODIFYWRITE) ||
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(entry[i].cmd == CMD_WAITFOR))
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reg = entry[i].reg_offset;
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if (!baco_cmd_handler(hwmgr, entry[i].cmd, reg, entry[i].mask,
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entry[i].shift, entry[i].val, entry[i].timeout))
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return false;
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}
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return true;
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}
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bool soc15_baco_program_registers(struct pp_hwmgr *hwmgr,
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const struct soc15_baco_cmd_entry *entry,
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const u32 array_size)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
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u32 i, reg = 0;
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for (i = 0; i < array_size; i++) {
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if ((entry[i].cmd == CMD_WRITE) ||
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(entry[i].cmd == CMD_READMODIFYWRITE) ||
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(entry[i].cmd == CMD_WAITFOR))
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reg = adev->reg_offset[entry[i].hwip][entry[i].inst][entry[i].seg]
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+ entry[i].reg_offset;
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if (!baco_cmd_handler(hwmgr, entry[i].cmd, reg, entry[i].mask,
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entry[i].shift, entry[i].val, entry[i].timeout))
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return false;
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}
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return true;
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}
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