/*
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*
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* Copyright (C) 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
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* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef GFX_6_0_D_H
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#define GFX_6_0_D_H
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#define ixCLIPPER_DEBUG_REG00 0x0000
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#define ixCLIPPER_DEBUG_REG01 0x0001
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#define ixCLIPPER_DEBUG_REG02 0x0002
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#define ixCLIPPER_DEBUG_REG03 0x0003
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#define ixCLIPPER_DEBUG_REG04 0x0004
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#define ixCLIPPER_DEBUG_REG05 0x0005
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#define ixCLIPPER_DEBUG_REG06 0x0006
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#define ixCLIPPER_DEBUG_REG07 0x0007
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#define ixCLIPPER_DEBUG_REG08 0x0008
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#define ixCLIPPER_DEBUG_REG09 0x0009
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#define ixCLIPPER_DEBUG_REG10 0x000A
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#define ixCLIPPER_DEBUG_REG11 0x000B
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#define ixCLIPPER_DEBUG_REG12 0x000C
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#define ixCLIPPER_DEBUG_REG13 0x000D
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#define ixCLIPPER_DEBUG_REG14 0x000E
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#define ixCLIPPER_DEBUG_REG15 0x000F
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#define ixCLIPPER_DEBUG_REG16 0x0010
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#define ixCLIPPER_DEBUG_REG17 0x0011
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#define ixCLIPPER_DEBUG_REG18 0x0012
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#define ixCLIPPER_DEBUG_REG19 0x0013
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#define ixGDS_DEBUG_REG0 0x0000
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#define ixGDS_DEBUG_REG1 0x0001
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#define ixGDS_DEBUG_REG2 0x0002
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#define ixGDS_DEBUG_REG3 0x0003
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#define ixGDS_DEBUG_REG4 0x0004
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#define ixGDS_DEBUG_REG5 0x0005
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#define ixGDS_DEBUG_REG6 0x0006
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#define ixIA_DEBUG_REG0 0x0000
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#define ixIA_DEBUG_REG1 0x0001
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#define ixIA_DEBUG_REG2 0x0002
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#define ixIA_DEBUG_REG3 0x0003
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#define ixIA_DEBUG_REG4 0x0004
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#define ixIA_DEBUG_REG5 0x0005
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#define ixIA_DEBUG_REG6 0x0006
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#define ixIA_DEBUG_REG7 0x0007
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#define ixIA_DEBUG_REG8 0x0008
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#define ixIA_DEBUG_REG9 0x0009
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#define ixPA_SC_DEBUG_REG0 0x0000
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#define ixPA_SC_DEBUG_REG1 0x0001
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#define ixSETUP_DEBUG_REG0 0x0018
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#define ixSETUP_DEBUG_REG1 0x0019
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#define ixSETUP_DEBUG_REG2 0x001A
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#define ixSETUP_DEBUG_REG3 0x001B
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#define ixSETUP_DEBUG_REG4 0x001C
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#define ixSETUP_DEBUG_REG5 0x001D
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#define ixSQ_DEBUG_CTRL_LOCAL 0x0009
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#define ixSQ_DEBUG_STS_LOCAL 0x0008
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#define ixSQ_INTERRUPT_WORD_AUTO 0x20C0
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#define ixSQ_INTERRUPT_WORD_CMN 0x20C0
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#define ixSQ_INTERRUPT_WORD_WAVE 0x20C0
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#define ixSQ_WAVE_EXEC_HI 0x027F
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#define ixSQ_WAVE_EXEC_LO 0x027E
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#define ixSQ_WAVE_GPR_ALLOC 0x0015
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#define ixSQ_WAVE_HW_ID 0x0014
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#define ixSQ_WAVE_IB_DBG0 0x001C
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#define ixSQ_WAVE_IB_STS 0x0017
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#define ixSQ_WAVE_INST_DW0 0x001A
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#define ixSQ_WAVE_INST_DW1 0x001B
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#define ixSQ_WAVE_LDS_ALLOC 0x0016
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#define ixSQ_WAVE_M0 0x027C
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#define ixSQ_WAVE_MODE 0x0011
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#define ixSQ_WAVE_PC_HI 0x0019
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#define ixSQ_WAVE_PC_LO 0x0018
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#define ixSQ_WAVE_STATUS 0x0012
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#define ixSQ_WAVE_TBA_HI 0x026D
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#define ixSQ_WAVE_TBA_LO 0x026C
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#define ixSQ_WAVE_TMA_HI 0x026F
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#define ixSQ_WAVE_TMA_LO 0x026E
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#define ixSQ_WAVE_TRAPSTS 0x0013
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#define ixSQ_WAVE_TTMP0 0x0270
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#define ixSQ_WAVE_TTMP10 0x027A
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#define ixSQ_WAVE_TTMP1 0x0271
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#define ixSQ_WAVE_TTMP11 0x027B
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#define ixSQ_WAVE_TTMP2 0x0272
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#define ixSQ_WAVE_TTMP3 0x0273
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#define ixSQ_WAVE_TTMP4 0x0274
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#define ixSQ_WAVE_TTMP5 0x0275
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#define ixSQ_WAVE_TTMP6 0x0276
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#define ixSQ_WAVE_TTMP7 0x0277
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#define ixSQ_WAVE_TTMP8 0x0278
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#define ixSQ_WAVE_TTMP9 0x0279
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#define ixSXIFCCG_DEBUG_REG0 0x0014
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#define ixSXIFCCG_DEBUG_REG1 0x0015
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#define ixSXIFCCG_DEBUG_REG2 0x0016
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#define ixSXIFCCG_DEBUG_REG3 0x0017
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#define ixVGT_DEBUG_REG0 0x0000
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#define ixVGT_DEBUG_REG10 0x000A
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#define ixVGT_DEBUG_REG1 0x0001
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#define ixVGT_DEBUG_REG11 0x000B
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#define ixVGT_DEBUG_REG12 0x000C
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#define ixVGT_DEBUG_REG13 0x000D
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#define ixVGT_DEBUG_REG14 0x000E
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#define ixVGT_DEBUG_REG15 0x000F
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#define ixVGT_DEBUG_REG16 0x0010
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#define ixVGT_DEBUG_REG17 0x0011
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#define ixVGT_DEBUG_REG18 0x0012
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#define ixVGT_DEBUG_REG19 0x0013
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#define ixVGT_DEBUG_REG20 0x0014
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#define ixVGT_DEBUG_REG2 0x0002
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#define ixVGT_DEBUG_REG21 0x0015
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#define ixVGT_DEBUG_REG22 0x0016
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#define ixVGT_DEBUG_REG23 0x0017
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#define ixVGT_DEBUG_REG24 0x0018
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#define ixVGT_DEBUG_REG25 0x0019
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#define ixVGT_DEBUG_REG26 0x001A
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#define ixVGT_DEBUG_REG27 0x001B
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#define ixVGT_DEBUG_REG28 0x001C
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#define ixVGT_DEBUG_REG29 0x001D
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#define ixVGT_DEBUG_REG30 0x001E
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#define ixVGT_DEBUG_REG3 0x0003
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#define ixVGT_DEBUG_REG31 0x001F
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#define ixVGT_DEBUG_REG32 0x0020
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#define ixVGT_DEBUG_REG33 0x0021
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#define ixVGT_DEBUG_REG34 0x0022
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#define ixVGT_DEBUG_REG35 0x0023
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#define ixVGT_DEBUG_REG36 0x0024
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#define ixVGT_DEBUG_REG4 0x0004
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#define ixVGT_DEBUG_REG5 0x0005
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#define ixVGT_DEBUG_REG6 0x0006
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#define ixVGT_DEBUG_REG7 0x0007
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#define ixVGT_DEBUG_REG8 0x0008
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#define ixVGT_DEBUG_REG9 0x0009
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#define mmBCI_DEBUG_READ 0x24E3
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#define mmCB_BLEND0_CONTROL 0xA1E0
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#define mmCB_BLEND1_CONTROL 0xA1E1
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#define mmCB_BLEND2_CONTROL 0xA1E2
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#define mmCB_BLEND3_CONTROL 0xA1E3
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#define mmCB_BLEND4_CONTROL 0xA1E4
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#define mmCB_BLEND5_CONTROL 0xA1E5
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#define mmCB_BLEND6_CONTROL 0xA1E6
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#define mmCB_BLEND7_CONTROL 0xA1E7
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#define mmCB_BLEND_ALPHA 0xA108
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#define mmCB_BLEND_BLUE 0xA107
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#define mmCB_BLEND_GREEN 0xA106
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#define mmCB_BLEND_RED 0xA105
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#define mmCB_CGTT_SCLK_CTRL 0x2698
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#define mmCB_COLOR0_ATTRIB 0xA31D
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#define mmCB_COLOR0_BASE 0xA318
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#define mmCB_COLOR0_CLEAR_WORD0 0xA323
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#define mmCB_COLOR0_CLEAR_WORD1 0xA324
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#define mmCB_COLOR0_CMASK 0xA31F
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#define mmCB_COLOR0_CMASK_SLICE 0xA320
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#define mmCB_COLOR0_FMASK 0xA321
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#define mmCB_COLOR0_FMASK_SLICE 0xA322
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#define mmCB_COLOR0_INFO 0xA31C
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#define mmCB_COLOR0_PITCH 0xA319
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#define mmCB_COLOR0_SLICE 0xA31A
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#define mmCB_COLOR0_VIEW 0xA31B
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#define mmCB_COLOR1_ATTRIB 0xA32C
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#define mmCB_COLOR1_BASE 0xA327
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#define mmCB_COLOR1_CLEAR_WORD0 0xA332
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#define mmCB_COLOR1_CLEAR_WORD1 0xA333
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#define mmCB_COLOR1_CMASK 0xA32E
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#define mmCB_COLOR1_CMASK_SLICE 0xA32F
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#define mmCB_COLOR1_FMASK 0xA330
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#define mmCB_COLOR1_FMASK_SLICE 0xA331
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#define mmCB_COLOR1_INFO 0xA32B
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#define mmCB_COLOR1_PITCH 0xA328
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#define mmCB_COLOR1_SLICE 0xA329
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#define mmCB_COLOR1_VIEW 0xA32A
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#define mmCB_COLOR2_ATTRIB 0xA33B
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#define mmCB_COLOR2_BASE 0xA336
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#define mmCB_COLOR2_CLEAR_WORD0 0xA341
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#define mmCB_COLOR2_CLEAR_WORD1 0xA342
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#define mmCB_COLOR2_CMASK 0xA33D
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#define mmCB_COLOR2_CMASK_SLICE 0xA33E
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#define mmCB_COLOR2_FMASK 0xA33F
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#define mmCB_COLOR2_FMASK_SLICE 0xA340
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#define mmCB_COLOR2_INFO 0xA33A
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#define mmCB_COLOR2_PITCH 0xA337
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#define mmCB_COLOR2_SLICE 0xA338
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#define mmCB_COLOR2_VIEW 0xA339
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#define mmCB_COLOR3_ATTRIB 0xA34A
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#define mmCB_COLOR3_BASE 0xA345
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#define mmCB_COLOR3_CLEAR_WORD0 0xA350
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#define mmCB_COLOR3_CLEAR_WORD1 0xA351
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#define mmCB_COLOR3_CMASK 0xA34C
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#define mmCB_COLOR3_CMASK_SLICE 0xA34D
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#define mmCB_COLOR3_FMASK 0xA34E
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#define mmCB_COLOR3_FMASK_SLICE 0xA34F
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#define mmCB_COLOR3_INFO 0xA349
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#define mmCB_COLOR3_PITCH 0xA346
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#define mmCB_COLOR3_SLICE 0xA347
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#define mmCB_COLOR3_VIEW 0xA348
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#define mmCB_COLOR4_ATTRIB 0xA359
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#define mmCB_COLOR4_BASE 0xA354
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#define mmCB_COLOR4_CLEAR_WORD0 0xA35F
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#define mmCB_COLOR4_CLEAR_WORD1 0xA360
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#define mmCB_COLOR4_CMASK 0xA35B
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#define mmCB_COLOR4_CMASK_SLICE 0xA35C
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#define mmCB_COLOR4_FMASK 0xA35D
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#define mmCB_COLOR4_FMASK_SLICE 0xA35E
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#define mmCB_COLOR4_INFO 0xA358
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#define mmCB_COLOR4_PITCH 0xA355
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#define mmCB_COLOR4_SLICE 0xA356
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#define mmCB_COLOR4_VIEW 0xA357
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#define mmCB_COLOR5_ATTRIB 0xA368
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#define mmCB_COLOR5_BASE 0xA363
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#define mmCB_COLOR5_CLEAR_WORD0 0xA36E
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#define mmCB_COLOR5_CLEAR_WORD1 0xA36F
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#define mmCB_COLOR5_CMASK 0xA36A
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#define mmCB_COLOR5_CMASK_SLICE 0xA36B
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#define mmCB_COLOR5_FMASK 0xA36C
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#define mmCB_COLOR5_FMASK_SLICE 0xA36D
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#define mmCB_COLOR5_INFO 0xA367
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#define mmCB_COLOR5_PITCH 0xA364
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#define mmCB_COLOR5_SLICE 0xA365
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#define mmCB_COLOR5_VIEW 0xA366
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#define mmCB_COLOR6_ATTRIB 0xA377
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#define mmCB_COLOR6_BASE 0xA372
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#define mmCB_COLOR6_CLEAR_WORD0 0xA37D
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#define mmCB_COLOR6_CLEAR_WORD1 0xA37E
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#define mmCB_COLOR6_CMASK 0xA379
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#define mmCB_COLOR6_CMASK_SLICE 0xA37A
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#define mmCB_COLOR6_FMASK 0xA37B
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#define mmCB_COLOR6_FMASK_SLICE 0xA37C
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#define mmCB_COLOR6_INFO 0xA376
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#define mmCB_COLOR6_PITCH 0xA373
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#define mmCB_COLOR6_SLICE 0xA374
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#define mmCB_COLOR6_VIEW 0xA375
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#define mmCB_COLOR7_ATTRIB 0xA386
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#define mmCB_COLOR7_BASE 0xA381
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#define mmCB_COLOR7_CLEAR_WORD0 0xA38C
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#define mmCB_COLOR7_CLEAR_WORD1 0xA38D
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#define mmCB_COLOR7_CMASK 0xA388
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#define mmCB_COLOR7_CMASK_SLICE 0xA389
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#define mmCB_COLOR7_FMASK 0xA38A
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#define mmCB_COLOR7_FMASK_SLICE 0xA38B
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#define mmCB_COLOR7_INFO 0xA385
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#define mmCB_COLOR7_PITCH 0xA382
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#define mmCB_COLOR7_SLICE 0xA383
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#define mmCB_COLOR7_VIEW 0xA384
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#define mmCB_COLOR_CONTROL 0xA202
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#define mmCB_DEBUG_BUS_10 0x26A2
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#define mmCB_DEBUG_BUS_1 0x2699
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#define mmCB_DEBUG_BUS_11 0x26A3
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#define mmCB_DEBUG_BUS_12 0x26A4
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#define mmCB_DEBUG_BUS_13 0x26A5
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#define mmCB_DEBUG_BUS_14 0x26A6
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#define mmCB_DEBUG_BUS_15 0x26A7
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#define mmCB_DEBUG_BUS_16 0x26A8
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#define mmCB_DEBUG_BUS_17 0x26A9
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#define mmCB_DEBUG_BUS_18 0x26AA
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#define mmCB_DEBUG_BUS_2 0x269A
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#define mmCB_DEBUG_BUS_3 0x269B
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#define mmCB_DEBUG_BUS_4 0x269C
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#define mmCB_DEBUG_BUS_5 0x269D
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#define mmCB_DEBUG_BUS_6 0x269E
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#define mmCB_DEBUG_BUS_7 0x269F
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#define mmCB_DEBUG_BUS_8 0x26A0
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#define mmCB_DEBUG_BUS_9 0x26A1
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#define mmCB_HW_CONTROL 0x2684
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#define mmCB_HW_CONTROL_1 0x2685
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#define mmCB_HW_CONTROL_2 0x2686
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#define mmCB_PERFCOUNTER0_HI 0x2691
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#define mmCB_PERFCOUNTER0_LO 0x2690
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#define mmCB_PERFCOUNTER0_SELECT1 0x2689
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#define mmCB_PERFCOUNTER1_HI 0x2693
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#define mmCB_PERFCOUNTER1_LO 0x2692
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#define mmCB_PERFCOUNTER2_HI 0x2695
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#define mmCB_PERFCOUNTER2_LO 0x2694
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#define mmCB_PERFCOUNTER3_HI 0x2697
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#define mmCB_PERFCOUNTER3_LO 0x2696
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#define mmCB_SHADER_MASK 0xA08F
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#define mmCB_TARGET_MASK 0xA08E
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#define mmCC_GC_SHADER_ARRAY_CONFIG 0x226F
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#define mmCC_RB_BACKEND_DISABLE 0x263D
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#define mmCC_RB_DAISY_CHAIN 0x2641
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#define mmCC_RB_REDUNDANCY 0x263C
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#define mmCC_SQC_BANK_DISABLE 0x2307
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#define mmCGTS_RD_CTRL_REG 0x2455
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#define mmCGTS_RD_REG 0x2456
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#define mmCGTS_SM_CTRL_REG 0x2454
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#define mmCGTS_TCC_DISABLE 0x2452
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#define mmCGTS_USER_TCC_DISABLE 0x2453
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#define mmCGTT_BCI_CLK_CTRL 0x24A9
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#define mmCGTT_CP_CLK_CTRL 0x3059
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#define mmCGTT_GDS_CLK_CTRL 0x25DD
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#define mmCGTT_IA_CLK_CTRL 0x2261
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#define mmCGTT_PA_CLK_CTRL 0x2286
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#define mmCGTT_PC_CLK_CTRL 0x24A8
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#define mmCGTT_RLC_CLK_CTRL 0x30E0
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#define mmCGTT_SC_CLK_CTRL 0x22CA
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#define mmCGTT_SPI_CLK_CTRL 0x2451
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#define mmCGTT_SQ_CLK_CTRL 0x2362
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#define mmCGTT_SQG_CLK_CTRL 0x2363
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#define mmCGTT_SX_CLK_CTRL0 0x240C
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#define mmCGTT_SX_CLK_CTRL1 0x240D
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#define mmCGTT_SX_CLK_CTRL2 0x240E
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#define mmCGTT_SX_CLK_CTRL3 0x240F
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#define mmCGTT_SX_CLK_CTRL4 0x2410
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#define mmCGTT_TCI_CLK_CTRL 0x2B60
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#define mmCGTT_TCP_CLK_CTRL 0x2B15
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#define mmCGTT_VGT_CLK_CTRL 0x225F
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#define mmCOHER_DEST_BASE_0 0xA092
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#define mmCOHER_DEST_BASE_1 0xA093
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#define mmCOHER_DEST_BASE_2 0xA07E
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#define mmCOHER_DEST_BASE_3 0xA07F
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#define mmCOMPUTE_DIM_X 0x2E01
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#define mmCOMPUTE_DIM_Y 0x2E02
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#define mmCOMPUTE_DIM_Z 0x2E03
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#define mmCOMPUTE_DISPATCH_INITIATOR 0x2E00
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#define mmCOMPUTE_NUM_THREAD_X 0x2E07
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#define mmCOMPUTE_NUM_THREAD_Y 0x2E08
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#define mmCOMPUTE_NUM_THREAD_Z 0x2E09
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#define mmCOMPUTE_PGM_HI 0x2E0D
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#define mmCOMPUTE_PGM_LO 0x2E0C
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#define mmCOMPUTE_PGM_RSRC1 0x2E12
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#define mmCOMPUTE_PGM_RSRC2 0x2E13
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#define mmCOMPUTE_RESOURCE_LIMITS 0x2E15
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#define mmCOMPUTE_START_X 0x2E04
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#define mmCOMPUTE_START_Y 0x2E05
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#define mmCOMPUTE_START_Z 0x2E06
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#define mmCOMPUTE_STATIC_THREAD_MGMT_SE0 0x2E16
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#define mmCOMPUTE_STATIC_THREAD_MGMT_SE1 0x2E17
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#define mmCOMPUTE_TBA_HI 0x2E0F
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#define mmCOMPUTE_TBA_LO 0x2E0E
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#define mmCOMPUTE_TMA_HI 0x2E11
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#define mmCOMPUTE_TMA_LO 0x2E10
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#define mmCOMPUTE_TMPRING_SIZE 0x2E18
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#define mmCOMPUTE_USER_DATA_0 0x2E40
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#define mmCOMPUTE_USER_DATA_10 0x2E4A
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#define mmCOMPUTE_USER_DATA_1 0x2E41
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#define mmCOMPUTE_USER_DATA_11 0x2E4B
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#define mmCOMPUTE_USER_DATA_12 0x2E4C
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#define mmCOMPUTE_USER_DATA_13 0x2E4D
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#define mmCOMPUTE_USER_DATA_14 0x2E4E
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#define mmCOMPUTE_USER_DATA_15 0x2E4F
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#define mmCOMPUTE_USER_DATA_2 0x2E42
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#define mmCOMPUTE_USER_DATA_3 0x2E43
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#define mmCOMPUTE_USER_DATA_4 0x2E44
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#define mmCOMPUTE_USER_DATA_5 0x2E45
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#define mmCOMPUTE_USER_DATA_6 0x2E46
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#define mmCOMPUTE_USER_DATA_7 0x2E47
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#define mmCOMPUTE_USER_DATA_8 0x2E48
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#define mmCOMPUTE_USER_DATA_9 0x2E49
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#define mmCOMPUTE_VMID 0x2E14
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#define mmCP_APPEND_ADDR_HI 0x2159
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#define mmCP_APPEND_ADDR_LO 0x2158
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#define mmCP_APPEND_DATA 0x215A
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#define mmCP_APPEND_LAST_CS_FENCE 0x215B
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#define mmCP_APPEND_LAST_PS_FENCE 0x215C
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#define mmCP_ATOMIC_PREOP_HI 0x215E
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#define mmCP_ATOMIC_PREOP_LO 0x215D
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#define mmCP_BUSY_STAT 0x219F
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#define mmCP_CE_HEADER_DUMP 0x21A4
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#define mmCP_CE_IB1_BASE_HI 0x21C7
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#define mmCP_CE_IB1_BASE_LO 0x21C6
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#define mmCP_CE_IB1_BUFSZ 0x21C8
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#define mmCP_CE_IB2_BASE_HI 0x21CA
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#define mmCP_CE_IB2_BASE_LO 0x21C9
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#define mmCP_CE_IB2_BUFSZ 0x21CB
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#define mmCP_CE_INIT_BASE_HI 0x21C4
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#define mmCP_CE_INIT_BASE_LO 0x21C3
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#define mmCP_CE_INIT_BUFSZ 0x21C5
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#define mmCP_CEQ1_AVAIL 0x21E6
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#define mmCP_CEQ2_AVAIL 0x21E7
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#define mmCP_CE_ROQ_IB1_STAT 0x21E9
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#define mmCP_CE_ROQ_IB2_STAT 0x21EA
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#define mmCP_CE_ROQ_RB_STAT 0x21E8
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#define mmCP_CE_UCODE_ADDR 0x305A
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#define mmCP_CE_UCODE_DATA 0x305B
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#define mmCP_CMD_DATA 0x21DF
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#define mmCP_CMD_INDEX 0x21DE
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#define mmCP_CNTX_STAT 0x21B8
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#define mmCP_COHER_BASE 0x217E
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#define mmCP_COHER_CNTL 0x217C
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#define mmCP_COHER_SIZE 0x217D
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#define mmCP_COHER_START_DELAY 0x217B
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#define mmCP_COHER_STATUS 0x217F
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#define mmCP_CSF_CNTL 0x21B5
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#define mmCP_CSF_STAT 0x21B4
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#define mmCP_DMA_CNTL 0x218A
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#define mmCP_DMA_ME_COMMAND 0x2184
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#define mmCP_DMA_ME_DST_ADDR 0x2182
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#define mmCP_DMA_ME_DST_ADDR_HI 0x2183
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#define mmCP_DMA_ME_SRC_ADDR 0x2180
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#define mmCP_DMA_ME_SRC_ADDR_HI 0x2181
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#define mmCP_DMA_PFP_COMMAND 0x2189
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#define mmCP_DMA_PFP_DST_ADDR 0x2187
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#define mmCP_DMA_PFP_DST_ADDR_HI 0x2188
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#define mmCP_DMA_PFP_SRC_ADDR 0x2185
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#define mmCP_DMA_PFP_SRC_ADDR_HI 0x2186
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#define mmCP_DMA_READ_TAGS 0x218B
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#define mmCP_ECC_FIRSTOCCURRENCE 0x307A
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#define mmCP_ECC_FIRSTOCCURRENCE_RING0 0x307B
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#define mmCP_ECC_FIRSTOCCURRENCE_RING1 0x307C
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#define mmCP_ECC_FIRSTOCCURRENCE_RING2 0x307D
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#define mmCP_EOP_DONE_ADDR_HI 0x2101
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#define mmCP_EOP_DONE_ADDR_LO 0x2100
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#define mmCP_EOP_DONE_DATA_HI 0x2103
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#define mmCP_EOP_DONE_DATA_LO 0x2102
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#define mmCP_EOP_LAST_FENCE_HI 0x2105
|
#define mmCP_EOP_LAST_FENCE_LO 0x2104
|
#define mmCP_GDS_ATOMIC0_PREOP_HI 0x2160
|
#define mmCP_GDS_ATOMIC0_PREOP_LO 0x215F
|
#define mmCP_GDS_ATOMIC1_PREOP_HI 0x2162
|
#define mmCP_GDS_ATOMIC1_PREOP_LO 0x2161
|
#define mmCP_GRBM_FREE_COUNT 0x21A3
|
#define mmCP_IB1_BASE_HI 0x21CD
|
#define mmCP_IB1_BASE_LO 0x21CC
|
#define mmCP_IB1_BUFSZ 0x21CE
|
#define mmCP_IB1_OFFSET 0x2192
|
#define mmCP_IB1_PREAMBLE_BEGIN 0x2194
|
#define mmCP_IB1_PREAMBLE_END 0x2195
|
#define mmCP_IB2_BASE_HI 0x21D0
|
#define mmCP_IB2_BASE_LO 0x21CF
|
#define mmCP_IB2_BUFSZ 0x21D1
|
#define mmCP_IB2_OFFSET 0x2193
|
#define mmCP_IB2_PREAMBLE_BEGIN 0x2196
|
#define mmCP_IB2_PREAMBLE_END 0x2197
|
#define mmCP_INT_CNTL 0x3049
|
#define mmCP_INT_CNTL_RING0 0x306A
|
#define mmCP_INT_CNTL_RING1 0x306B
|
#define mmCP_INT_CNTL_RING2 0x306C
|
#define mmCP_INT_STAT_DEBUG 0x21F7
|
#define mmCP_INT_STATUS 0x304A
|
#define mmCP_INT_STATUS_RING0 0x306D
|
#define mmCP_INT_STATUS_RING1 0x306E
|
#define mmCP_INT_STATUS_RING2 0x306F
|
#define mmCP_MC_PACK_DELAY_CNT 0x21A7
|
#define mmCP_ME_CNTL 0x21B6
|
#define mmCP_ME_HEADER_DUMP 0x21A1
|
#define mmCP_ME_MC_RADDR_HI 0x216E
|
#define mmCP_ME_MC_RADDR_LO 0x216D
|
#define mmCP_ME_MC_WADDR_HI 0x216A
|
#define mmCP_ME_MC_WADDR_LO 0x2169
|
#define mmCP_ME_MC_WDATA_HI 0x216C
|
#define mmCP_ME_MC_WDATA_LO 0x216B
|
#define mmCP_MEM_SLP_CNTL 0x3079
|
#define mmCP_ME_PREEMPTION 0x21B9
|
#define mmCP_MEQ_AVAIL 0x21DD
|
#define mmCP_MEQ_STAT 0x21E5
|
#define mmCP_MEQ_THRESHOLDS 0x21D9
|
#define mmCP_ME_RAM_DATA 0x3058
|
#define mmCP_ME_RAM_RADDR 0x3056
|
#define mmCP_ME_RAM_WADDR 0x3057
|
#define mmCP_NUM_PRIM_NEEDED_COUNT0_HI 0x210B
|
#define mmCP_NUM_PRIM_NEEDED_COUNT0_LO 0x210A
|
#define mmCP_NUM_PRIM_NEEDED_COUNT1_HI 0x210F
|
#define mmCP_NUM_PRIM_NEEDED_COUNT1_LO 0x210E
|
#define mmCP_NUM_PRIM_NEEDED_COUNT2_HI 0x2113
|
#define mmCP_NUM_PRIM_NEEDED_COUNT2_LO 0x2112
|
#define mmCP_NUM_PRIM_NEEDED_COUNT3_HI 0x2117
|
#define mmCP_NUM_PRIM_NEEDED_COUNT3_LO 0x2116
|
#define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI 0x2109
|
#define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO 0x2108
|
#define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI 0x210D
|
#define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO 0x210C
|
#define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI 0x2111
|
#define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO 0x2110
|
#define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI 0x2115
|
#define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO 0x2114
|
#define mmCP_PA_CINVOC_COUNT_HI 0x2129
|
#define mmCP_PA_CINVOC_COUNT_LO 0x2128
|
#define mmCP_PA_CPRIM_COUNT_HI 0x212B
|
#define mmCP_PA_CPRIM_COUNT_LO 0x212A
|
#define mmCP_PERFMON_CNTL 0x21FF
|
#define mmCP_PERFMON_CNTX_CNTL 0xA0D8
|
#define mmCP_PFP_HEADER_DUMP 0x21A2
|
#define mmCP_PFP_IB_CONTROL 0x218D
|
#define mmCP_PFP_LOAD_CONTROL 0x218E
|
#define mmCP_PFP_UCODE_ADDR 0x3054
|
#define mmCP_PFP_UCODE_DATA 0x3055
|
#define mmCP_PIPE_STATS_ADDR_HI 0x2119
|
#define mmCP_PIPE_STATS_ADDR_LO 0x2118
|
#define mmCP_PWR_CNTL 0x3078
|
#define mmCP_QUEUE_THRESHOLDS 0x21D8
|
#define mmCP_RB0_BASE 0x3040
|
#define mmCP_RB0_CNTL 0x3041
|
#define mmCP_RB0_RPTR 0x21C0
|
#define mmCP_RB0_RPTR_ADDR 0x3043
|
#define mmCP_RB0_RPTR_ADDR_HI 0x3044
|
#define mmCP_RB0_WPTR 0x3045
|
#define mmCP_RB1_BASE 0x3060
|
#define mmCP_RB1_CNTL 0x3061
|
#define mmCP_RB1_RPTR 0x21BF
|
#define mmCP_RB1_RPTR_ADDR 0x3062
|
#define mmCP_RB1_RPTR_ADDR_HI 0x3063
|
#define mmCP_RB1_WPTR 0x3064
|
#define mmCP_RB2_BASE 0x3065
|
#define mmCP_RB2_CNTL 0x3066
|
#define mmCP_RB2_RPTR 0x21BE
|
#define mmCP_RB2_RPTR_ADDR 0x3067
|
#define mmCP_RB2_RPTR_ADDR_HI 0x3068
|
#define mmCP_RB2_WPTR 0x3069
|
#define mmCP_RB_BASE 0x3040
|
#define mmCP_RB_CNTL 0x3041
|
#define mmCP_RB_OFFSET 0x2191
|
#define mmCP_RB_RPTR 0x21C0
|
#define mmCP_RB_RPTR_ADDR 0x3043
|
#define mmCP_RB_RPTR_ADDR_HI 0x3044
|
#define mmCP_RB_RPTR_WR 0x3042
|
#define mmCP_RB_VMID 0x3051
|
#define mmCP_RB_WPTR 0x3045
|
#define mmCP_RB_WPTR_DELAY 0x21C1
|
#define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047
|
#define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046
|
#define mmCP_RB_WPTR_POLL_CNTL 0x21C2
|
#define mmCP_RING0_PRIORITY 0x304D
|
#define mmCP_RING1_PRIORITY 0x304E
|
#define mmCP_RING2_PRIORITY 0x304F
|
#define mmCP_RINGID 0xA0D9
|
#define mmCP_RING_PRIORITY_CNTS 0x304C
|
#define mmCP_ROQ1_THRESHOLDS 0x21D5
|
#define mmCP_ROQ2_AVAIL 0x21DC
|
#define mmCP_ROQ2_THRESHOLDS 0x21D6
|
#define mmCP_ROQ_AVAIL 0x21DA
|
#define mmCP_ROQ_IB1_STAT 0x21E1
|
#define mmCP_ROQ_IB2_STAT 0x21E2
|
#define mmCP_ROQ_RB_STAT 0x21E0
|
#define mmCP_SC_PSINVOC_COUNT0_HI 0x212D
|
#define mmCP_SC_PSINVOC_COUNT0_LO 0x212C
|
#define mmCP_SC_PSINVOC_COUNT1_HI 0x212F
|
#define mmCP_SC_PSINVOC_COUNT1_LO 0x212E
|
#define mmCP_SCRATCH_DATA 0x2190
|
#define mmCP_SCRATCH_INDEX 0x218F
|
#define mmCP_SEM_INCOMPLETE_TIMER_CNTL 0x2172
|
#define mmCP_SEM_WAIT_TIMER 0x216F
|
#define mmCP_SIG_SEM_ADDR_HI 0x2171
|
#define mmCP_SIG_SEM_ADDR_LO 0x2170
|
#define mmCP_STALLED_STAT1 0x219D
|
#define mmCP_STALLED_STAT2 0x219E
|
#define mmCP_STALLED_STAT3 0x219C
|
#define mmCP_STAT 0x21A0
|
#define mmCP_ST_BASE_HI 0x21D3
|
#define mmCP_ST_BASE_LO 0x21D2
|
#define mmCP_ST_BUFSZ 0x21D4
|
#define mmCP_STQ_AVAIL 0x21DB
|
#define mmCP_STQ_STAT 0x21E3
|
#define mmCP_STQ_THRESHOLDS 0x21D7
|
#define mmCP_STREAM_OUT_ADDR_HI 0x2107
|
#define mmCP_STREAM_OUT_ADDR_LO 0x2106
|
#define mmCP_STRMOUT_CNTL 0x213F
|
#define mmCP_VGT_CSINVOC_COUNT_HI 0x2131
|
#define mmCP_VGT_CSINVOC_COUNT_LO 0x2130
|
#define mmCP_VGT_DSINVOC_COUNT_HI 0x2127
|
#define mmCP_VGT_DSINVOC_COUNT_LO 0x2126
|
#define mmCP_VGT_GSINVOC_COUNT_HI 0x2123
|
#define mmCP_VGT_GSINVOC_COUNT_LO 0x2122
|
#define mmCP_VGT_GSPRIM_COUNT_HI 0x211F
|
#define mmCP_VGT_GSPRIM_COUNT_LO 0x211E
|
#define mmCP_VGT_HSINVOC_COUNT_HI 0x2125
|
#define mmCP_VGT_HSINVOC_COUNT_LO 0x2124
|
#define mmCP_VGT_IAPRIM_COUNT_HI 0x211D
|
#define mmCP_VGT_IAPRIM_COUNT_LO 0x211C
|
#define mmCP_VGT_IAVERT_COUNT_HI 0x211B
|
#define mmCP_VGT_IAVERT_COUNT_LO 0x211A
|
#define mmCP_VGT_VSINVOC_COUNT_HI 0x2121
|
#define mmCP_VGT_VSINVOC_COUNT_LO 0x2120
|
#define mmCP_VMID 0xA0DA
|
#define mmCP_WAIT_REG_MEM_TIMEOUT 0x2174
|
#define mmCP_WAIT_SEM_ADDR_HI 0x2176
|
#define mmCP_WAIT_SEM_ADDR_LO 0x2175
|
#define mmCS_COPY_STATE 0xA1F3
|
#define mmDB_ALPHA_TO_MASK 0xA2DC
|
#define mmDB_CGTT_CLK_CTRL_0 0x261A
|
#define mmDB_COUNT_CONTROL 0xA001
|
#define mmDB_CREDIT_LIMIT 0x2614
|
#define mmDB_DEBUG 0x260C
|
#define mmDB_DEBUG2 0x260D
|
#define mmDB_DEBUG3 0x260E
|
#define mmDB_DEBUG4 0x260F
|
#define mmDB_DEPTH_BOUNDS_MAX 0xA009
|
#define mmDB_DEPTH_BOUNDS_MIN 0xA008
|
#define mmDB_DEPTH_CLEAR 0xA00B
|
#define mmDB_DEPTH_CONTROL 0xA200
|
#define mmDB_DEPTH_INFO 0xA00F
|
#define mmDB_DEPTH_SIZE 0xA016
|
#define mmDB_DEPTH_SLICE 0xA017
|
#define mmDB_DEPTH_VIEW 0xA002
|
#define mmDB_EQAA 0xA201
|
#define mmDB_FIFO_DEPTH1 0x2618
|
#define mmDB_FIFO_DEPTH2 0x2619
|
#define mmDB_FREE_CACHELINES 0x2617
|
#define mmDB_HTILE_DATA_BASE 0xA005
|
#define mmDB_HTILE_SURFACE 0xA2AF
|
#define mmDB_PERFCOUNTER0_HI 0x2602
|
#define mmDB_PERFCOUNTER0_LO 0x2601
|
#define mmDB_PERFCOUNTER0_SELECT 0x2600
|
#define mmDB_PERFCOUNTER1_HI 0x2605
|
#define mmDB_PERFCOUNTER1_LO 0x2604
|
#define mmDB_PERFCOUNTER1_SELECT 0x2603
|
#define mmDB_PERFCOUNTER2_HI 0x2608
|
#define mmDB_PERFCOUNTER2_LO 0x2607
|
#define mmDB_PERFCOUNTER2_SELECT 0x2606
|
#define mmDB_PERFCOUNTER3_HI 0x260B
|
#define mmDB_PERFCOUNTER3_LO 0x260A
|
#define mmDB_PERFCOUNTER3_SELECT 0x2609
|
#define mmDB_PRELOAD_CONTROL 0xA2B2
|
#define mmDB_READ_DEBUG_0 0x2620
|
#define mmDB_READ_DEBUG_1 0x2621
|
#define mmDB_READ_DEBUG_2 0x2622
|
#define mmDB_READ_DEBUG_3 0x2623
|
#define mmDB_READ_DEBUG_4 0x2624
|
#define mmDB_READ_DEBUG_5 0x2625
|
#define mmDB_READ_DEBUG_6 0x2626
|
#define mmDB_READ_DEBUG_7 0x2627
|
#define mmDB_READ_DEBUG_8 0x2628
|
#define mmDB_READ_DEBUG_9 0x2629
|
#define mmDB_READ_DEBUG_A 0x262A
|
#define mmDB_READ_DEBUG_B 0x262B
|
#define mmDB_READ_DEBUG_C 0x262C
|
#define mmDB_READ_DEBUG_D 0x262D
|
#define mmDB_READ_DEBUG_E 0x262E
|
#define mmDB_READ_DEBUG_F 0x262F
|
#define mmDB_RENDER_CONTROL 0xA000
|
#define mmDB_RENDER_OVERRIDE 0xA003
|
#define mmDB_RENDER_OVERRIDE2 0xA004
|
#define mmDB_SHADER_CONTROL 0xA203
|
#define mmDB_SRESULTS_COMPARE_STATE0 0xA2B0
|
#define mmDB_SRESULTS_COMPARE_STATE1 0xA2B1
|
#define mmDB_STENCIL_CLEAR 0xA00A
|
#define mmDB_STENCIL_CONTROL 0xA10B
|
#define mmDB_STENCIL_INFO 0xA011
|
#define mmDB_STENCIL_READ_BASE 0xA013
|
#define mmDB_STENCILREFMASK 0xA10C
|
#define mmDB_STENCILREFMASK_BF 0xA10D
|
#define mmDB_STENCIL_WRITE_BASE 0xA015
|
#define mmDB_SUBTILE_CONTROL 0x2616
|
#define mmDB_WATERMARKS 0x2615
|
#define mmDB_Z_INFO 0xA010
|
#define mmDB_ZPASS_COUNT_HI 0x261D
|
#define mmDB_ZPASS_COUNT_LOW 0x261C
|
#define mmDB_Z_READ_BASE 0xA012
|
#define mmDB_Z_WRITE_BASE 0xA014
|
#define mmDEBUG_DATA 0x203D
|
#define mmDEBUG_INDEX 0x203C
|
#define mmGB_ADDR_CONFIG 0x263E
|
#define mmGB_BACKEND_MAP 0x263F
|
#define mmGB_EDC_MODE 0x307E
|
#define mmGB_GPU_ID 0x2640
|
#define mmGB_TILE_MODE0 0x2644
|
#define mmGB_TILE_MODE10 0x264E
|
#define mmGB_TILE_MODE1 0x2645
|
#define mmGB_TILE_MODE11 0x264F
|
#define mmGB_TILE_MODE12 0x2650
|
#define mmGB_TILE_MODE13 0x2651
|
#define mmGB_TILE_MODE14 0x2652
|
#define mmGB_TILE_MODE15 0x2653
|
#define mmGB_TILE_MODE16 0x2654
|
#define mmGB_TILE_MODE17 0x2655
|
#define mmGB_TILE_MODE18 0x2656
|
#define mmGB_TILE_MODE19 0x2657
|
#define mmGB_TILE_MODE20 0x2658
|
#define mmGB_TILE_MODE2 0x2646
|
#define mmGB_TILE_MODE21 0x2659
|
#define mmGB_TILE_MODE22 0x265A
|
#define mmGB_TILE_MODE23 0x265B
|
#define mmGB_TILE_MODE24 0x265C
|
#define mmGB_TILE_MODE25 0x265D
|
#define mmGB_TILE_MODE26 0x265E
|
#define mmGB_TILE_MODE27 0x265F
|
#define mmGB_TILE_MODE28 0x2660
|
#define mmGB_TILE_MODE29 0x2661
|
#define mmGB_TILE_MODE30 0x2662
|
#define mmGB_TILE_MODE3 0x2647
|
#define mmGB_TILE_MODE31 0x2663
|
#define mmGB_TILE_MODE4 0x2648
|
#define mmGB_TILE_MODE5 0x2649
|
#define mmGB_TILE_MODE6 0x264A
|
#define mmGB_TILE_MODE7 0x264B
|
#define mmGB_TILE_MODE8 0x264C
|
#define mmGB_TILE_MODE9 0x264D
|
#define mmGC_PRIV_MODE 0x3048
|
#define mmGC_USER_RB_BACKEND_DISABLE 0x26DF
|
#define mmGC_USER_SHADER_ARRAY_CONFIG 0x2270
|
#define mmGDS_ATOM_BASE 0x25CE
|
#define mmGDS_ATOM_CNTL 0x25CC
|
#define mmGDS_ATOM_COMPLETE 0x25CD
|
#define mmGDS_ATOM_DST 0x25D2
|
#define mmGDS_ATOM_OFFSET0 0x25D0
|
#define mmGDS_ATOM_OFFSET1 0x25D1
|
#define mmGDS_ATOM_OP 0x25D3
|
#define mmGDS_ATOM_READ0 0x25D8
|
#define mmGDS_ATOM_READ0_U 0x25D9
|
#define mmGDS_ATOM_READ1 0x25DA
|
#define mmGDS_ATOM_READ1_U 0x25DB
|
#define mmGDS_ATOM_SIZE 0x25CF
|
#define mmGDS_ATOM_SRC0 0x25D4
|
#define mmGDS_ATOM_SRC0_U 0x25D5
|
#define mmGDS_ATOM_SRC1 0x25D6
|
#define mmGDS_ATOM_SRC1_U 0x25D7
|
#define mmGDS_CNTL_STATUS 0x25C1
|
#define mmGDS_CONFIG 0x25C0
|
#define mmGDS_DEBUG_CNTL 0x25DE
|
#define mmGDS_DEBUG_DATA 0x25DF
|
#define mmGDS_ENHANCE 0x25DC
|
#define mmGDS_GRBM_SECDED_CNT 0x25E3
|
#define mmGDS_GWS_RESOURCE 0x25E1
|
#define mmGDS_GWS_RESOURCE_CNTL 0x25E0
|
#define mmGDS_OA_DED 0x25E4
|
#define mmGDS_PERFCOUNTER0_HI 0x25E7
|
#define mmGDS_PERFCOUNTER0_LO 0x25E6
|
#define mmGDS_PERFCOUNTER0_SELECT 0x25E5
|
#define mmGDS_PERFCOUNTER1_HI 0x25EA
|
#define mmGDS_PERFCOUNTER1_LO 0x25E9
|
#define mmGDS_PERFCOUNTER1_SELECT 0x25E8
|
#define mmGDS_PERFCOUNTER2_HI 0x25ED
|
#define mmGDS_PERFCOUNTER2_LO 0x25EC
|
#define mmGDS_PERFCOUNTER2_SELECT 0x25EB
|
#define mmGDS_PERFCOUNTER3_HI 0x25F0
|
#define mmGDS_PERFCOUNTER3_LO 0x25EF
|
#define mmGDS_PERFCOUNTER3_SELECT 0x25EE
|
#define mmGDS_RD_ADDR 0x25C2
|
#define mmGDS_RD_BURST_ADDR 0x25C4
|
#define mmGDS_RD_BURST_COUNT 0x25C5
|
#define mmGDS_RD_BURST_DATA 0x25C6
|
#define mmGDS_RD_DATA 0x25C3
|
#define mmGDS_SECDED_CNT 0x25E2
|
#define mmGDS_WR_ADDR 0x25C7
|
#define mmGDS_WR_BURST_ADDR 0x25C9
|
#define mmGDS_WR_BURST_DATA 0x25CA
|
#define mmGDS_WR_DATA 0x25C8
|
#define mmGDS_WRITE_COMPLETE 0x25CB
|
#define mmGFX_COPY_STATE 0xA1F4
|
#define mmGRBM_CAM_DATA 0x3001
|
#define mmGRBM_CAM_INDEX 0x3000
|
#define mmGRBM_CNTL 0x2000
|
#define mmGRBM_DEBUG 0x2014
|
#define mmGRBM_DEBUG_CNTL 0x2009
|
#define mmGRBM_DEBUG_DATA 0x200A
|
#define mmGRBM_DEBUG_SNAPSHOT 0x2015
|
#define mmGRBM_GFX_CLKEN_CNTL 0x200C
|
#define mmGRBM_GFX_INDEX 0x200B
|
#define mmGRBM_INT_CNTL 0x2018
|
#define mmGRBM_NOWHERE 0x203F
|
#define mmGRBM_PERFCOUNTER0_HI 0x201F
|
#define mmGRBM_PERFCOUNTER0_LO 0x201E
|
#define mmGRBM_PERFCOUNTER0_SELECT 0x201C
|
#define mmGRBM_PERFCOUNTER1_HI 0x2021
|
#define mmGRBM_PERFCOUNTER1_LO 0x2020
|
#define mmGRBM_PERFCOUNTER1_SELECT 0x201D
|
#define mmGRBM_PWR_CNTL 0x2003
|
#define mmGRBM_READ_ERROR 0x2016
|
#define mmGRBM_SCRATCH_REG0 0x2040
|
#define mmGRBM_SCRATCH_REG1 0x2041
|
#define mmGRBM_SCRATCH_REG2 0x2042
|
#define mmGRBM_SCRATCH_REG3 0x2043
|
#define mmGRBM_SCRATCH_REG4 0x2044
|
#define mmGRBM_SCRATCH_REG5 0x2045
|
#define mmGRBM_SCRATCH_REG6 0x2046
|
#define mmGRBM_SCRATCH_REG7 0x2047
|
#define mmGRBM_SE0_PERFCOUNTER_HI 0x202B
|
#define mmGRBM_SE0_PERFCOUNTER_LO 0x202A
|
#define mmGRBM_SE0_PERFCOUNTER_SELECT 0x2026
|
#define mmGRBM_SE1_PERFCOUNTER_HI 0x202D
|
#define mmGRBM_SE1_PERFCOUNTER_LO 0x202C
|
#define mmGRBM_SE1_PERFCOUNTER_SELECT 0x2027
|
#define mmGRBM_SKEW_CNTL 0x2001
|
#define mmGRBM_SOFT_RESET 0x2008
|
#define mmGRBM_STATUS 0x2004
|
#define mmGRBM_STATUS2 0x2002
|
#define mmGRBM_STATUS_SE0 0x2005
|
#define mmGRBM_STATUS_SE1 0x2006
|
#define mmGRBM_WAIT_IDLE_CLOCKS 0x200D
|
#define mmIA_CNTL_STATUS 0x2237
|
#define mmIA_DEBUG_CNTL 0x223A
|
#define mmIA_DEBUG_DATA 0x223B
|
#define mmIA_ENHANCE 0xA29C
|
#define mmIA_MULTI_VGT_PARAM 0xA2AA
|
#define mmIA_PERFCOUNTER0_HI 0x2225
|
#define mmIA_PERFCOUNTER0_LO 0x2224
|
#define mmIA_PERFCOUNTER0_SELECT 0x2220
|
#define mmIA_PERFCOUNTER1_HI 0x2227
|
#define mmIA_PERFCOUNTER1_LO 0x2226
|
#define mmIA_PERFCOUNTER1_SELECT 0x2221
|
#define mmIA_PERFCOUNTER2_HI 0x2229
|
#define mmIA_PERFCOUNTER2_LO 0x2228
|
#define mmIA_PERFCOUNTER2_SELECT 0x2222
|
#define mmIA_PERFCOUNTER3_HI 0x222B
|
#define mmIA_PERFCOUNTER3_LO 0x222A
|
#define mmIA_PERFCOUNTER3_SELECT 0x2223
|
#define mmIA_VMID_OVERRIDE 0x2260
|
#define mmPA_CL_CLIP_CNTL 0xA204
|
#define mmPA_CL_CNTL_STATUS 0x2284
|
#define mmPA_CL_ENHANCE 0x2285
|
#define mmPA_CL_GB_HORZ_CLIP_ADJ 0xA2FC
|
#define mmPA_CL_GB_HORZ_DISC_ADJ 0xA2FD
|
#define mmPA_CL_GB_VERT_CLIP_ADJ 0xA2FA
|
#define mmPA_CL_GB_VERT_DISC_ADJ 0xA2FB
|
#define mmPA_CL_NANINF_CNTL 0xA208
|
#define mmPA_CL_POINT_CULL_RAD 0xA1F8
|
#define mmPA_CL_POINT_SIZE 0xA1F7
|
#define mmPA_CL_POINT_X_RAD 0xA1F5
|
#define mmPA_CL_POINT_Y_RAD 0xA1F6
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#define mmPA_CL_UCP_0_W 0xA172
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#define mmPA_CL_UCP_0_X 0xA16F
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#define mmPA_CL_UCP_0_Y 0xA170
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#define mmPA_CL_UCP_0_Z 0xA171
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#define mmPA_CL_UCP_1_W 0xA176
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#define mmPA_CL_UCP_1_X 0xA173
|
#define mmPA_CL_UCP_1_Y 0xA174
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#define mmPA_CL_UCP_1_Z 0xA175
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#define mmPA_CL_UCP_2_W 0xA17A
|
#define mmPA_CL_UCP_2_X 0xA177
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#define mmPA_CL_UCP_2_Y 0xA178
|
#define mmPA_CL_UCP_2_Z 0xA179
|
#define mmPA_CL_UCP_3_W 0xA17E
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#define mmPA_CL_UCP_3_X 0xA17B
|
#define mmPA_CL_UCP_3_Y 0xA17C
|
#define mmPA_CL_UCP_3_Z 0xA17D
|
#define mmPA_CL_UCP_4_W 0xA182
|
#define mmPA_CL_UCP_4_X 0xA17F
|
#define mmPA_CL_UCP_4_Y 0xA180
|
#define mmPA_CL_UCP_4_Z 0xA181
|
#define mmPA_CL_UCP_5_W 0xA186
|
#define mmPA_CL_UCP_5_X 0xA183
|
#define mmPA_CL_UCP_5_Y 0xA184
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#define mmPA_CL_UCP_5_Z 0xA185
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#define mmPA_CL_VPORT_XOFFSET 0xA110
|
#define mmPA_CL_VPORT_XOFFSET_10 0xA14C
|
#define mmPA_CL_VPORT_XOFFSET_1 0xA116
|
#define mmPA_CL_VPORT_XOFFSET_11 0xA152
|
#define mmPA_CL_VPORT_XOFFSET_12 0xA158
|
#define mmPA_CL_VPORT_XOFFSET_13 0xA15E
|
#define mmPA_CL_VPORT_XOFFSET_14 0xA164
|
#define mmPA_CL_VPORT_XOFFSET_15 0xA16A
|
#define mmPA_CL_VPORT_XOFFSET_2 0xA11C
|
#define mmPA_CL_VPORT_XOFFSET_3 0xA122
|
#define mmPA_CL_VPORT_XOFFSET_4 0xA128
|
#define mmPA_CL_VPORT_XOFFSET_5 0xA12E
|
#define mmPA_CL_VPORT_XOFFSET_6 0xA134
|
#define mmPA_CL_VPORT_XOFFSET_7 0xA13A
|
#define mmPA_CL_VPORT_XOFFSET_8 0xA140
|
#define mmPA_CL_VPORT_XOFFSET_9 0xA146
|
#define mmPA_CL_VPORT_XSCALE 0xA10F
|
#define mmPA_CL_VPORT_XSCALE_10 0xA14B
|
#define mmPA_CL_VPORT_XSCALE_1 0xA115
|
#define mmPA_CL_VPORT_XSCALE_11 0xA151
|
#define mmPA_CL_VPORT_XSCALE_12 0xA157
|
#define mmPA_CL_VPORT_XSCALE_13 0xA15D
|
#define mmPA_CL_VPORT_XSCALE_14 0xA163
|
#define mmPA_CL_VPORT_XSCALE_15 0xA169
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#define mmPA_CL_VPORT_XSCALE_2 0xA11B
|
#define mmPA_CL_VPORT_XSCALE_3 0xA121
|
#define mmPA_CL_VPORT_XSCALE_4 0xA127
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#define mmPA_CL_VPORT_XSCALE_5 0xA12D
|
#define mmPA_CL_VPORT_XSCALE_6 0xA133
|
#define mmPA_CL_VPORT_XSCALE_7 0xA139
|
#define mmPA_CL_VPORT_XSCALE_8 0xA13F
|
#define mmPA_CL_VPORT_XSCALE_9 0xA145
|
#define mmPA_CL_VPORT_YOFFSET 0xA112
|
#define mmPA_CL_VPORT_YOFFSET_10 0xA14E
|
#define mmPA_CL_VPORT_YOFFSET_1 0xA118
|
#define mmPA_CL_VPORT_YOFFSET_11 0xA154
|
#define mmPA_CL_VPORT_YOFFSET_12 0xA15A
|
#define mmPA_CL_VPORT_YOFFSET_13 0xA160
|
#define mmPA_CL_VPORT_YOFFSET_14 0xA166
|
#define mmPA_CL_VPORT_YOFFSET_15 0xA16C
|
#define mmPA_CL_VPORT_YOFFSET_2 0xA11E
|
#define mmPA_CL_VPORT_YOFFSET_3 0xA124
|
#define mmPA_CL_VPORT_YOFFSET_4 0xA12A
|
#define mmPA_CL_VPORT_YOFFSET_5 0xA130
|
#define mmPA_CL_VPORT_YOFFSET_6 0xA136
|
#define mmPA_CL_VPORT_YOFFSET_7 0xA13C
|
#define mmPA_CL_VPORT_YOFFSET_8 0xA142
|
#define mmPA_CL_VPORT_YOFFSET_9 0xA148
|
#define mmPA_CL_VPORT_YSCALE 0xA111
|
#define mmPA_CL_VPORT_YSCALE_10 0xA14D
|
#define mmPA_CL_VPORT_YSCALE_1 0xA117
|
#define mmPA_CL_VPORT_YSCALE_11 0xA153
|
#define mmPA_CL_VPORT_YSCALE_12 0xA159
|
#define mmPA_CL_VPORT_YSCALE_13 0xA15F
|
#define mmPA_CL_VPORT_YSCALE_14 0xA165
|
#define mmPA_CL_VPORT_YSCALE_15 0xA16B
|
#define mmPA_CL_VPORT_YSCALE_2 0xA11D
|
#define mmPA_CL_VPORT_YSCALE_3 0xA123
|
#define mmPA_CL_VPORT_YSCALE_4 0xA129
|
#define mmPA_CL_VPORT_YSCALE_5 0xA12F
|
#define mmPA_CL_VPORT_YSCALE_6 0xA135
|
#define mmPA_CL_VPORT_YSCALE_7 0xA13B
|
#define mmPA_CL_VPORT_YSCALE_8 0xA141
|
#define mmPA_CL_VPORT_YSCALE_9 0xA147
|
#define mmPA_CL_VPORT_ZOFFSET 0xA114
|
#define mmPA_CL_VPORT_ZOFFSET_10 0xA150
|
#define mmPA_CL_VPORT_ZOFFSET_1 0xA11A
|
#define mmPA_CL_VPORT_ZOFFSET_11 0xA156
|
#define mmPA_CL_VPORT_ZOFFSET_12 0xA15C
|
#define mmPA_CL_VPORT_ZOFFSET_13 0xA162
|
#define mmPA_CL_VPORT_ZOFFSET_14 0xA168
|
#define mmPA_CL_VPORT_ZOFFSET_15 0xA16E
|
#define mmPA_CL_VPORT_ZOFFSET_2 0xA120
|
#define mmPA_CL_VPORT_ZOFFSET_3 0xA126
|
#define mmPA_CL_VPORT_ZOFFSET_4 0xA12C
|
#define mmPA_CL_VPORT_ZOFFSET_5 0xA132
|
#define mmPA_CL_VPORT_ZOFFSET_6 0xA138
|
#define mmPA_CL_VPORT_ZOFFSET_7 0xA13E
|
#define mmPA_CL_VPORT_ZOFFSET_8 0xA144
|
#define mmPA_CL_VPORT_ZOFFSET_9 0xA14A
|
#define mmPA_CL_VPORT_ZSCALE 0xA113
|
#define mmPA_CL_VPORT_ZSCALE_10 0xA14F
|
#define mmPA_CL_VPORT_ZSCALE_1 0xA119
|
#define mmPA_CL_VPORT_ZSCALE_11 0xA155
|
#define mmPA_CL_VPORT_ZSCALE_12 0xA15B
|
#define mmPA_CL_VPORT_ZSCALE_13 0xA161
|
#define mmPA_CL_VPORT_ZSCALE_14 0xA167
|
#define mmPA_CL_VPORT_ZSCALE_15 0xA16D
|
#define mmPA_CL_VPORT_ZSCALE_2 0xA11F
|
#define mmPA_CL_VPORT_ZSCALE_3 0xA125
|
#define mmPA_CL_VPORT_ZSCALE_4 0xA12B
|
#define mmPA_CL_VPORT_ZSCALE_5 0xA131
|
#define mmPA_CL_VPORT_ZSCALE_6 0xA137
|
#define mmPA_CL_VPORT_ZSCALE_7 0xA13D
|
#define mmPA_CL_VPORT_ZSCALE_8 0xA143
|
#define mmPA_CL_VPORT_ZSCALE_9 0xA149
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#define mmPA_CL_VS_OUT_CNTL 0xA207
|
#define mmPA_CL_VTE_CNTL 0xA206
|
#define mmPA_SC_AA_CONFIG 0xA2F8
|
#define mmPA_SC_AA_MASK_X0Y0_X1Y0 0xA30E
|
#define mmPA_SC_AA_MASK_X0Y1_X1Y1 0xA30F
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0xA2FE
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0xA2FF
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0xA300
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0xA301
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0xA306
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0xA307
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0xA308
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0xA309
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0xA302
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0xA303
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0xA304
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0xA305
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0xA30A
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0xA30B
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0xA30C
|
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0xA30D
|
#define mmPA_SC_CENTROID_PRIORITY_0 0xA2F5
|
#define mmPA_SC_CENTROID_PRIORITY_1 0xA2F6
|
#define mmPA_SC_CLIPRECT_0_BR 0xA085
|
#define mmPA_SC_CLIPRECT_0_TL 0xA084
|
#define mmPA_SC_CLIPRECT_1_BR 0xA087
|
#define mmPA_SC_CLIPRECT_1_TL 0xA086
|
#define mmPA_SC_CLIPRECT_2_BR 0xA089
|
#define mmPA_SC_CLIPRECT_2_TL 0xA088
|
#define mmPA_SC_CLIPRECT_3_BR 0xA08B
|
#define mmPA_SC_CLIPRECT_3_TL 0xA08A
|
#define mmPA_SC_CLIPRECT_RULE 0xA083
|
#define mmPA_SC_DEBUG_CNTL 0x22F6
|
#define mmPA_SC_DEBUG_DATA 0x22F7
|
#define mmPA_SC_EDGERULE 0xA08C
|
#define mmPA_SC_ENHANCE 0x22FC
|
#define mmPA_SC_FIFO_DEPTH_CNTL 0x2295
|
#define mmPA_SC_FIFO_SIZE 0x22F3
|
#define mmPA_SC_FORCE_EOV_MAX_CNTS 0x22C9
|
#define mmPA_SC_GENERIC_SCISSOR_BR 0xA091
|
#define mmPA_SC_GENERIC_SCISSOR_TL 0xA090
|
#define mmPA_SC_IF_FIFO_SIZE 0x22F5
|
#define mmPA_SC_LINE_CNTL 0xA2F7
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#define mmPA_SC_LINE_STIPPLE 0xA283
|
#define mmPA_SC_LINE_STIPPLE_STATE 0x22C4
|
#define mmPA_SC_MODE_CNTL_0 0xA292
|
#define mmPA_SC_MODE_CNTL_1 0xA293
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#define mmPA_SC_PERFCOUNTER0_HI 0x22A9
|
#define mmPA_SC_PERFCOUNTER0_LO 0x22A8
|
#define mmPA_SC_PERFCOUNTER0_SELECT 0x22A0
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#define mmPA_SC_PERFCOUNTER1_HI 0x22AB
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#define mmPA_SC_PERFCOUNTER1_LO 0x22AA
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#define mmPA_SC_PERFCOUNTER1_SELECT 0x22A1
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#define mmPA_SC_PERFCOUNTER2_HI 0x22AD
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#define mmPA_SC_PERFCOUNTER2_LO 0x22AC
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#define mmPA_SC_PERFCOUNTER2_SELECT 0x22A2
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#define mmPA_SC_PERFCOUNTER3_HI 0x22AF
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#define mmPA_SC_PERFCOUNTER3_LO 0x22AE
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#define mmPA_SC_PERFCOUNTER3_SELECT 0x22A3
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#define mmPA_SC_PERFCOUNTER4_HI 0x22B1
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#define mmPA_SC_PERFCOUNTER4_LO 0x22B0
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#define mmPA_SC_PERFCOUNTER4_SELECT 0x22A4
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#define mmPA_SC_PERFCOUNTER5_HI 0x22B3
|
#define mmPA_SC_PERFCOUNTER5_LO 0x22B2
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#define mmPA_SC_PERFCOUNTER5_SELECT 0x22A5
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#define mmPA_SC_PERFCOUNTER6_HI 0x22B5
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#define mmPA_SC_PERFCOUNTER6_LO 0x22B4
|
#define mmPA_SC_PERFCOUNTER6_SELECT 0x22A6
|
#define mmPA_SC_PERFCOUNTER7_HI 0x22B7
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#define mmPA_SC_PERFCOUNTER7_LO 0x22B6
|
#define mmPA_SC_PERFCOUNTER7_SELECT 0x22A7
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#define mmPA_SC_RASTER_CONFIG 0xA0D4
|
#define mmPA_SC_SCREEN_SCISSOR_BR 0xA00D
|
#define mmPA_SC_SCREEN_SCISSOR_TL 0xA00C
|
#define mmPA_SC_VPORT_SCISSOR_0_BR 0xA095
|
#define mmPA_SC_VPORT_SCISSOR_0_TL 0xA094
|
#define mmPA_SC_VPORT_SCISSOR_10_BR 0xA0A9
|
#define mmPA_SC_VPORT_SCISSOR_10_TL 0xA0A8
|
#define mmPA_SC_VPORT_SCISSOR_11_BR 0xA0AB
|
#define mmPA_SC_VPORT_SCISSOR_11_TL 0xA0AA
|
#define mmPA_SC_VPORT_SCISSOR_12_BR 0xA0AD
|
#define mmPA_SC_VPORT_SCISSOR_12_TL 0xA0AC
|
#define mmPA_SC_VPORT_SCISSOR_13_BR 0xA0AF
|
#define mmPA_SC_VPORT_SCISSOR_13_TL 0xA0AE
|
#define mmPA_SC_VPORT_SCISSOR_14_BR 0xA0B1
|
#define mmPA_SC_VPORT_SCISSOR_14_TL 0xA0B0
|
#define mmPA_SC_VPORT_SCISSOR_15_BR 0xA0B3
|
#define mmPA_SC_VPORT_SCISSOR_15_TL 0xA0B2
|
#define mmPA_SC_VPORT_SCISSOR_1_BR 0xA097
|
#define mmPA_SC_VPORT_SCISSOR_1_TL 0xA096
|
#define mmPA_SC_VPORT_SCISSOR_2_BR 0xA099
|
#define mmPA_SC_VPORT_SCISSOR_2_TL 0xA098
|
#define mmPA_SC_VPORT_SCISSOR_3_BR 0xA09B
|
#define mmPA_SC_VPORT_SCISSOR_3_TL 0xA09A
|
#define mmPA_SC_VPORT_SCISSOR_4_BR 0xA09D
|
#define mmPA_SC_VPORT_SCISSOR_4_TL 0xA09C
|
#define mmPA_SC_VPORT_SCISSOR_5_BR 0xA09F
|
#define mmPA_SC_VPORT_SCISSOR_5_TL 0xA09E
|
#define mmPA_SC_VPORT_SCISSOR_6_BR 0xA0A1
|
#define mmPA_SC_VPORT_SCISSOR_6_TL 0xA0A0
|
#define mmPA_SC_VPORT_SCISSOR_7_BR 0xA0A3
|
#define mmPA_SC_VPORT_SCISSOR_7_TL 0xA0A2
|
#define mmPA_SC_VPORT_SCISSOR_8_BR 0xA0A5
|
#define mmPA_SC_VPORT_SCISSOR_8_TL 0xA0A4
|
#define mmPA_SC_VPORT_SCISSOR_9_BR 0xA0A7
|
#define mmPA_SC_VPORT_SCISSOR_9_TL 0xA0A6
|
#define mmPA_SC_VPORT_ZMAX_0 0xA0B5
|
#define mmPA_SC_VPORT_ZMAX_10 0xA0C9
|
#define mmPA_SC_VPORT_ZMAX_1 0xA0B7
|
#define mmPA_SC_VPORT_ZMAX_11 0xA0CB
|
#define mmPA_SC_VPORT_ZMAX_12 0xA0CD
|
#define mmPA_SC_VPORT_ZMAX_13 0xA0CF
|
#define mmPA_SC_VPORT_ZMAX_14 0xA0D1
|
#define mmPA_SC_VPORT_ZMAX_15 0xA0D3
|
#define mmPA_SC_VPORT_ZMAX_2 0xA0B9
|
#define mmPA_SC_VPORT_ZMAX_3 0xA0BB
|
#define mmPA_SC_VPORT_ZMAX_4 0xA0BD
|
#define mmPA_SC_VPORT_ZMAX_5 0xA0BF
|
#define mmPA_SC_VPORT_ZMAX_6 0xA0C1
|
#define mmPA_SC_VPORT_ZMAX_7 0xA0C3
|
#define mmPA_SC_VPORT_ZMAX_8 0xA0C5
|
#define mmPA_SC_VPORT_ZMAX_9 0xA0C7
|
#define mmPA_SC_VPORT_ZMIN_0 0xA0B4
|
#define mmPA_SC_VPORT_ZMIN_10 0xA0C8
|
#define mmPA_SC_VPORT_ZMIN_1 0xA0B6
|
#define mmPA_SC_VPORT_ZMIN_11 0xA0CA
|
#define mmPA_SC_VPORT_ZMIN_12 0xA0CC
|
#define mmPA_SC_VPORT_ZMIN_13 0xA0CE
|
#define mmPA_SC_VPORT_ZMIN_14 0xA0D0
|
#define mmPA_SC_VPORT_ZMIN_15 0xA0D2
|
#define mmPA_SC_VPORT_ZMIN_2 0xA0B8
|
#define mmPA_SC_VPORT_ZMIN_3 0xA0BA
|
#define mmPA_SC_VPORT_ZMIN_4 0xA0BC
|
#define mmPA_SC_VPORT_ZMIN_5 0xA0BE
|
#define mmPA_SC_VPORT_ZMIN_6 0xA0C0
|
#define mmPA_SC_VPORT_ZMIN_7 0xA0C2
|
#define mmPA_SC_VPORT_ZMIN_8 0xA0C4
|
#define mmPA_SC_VPORT_ZMIN_9 0xA0C6
|
#define mmPA_SC_WINDOW_OFFSET 0xA080
|
#define mmPA_SC_WINDOW_SCISSOR_BR 0xA082
|
#define mmPA_SC_WINDOW_SCISSOR_TL 0xA081
|
#define mmPA_SU_CNTL_STATUS 0x2294
|
#define mmPA_SU_DEBUG_CNTL 0x2280
|
#define mmPA_SU_DEBUG_DATA 0x2281
|
#define mmPA_SU_HARDWARE_SCREEN_OFFSET 0xA08D
|
#define mmPA_SU_LINE_CNTL 0xA282
|
#define mmPA_SU_LINE_STIPPLE_CNTL 0xA209
|
#define mmPA_SU_LINE_STIPPLE_SCALE 0xA20A
|
#define mmPA_SU_LINE_STIPPLE_VALUE 0x2298
|
#define mmPA_SU_PERFCOUNTER0_HI 0x228D
|
#define mmPA_SU_PERFCOUNTER0_LO 0x228C
|
#define mmPA_SU_PERFCOUNTER0_SELECT 0x2288
|
#define mmPA_SU_PERFCOUNTER1_HI 0x228F
|
#define mmPA_SU_PERFCOUNTER1_LO 0x228E
|
#define mmPA_SU_PERFCOUNTER1_SELECT 0x2289
|
#define mmPA_SU_PERFCOUNTER2_HI 0x2291
|
#define mmPA_SU_PERFCOUNTER2_LO 0x2290
|
#define mmPA_SU_PERFCOUNTER2_SELECT 0x228A
|
#define mmPA_SU_PERFCOUNTER3_HI 0x2293
|
#define mmPA_SU_PERFCOUNTER3_LO 0x2292
|
#define mmPA_SU_PERFCOUNTER3_SELECT 0x228B
|
#define mmPA_SU_POINT_MINMAX 0xA281
|
#define mmPA_SU_POINT_SIZE 0xA280
|
#define mmPA_SU_POLY_OFFSET_BACK_OFFSET 0xA2E3
|
#define mmPA_SU_POLY_OFFSET_BACK_SCALE 0xA2E2
|
#define mmPA_SU_POLY_OFFSET_CLAMP 0xA2DF
|
#define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL 0xA2DE
|
#define mmPA_SU_POLY_OFFSET_FRONT_OFFSET 0xA2E1
|
#define mmPA_SU_POLY_OFFSET_FRONT_SCALE 0xA2E0
|
#define mmPA_SU_PRIM_FILTER_CNTL 0xA20B
|
#define mmPA_SU_SC_MODE_CNTL 0xA205
|
#define mmPA_SU_VTX_CNTL 0xA2F9
|
#define mmRAS_BCI_SIGNATURE0 0x339E
|
#define mmRAS_BCI_SIGNATURE1 0x339F
|
#define mmRAS_CB_SIGNATURE0 0x339D
|
#define mmRAS_DB_SIGNATURE0 0x338B
|
#define mmRAS_IA_SIGNATURE0 0x3397
|
#define mmRAS_IA_SIGNATURE1 0x3398
|
#define mmRAS_PA_SIGNATURE0 0x338C
|
#define mmRAS_SC_SIGNATURE0 0x338F
|
#define mmRAS_SC_SIGNATURE1 0x3390
|
#define mmRAS_SC_SIGNATURE2 0x3391
|
#define mmRAS_SC_SIGNATURE3 0x3392
|
#define mmRAS_SC_SIGNATURE4 0x3393
|
#define mmRAS_SC_SIGNATURE5 0x3394
|
#define mmRAS_SC_SIGNATURE6 0x3395
|
#define mmRAS_SC_SIGNATURE7 0x3396
|
#define mmRAS_SIGNATURE_CONTROL 0x3380
|
#define mmRAS_SIGNATURE_MASK 0x3381
|
#define mmRAS_SPI_SIGNATURE0 0x3399
|
#define mmRAS_SPI_SIGNATURE1 0x339A
|
#define mmRAS_SQ_SIGNATURE0 0x338E
|
#define mmRAS_SX_SIGNATURE0 0x3382
|
#define mmRAS_SX_SIGNATURE1 0x3383
|
#define mmRAS_SX_SIGNATURE2 0x3384
|
#define mmRAS_SX_SIGNATURE3 0x3385
|
#define mmRAS_TA_SIGNATURE0 0x339B
|
#define mmRAS_TD_SIGNATURE0 0x339C
|
#define mmRAS_VGT_SIGNATURE0 0x338D
|
#define mmRLC_AUTO_PG_CTRL 0x310D
|
#define mmRLC_CAPTURE_GPU_CLOCK_COUNT 0x30D0
|
#define mmRLC_CGCG_CGLS_CTRL 0x3101
|
#define mmRLC_CGCG_RAMP_CTRL 0x3102
|
#define mmRLC_CGTT_MGCG_OVERRIDE 0x3100
|
#define mmRLC_CNTL 0x30C0
|
#define mmRLC_CU_STATUS 0x3106
|
#define mmRLC_DEBUG 0x30CA
|
#define mmRLC_DEBUG_SELECT 0x30C9
|
#define mmRLC_DRIVER_CPDMA_STATUS 0x30C7
|
#define mmRLC_DYN_PG_REQUEST 0x3104
|
#define mmRLC_DYN_PG_STATUS 0x3103
|
#define mmRLC_GPU_CLOCK_32 0x30D5
|
#define mmRLC_GPU_CLOCK_32_RES_SEL 0x30D4
|
#define mmRLC_GPU_CLOCK_COUNT_LSB 0x30CE
|
#define mmRLC_GPU_CLOCK_COUNT_MSB 0x30CF
|
#define mmRLC_LB_ALWAYS_ACTIVE_CU_MASK 0x3108
|
#define mmRLC_LB_CNTL 0x30C3
|
#define mmRLC_LB_CNTR_INIT 0x30C6
|
#define mmRLC_LB_CNTR_MAX 0x30C5
|
#define mmRLC_LB_INIT_CU_MASK 0x3107
|
#define mmRLC_LB_PARAMS 0x3109
|
#define mmRLC_LOAD_BALANCE_CNTR 0x30F6
|
#define mmRLC_MAX_PG_CU 0x310C
|
#define mmRLC_MC_CNTL 0x30D1
|
#define mmRLC_MEM_SLP_CNTL 0x30D8
|
#define mmRLC_PERFCOUNTER0_HI 0x30DC
|
#define mmRLC_PERFCOUNTER0_LO 0x30DB
|
#define mmRLC_PERFCOUNTER0_SELECT 0x30DA
|
#define mmRLC_PERFCOUNTER1_HI 0x30DF
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#define mmRLC_PERFCOUNTER1_LO 0x30DE
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#define mmRLC_PERFCOUNTER1_SELECT 0x30DD
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#define mmRLC_PERFMON_CNTL 0x30D9
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#define mmRLC_PG_ALWAYS_ON_CU_MASK 0x310B
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#define mmRLC_PG_CNTL 0x30D7
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#define mmRLC_SAVE_AND_RESTORE_BASE 0x30C4
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#define mmRLC_SERDES_RD_DATA_0 0x3112
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#define mmRLC_SERDES_RD_DATA_1 0x3113
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#define mmRLC_SERDES_RD_DATA_2 0x3114
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#define mmRLC_SERDES_RD_MASTER_INDEX 0x3111
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#define mmRLC_SERDES_WR_CTRL 0x3117
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#define mmRLC_SERDES_WR_DATA 0x3118
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#define mmRLC_SMU_GRBM_REG_SAVE_CTRL 0x310E
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#define mmRLC_SMU_PG_CTRL 0x310F
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#define mmRLC_SMU_PG_WAKE_UP_CTRL 0x3110
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#define mmRLC_SOFT_RESET_GPU 0x30D6
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#define mmRLC_STAT 0x30D3
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#define mmRLC_THREAD1_DELAY 0x310A
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#define mmRLC_UCODE_CNTL 0x30D2
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#define mmSCRATCH_ADDR 0x2151
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#define mmSCRATCH_REG0 0x2140
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#define mmSCRATCH_REG1 0x2141
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#define mmSCRATCH_REG2 0x2142
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#define mmSCRATCH_REG3 0x2143
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#define mmSCRATCH_REG4 0x2144
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#define mmSCRATCH_REG5 0x2145
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#define mmSCRATCH_REG6 0x2146
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#define mmSCRATCH_REG7 0x2147
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#define mmSCRATCH_UMSK 0x2150
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#define mmSPI_ARB_CYCLES_0 0x243D
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#define mmSPI_ARB_CYCLES_1 0x243E
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#define mmSPI_ARB_PRIORITY 0x243C
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#define mmSPI_BARYC_CNTL 0xA1B8
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#define mmSPI_CONFIG_CNTL 0x2440
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#define mmSPI_CONFIG_CNTL_1 0x244F
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#define mmSPI_DEBUG_BUSY 0x2450
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#define mmSPI_DEBUG_CNTL 0x2441
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#define mmSPI_DEBUG_READ 0x2442
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#define mmSPI_GDS_CREDITS 0x24D8
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#define mmSPI_INTERP_CONTROL_0 0xA1B5
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#define mmSPI_LB_CTR_CTRL 0x24D4
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#define mmSPI_LB_CU_MASK 0x24D5
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#define mmSPI_LB_DATA_REG 0x24D6
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#define mmSPI_PERFCOUNTER0_HI 0x2447
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#define mmSPI_PERFCOUNTER0_LO 0x2448
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#define mmSPI_PERFCOUNTER0_SELECT 0x2443
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#define mmSPI_PERFCOUNTER1_HI 0x2449
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#define mmSPI_PERFCOUNTER1_LO 0x244A
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#define mmSPI_PERFCOUNTER1_SELECT 0x2444
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#define mmSPI_PERFCOUNTER2_HI 0x244B
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#define mmSPI_PERFCOUNTER2_LO 0x244C
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#define mmSPI_PERFCOUNTER2_SELECT 0x2445
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#define mmSPI_PERFCOUNTER3_HI 0x244D
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#define mmSPI_PERFCOUNTER3_LO 0x244E
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#define mmSPI_PERFCOUNTER3_SELECT 0x2446
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#define mmSPI_PERFCOUNTER_BINS 0x243F
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#define mmSPI_PG_ENABLE_STATIC_CU_MASK 0x24D7
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#define mmSPI_PS_IN_CONTROL 0xA1B6
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#define mmSPI_PS_INPUT_ADDR 0xA1B4
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#define mmSPI_PS_INPUT_CNTL_0 0xA191
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#define mmSPI_PS_INPUT_CNTL_10 0xA19B
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#define mmSPI_PS_INPUT_CNTL_1 0xA192
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#define mmSPI_PS_INPUT_CNTL_11 0xA19C
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#define mmSPI_PS_INPUT_CNTL_12 0xA19D
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#define mmSPI_PS_INPUT_CNTL_13 0xA19E
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#define mmSPI_PS_INPUT_CNTL_14 0xA19F
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#define mmSPI_PS_INPUT_CNTL_15 0xA1A0
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#define mmSPI_PS_INPUT_CNTL_16 0xA1A1
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#define mmSPI_PS_INPUT_CNTL_17 0xA1A2
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#define mmSPI_PS_INPUT_CNTL_18 0xA1A3
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#define mmSPI_PS_INPUT_CNTL_19 0xA1A4
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#define mmSPI_PS_INPUT_CNTL_20 0xA1A5
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#define mmSPI_PS_INPUT_CNTL_2 0xA193
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#define mmSPI_PS_INPUT_CNTL_21 0xA1A6
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#define mmSPI_PS_INPUT_CNTL_22 0xA1A7
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#define mmSPI_PS_INPUT_CNTL_23 0xA1A8
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#define mmSPI_PS_INPUT_CNTL_24 0xA1A9
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#define mmSPI_PS_INPUT_CNTL_25 0xA1AA
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#define mmSPI_PS_INPUT_CNTL_26 0xA1AB
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#define mmSPI_PS_INPUT_CNTL_27 0xA1AC
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#define mmSPI_PS_INPUT_CNTL_28 0xA1AD
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#define mmSPI_PS_INPUT_CNTL_29 0xA1AE
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#define mmSPI_PS_INPUT_CNTL_30 0xA1AF
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#define mmSPI_PS_INPUT_CNTL_3 0xA194
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#define mmSPI_PS_INPUT_CNTL_31 0xA1B0
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#define mmSPI_PS_INPUT_CNTL_4 0xA195
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#define mmSPI_PS_INPUT_CNTL_5 0xA196
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#define mmSPI_PS_INPUT_CNTL_6 0xA197
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#define mmSPI_PS_INPUT_CNTL_7 0xA198
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#define mmSPI_PS_INPUT_CNTL_8 0xA199
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#define mmSPI_PS_INPUT_CNTL_9 0xA19A
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#define mmSPI_PS_INPUT_ENA 0xA1B3
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#define mmSPI_PS_MAX_WAVE_ID 0x243B
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#define mmSPI_SHADER_COL_FORMAT 0xA1C5
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#define mmSPI_SHADER_PGM_HI_ES 0x2CC9
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#define mmSPI_SHADER_PGM_HI_GS 0x2C89
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#define mmSPI_SHADER_PGM_HI_HS 0x2D09
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#define mmSPI_SHADER_PGM_HI_LS 0x2D49
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#define mmSPI_SHADER_PGM_HI_PS 0x2C09
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#define mmSPI_SHADER_PGM_HI_VS 0x2C49
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#define mmSPI_SHADER_PGM_LO_ES 0x2CC8
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#define mmSPI_SHADER_PGM_LO_GS 0x2C88
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#define mmSPI_SHADER_PGM_LO_HS 0x2D08
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#define mmSPI_SHADER_PGM_LO_LS 0x2D48
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#define mmSPI_SHADER_PGM_LO_PS 0x2C08
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#define mmSPI_SHADER_PGM_LO_VS 0x2C48
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#define mmSPI_SHADER_PGM_RSRC1_ES 0x2CCA
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#define mmSPI_SHADER_PGM_RSRC1_GS 0x2C8A
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#define mmSPI_SHADER_PGM_RSRC1_HS 0x2D0A
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#define mmSPI_SHADER_PGM_RSRC1_LS 0x2D4A
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#define mmSPI_SHADER_PGM_RSRC1_PS 0x2C0A
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#define mmSPI_SHADER_PGM_RSRC1_VS 0x2C4A
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#define mmSPI_SHADER_PGM_RSRC2_ES 0x2CCB
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#define mmSPI_SHADER_PGM_RSRC2_GS 0x2C8B
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#define mmSPI_SHADER_PGM_RSRC2_HS 0x2D0B
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#define mmSPI_SHADER_PGM_RSRC2_LS 0x2D4B
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#define mmSPI_SHADER_PGM_RSRC2_PS 0x2C0B
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#define mmSPI_SHADER_PGM_RSRC2_VS 0x2C4B
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#define mmSPI_SHADER_POS_FORMAT 0xA1C3
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#define mmSPI_SHADER_TBA_HI_ES 0x2CC1
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#define mmSPI_SHADER_TBA_HI_GS 0x2C81
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#define mmSPI_SHADER_TBA_HI_HS 0x2D01
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#define mmSPI_SHADER_TBA_HI_LS 0x2D41
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#define mmSPI_SHADER_TBA_HI_PS 0x2C01
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#define mmSPI_SHADER_TBA_HI_VS 0x2C41
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#define mmSPI_SHADER_TBA_LO_ES 0x2CC0
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#define mmSPI_SHADER_TBA_LO_GS 0x2C80
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#define mmSPI_SHADER_TBA_LO_HS 0x2D00
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#define mmSPI_SHADER_TBA_LO_LS 0x2D40
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#define mmSPI_SHADER_TBA_LO_PS 0x2C00
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#define mmSPI_SHADER_TBA_LO_VS 0x2C40
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#define mmSPI_SHADER_TMA_HI_ES 0x2CC3
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#define mmSPI_SHADER_TMA_HI_GS 0x2C83
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#define mmSPI_SHADER_TMA_HI_HS 0x2D03
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#define mmSPI_SHADER_TMA_HI_LS 0x2D43
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#define mmSPI_SHADER_TMA_HI_PS 0x2C03
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#define mmSPI_SHADER_TMA_HI_VS 0x2C43
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#define mmSPI_SHADER_TMA_LO_ES 0x2CC2
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#define mmSPI_SHADER_TMA_LO_GS 0x2C82
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#define mmSPI_SHADER_TMA_LO_HS 0x2D02
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#define mmSPI_SHADER_TMA_LO_LS 0x2D42
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#define mmSPI_SHADER_TMA_LO_PS 0x2C02
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#define mmSPI_SHADER_TMA_LO_VS 0x2C42
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#define mmSPI_SHADER_USER_DATA_ES_0 0x2CCC
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#define mmSPI_SHADER_USER_DATA_ES_10 0x2CD6
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#define mmSPI_SHADER_USER_DATA_ES_1 0x2CCD
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#define mmSPI_SHADER_USER_DATA_ES_11 0x2CD7
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#define mmSPI_SHADER_USER_DATA_ES_12 0x2CD8
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#define mmSPI_SHADER_USER_DATA_ES_13 0x2CD9
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#define mmSPI_SHADER_USER_DATA_ES_14 0x2CDA
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#define mmSPI_SHADER_USER_DATA_ES_15 0x2CDB
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#define mmSPI_SHADER_USER_DATA_ES_2 0x2CCE
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#define mmSPI_SHADER_USER_DATA_ES_3 0x2CCF
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#define mmSPI_SHADER_USER_DATA_ES_4 0x2CD0
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#define mmSPI_SHADER_USER_DATA_ES_5 0x2CD1
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#define mmSPI_SHADER_USER_DATA_ES_6 0x2CD2
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#define mmSPI_SHADER_USER_DATA_ES_7 0x2CD3
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#define mmSPI_SHADER_USER_DATA_ES_8 0x2CD4
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#define mmSPI_SHADER_USER_DATA_ES_9 0x2CD5
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#define mmSPI_SHADER_USER_DATA_GS_0 0x2C8C
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#define mmSPI_SHADER_USER_DATA_GS_10 0x2C96
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#define mmSPI_SHADER_USER_DATA_GS_1 0x2C8D
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#define mmSPI_SHADER_USER_DATA_GS_11 0x2C97
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#define mmSPI_SHADER_USER_DATA_GS_12 0x2C98
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#define mmSPI_SHADER_USER_DATA_GS_13 0x2C99
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#define mmSPI_SHADER_USER_DATA_GS_14 0x2C9A
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#define mmSPI_SHADER_USER_DATA_GS_15 0x2C9B
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#define mmSPI_SHADER_USER_DATA_GS_2 0x2C8E
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#define mmSPI_SHADER_USER_DATA_GS_3 0x2C8F
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#define mmSPI_SHADER_USER_DATA_GS_4 0x2C90
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#define mmSPI_SHADER_USER_DATA_GS_5 0x2C91
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#define mmSPI_SHADER_USER_DATA_GS_6 0x2C92
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#define mmSPI_SHADER_USER_DATA_GS_7 0x2C93
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#define mmSPI_SHADER_USER_DATA_GS_8 0x2C94
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#define mmSPI_SHADER_USER_DATA_GS_9 0x2C95
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#define mmSPI_SHADER_USER_DATA_HS_0 0x2D0C
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#define mmSPI_SHADER_USER_DATA_HS_10 0x2D16
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#define mmSPI_SHADER_USER_DATA_HS_1 0x2D0D
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#define mmSPI_SHADER_USER_DATA_HS_11 0x2D17
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#define mmSPI_SHADER_USER_DATA_HS_12 0x2D18
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#define mmSPI_SHADER_USER_DATA_HS_13 0x2D19
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#define mmSPI_SHADER_USER_DATA_HS_14 0x2D1A
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#define mmSPI_SHADER_USER_DATA_HS_15 0x2D1B
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#define mmSPI_SHADER_USER_DATA_HS_2 0x2D0E
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#define mmSPI_SHADER_USER_DATA_HS_3 0x2D0F
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#define mmSPI_SHADER_USER_DATA_HS_4 0x2D10
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#define mmSPI_SHADER_USER_DATA_HS_5 0x2D11
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#define mmSPI_SHADER_USER_DATA_HS_6 0x2D12
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#define mmSPI_SHADER_USER_DATA_HS_7 0x2D13
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#define mmSPI_SHADER_USER_DATA_HS_8 0x2D14
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#define mmSPI_SHADER_USER_DATA_HS_9 0x2D15
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#define mmSPI_SHADER_USER_DATA_LS_0 0x2D4C
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#define mmSPI_SHADER_USER_DATA_LS_10 0x2D56
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#define mmSPI_SHADER_USER_DATA_LS_1 0x2D4D
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#define mmSPI_SHADER_USER_DATA_LS_11 0x2D57
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#define mmSPI_SHADER_USER_DATA_LS_12 0x2D58
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#define mmSPI_SHADER_USER_DATA_LS_13 0x2D59
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#define mmSPI_SHADER_USER_DATA_LS_14 0x2D5A
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#define mmSPI_SHADER_USER_DATA_LS_15 0x2D5B
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#define mmSPI_SHADER_USER_DATA_LS_2 0x2D4E
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#define mmSPI_SHADER_USER_DATA_LS_3 0x2D4F
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#define mmSPI_SHADER_USER_DATA_LS_4 0x2D50
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#define mmSPI_SHADER_USER_DATA_LS_5 0x2D51
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#define mmSPI_SHADER_USER_DATA_LS_6 0x2D52
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#define mmSPI_SHADER_USER_DATA_LS_7 0x2D53
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#define mmSPI_SHADER_USER_DATA_LS_8 0x2D54
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#define mmSPI_SHADER_USER_DATA_LS_9 0x2D55
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#define mmSPI_SHADER_USER_DATA_PS_0 0x2C0C
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#define mmSPI_SHADER_USER_DATA_PS_10 0x2C16
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#define mmSPI_SHADER_USER_DATA_PS_1 0x2C0D
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#define mmSPI_SHADER_USER_DATA_PS_11 0x2C17
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#define mmSPI_SHADER_USER_DATA_PS_12 0x2C18
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#define mmSPI_SHADER_USER_DATA_PS_13 0x2C19
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#define mmSPI_SHADER_USER_DATA_PS_14 0x2C1A
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#define mmSPI_SHADER_USER_DATA_PS_15 0x2C1B
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#define mmSPI_SHADER_USER_DATA_PS_2 0x2C0E
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#define mmSPI_SHADER_USER_DATA_PS_3 0x2C0F
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#define mmSPI_SHADER_USER_DATA_PS_4 0x2C10
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#define mmSPI_SHADER_USER_DATA_PS_5 0x2C11
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#define mmSPI_SHADER_USER_DATA_PS_6 0x2C12
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#define mmSPI_SHADER_USER_DATA_PS_7 0x2C13
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#define mmSPI_SHADER_USER_DATA_PS_8 0x2C14
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#define mmSPI_SHADER_USER_DATA_PS_9 0x2C15
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#define mmSPI_SHADER_USER_DATA_VS_0 0x2C4C
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#define mmSPI_SHADER_USER_DATA_VS_10 0x2C56
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#define mmSPI_SHADER_USER_DATA_VS_1 0x2C4D
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#define mmSPI_SHADER_USER_DATA_VS_11 0x2C57
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#define mmSPI_SHADER_USER_DATA_VS_12 0x2C58
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#define mmSPI_SHADER_USER_DATA_VS_13 0x2C59
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#define mmSPI_SHADER_USER_DATA_VS_14 0x2C5A
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#define mmSPI_SHADER_USER_DATA_VS_15 0x2C5B
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#define mmSPI_SHADER_USER_DATA_VS_2 0x2C4E
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#define mmSPI_SHADER_USER_DATA_VS_3 0x2C4F
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#define mmSPI_SHADER_USER_DATA_VS_4 0x2C50
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#define mmSPI_SHADER_USER_DATA_VS_5 0x2C51
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#define mmSPI_SHADER_USER_DATA_VS_6 0x2C52
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#define mmSPI_SHADER_USER_DATA_VS_7 0x2C53
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#define mmSPI_SHADER_USER_DATA_VS_8 0x2C54
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#define mmSPI_SHADER_USER_DATA_VS_9 0x2C55
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#define mmSPI_SHADER_Z_FORMAT 0xA1C4
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#define mmSPI_SLAVE_DEBUG_BUSY 0x24D3
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#define mmSPI_SX_EXPORT_BUFFER_SIZES 0x24D9
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#define mmSPI_SX_SCOREBOARD_BUFFER_SIZES 0x24DA
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#define mmSPI_TMPRING_SIZE 0xA1BA
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#define mmSPI_VS_OUT_CONFIG 0xA1B1
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#define mmSQ_ALU_CLK_CTRL 0x2360
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#define mmSQ_BUF_RSRC_WORD0 0x23C0
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#define mmSQ_BUF_RSRC_WORD1 0x23C1
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#define mmSQ_BUF_RSRC_WORD2 0x23C2
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#define mmSQ_BUF_RSRC_WORD3 0x23C3
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#define mmSQC_CACHES 0x2302
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#define mmSQC_CONFIG 0x2301
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#define mmSQ_CONFIG 0x2300
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#define mmSQC_SECDED_CNT 0x23A0
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#define mmSQ_DEBUG_STS_GLOBAL 0x2309
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#define mmSQ_DED_CNT 0x23A2
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#define mmSQ_DED_INFO 0x23A3
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#define mmSQ_DS_0 0x237F
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#define mmSQ_DS_1 0x237F
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#define mmSQ_EXP_0 0x237F
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#define mmSQ_EXP_1 0x237F
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#define mmSQ_FIFO_SIZES 0x2305
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#define mmSQ_IMG_RSRC_WORD0 0x23C4
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#define mmSQ_IMG_RSRC_WORD1 0x23C5
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#define mmSQ_IMG_RSRC_WORD2 0x23C6
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#define mmSQ_IMG_RSRC_WORD3 0x23C7
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#define mmSQ_IMG_RSRC_WORD4 0x23C8
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#define mmSQ_IMG_RSRC_WORD5 0x23C9
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#define mmSQ_IMG_RSRC_WORD6 0x23CA
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#define mmSQ_IMG_RSRC_WORD7 0x23CB
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#define mmSQ_IMG_SAMP_WORD0 0x23CC
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#define mmSQ_IMG_SAMP_WORD1 0x23CD
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#define mmSQ_IMG_SAMP_WORD2 0x23CE
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#define mmSQ_IMG_SAMP_WORD3 0x23CF
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#define mmSQ_IND_CMD 0x237A
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#define mmSQ_IND_DATA 0x2379
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#define mmSQ_IND_INDEX 0x2378
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#define mmSQ_INST 0x237F
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#define mmSQ_LB_CTR_CTRL 0x2398
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#define mmSQ_LB_DATA_ALU_CYCLES 0x2399
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#define mmSQ_LB_DATA_ALU_STALLS 0x239B
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#define mmSQ_LB_DATA_TEX_CYCLES 0x239A
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#define mmSQ_LB_DATA_TEX_STALLS 0x239C
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#define mmSQ_MIMG_0 0x237F
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#define mmSQ_MIMG_1 0x237F
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#define mmSQ_MTBUF_0 0x237F
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#define mmSQ_MTBUF_1 0x237F
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#define mmSQ_MUBUF_0 0x237F
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#define mmSQ_MUBUF_1 0x237F
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#define mmSQ_PERFCOUNTER0_HI 0x2321
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#define mmSQ_PERFCOUNTER0_LO 0x2320
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#define mmSQ_PERFCOUNTER0_SELECT 0x2340
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#define mmSQ_PERFCOUNTER10_HI 0x2335
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#define mmSQ_PERFCOUNTER10_LO 0x2334
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#define mmSQ_PERFCOUNTER10_SELECT 0x234A
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#define mmSQ_PERFCOUNTER11_HI 0x2337
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#define mmSQ_PERFCOUNTER11_LO 0x2336
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#define mmSQ_PERFCOUNTER11_SELECT 0x234B
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#define mmSQ_PERFCOUNTER12_HI 0x2339
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#define mmSQ_PERFCOUNTER12_LO 0x2338
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#define mmSQ_PERFCOUNTER12_SELECT 0x234C
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#define mmSQ_PERFCOUNTER13_HI 0x233B
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#define mmSQ_PERFCOUNTER13_LO 0x233A
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#define mmSQ_PERFCOUNTER13_SELECT 0x234D
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#define mmSQ_PERFCOUNTER14_HI 0x233D
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#define mmSQ_PERFCOUNTER14_LO 0x233C
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#define mmSQ_PERFCOUNTER14_SELECT 0x234E
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#define mmSQ_PERFCOUNTER15_HI 0x233F
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#define mmSQ_PERFCOUNTER15_LO 0x233E
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#define mmSQ_PERFCOUNTER15_SELECT 0x234F
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#define mmSQ_PERFCOUNTER1_HI 0x2323
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#define mmSQ_PERFCOUNTER1_LO 0x2322
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#define mmSQ_PERFCOUNTER1_SELECT 0x2341
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#define mmSQ_PERFCOUNTER2_HI 0x2325
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#define mmSQ_PERFCOUNTER2_LO 0x2324
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#define mmSQ_PERFCOUNTER2_SELECT 0x2342
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#define mmSQ_PERFCOUNTER3_HI 0x2327
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#define mmSQ_PERFCOUNTER3_LO 0x2326
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#define mmSQ_PERFCOUNTER3_SELECT 0x2343
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#define mmSQ_PERFCOUNTER4_HI 0x2329
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#define mmSQ_PERFCOUNTER4_LO 0x2328
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#define mmSQ_PERFCOUNTER4_SELECT 0x2344
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#define mmSQ_PERFCOUNTER5_HI 0x232B
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#define mmSQ_PERFCOUNTER5_LO 0x232A
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#define mmSQ_PERFCOUNTER5_SELECT 0x2345
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#define mmSQ_PERFCOUNTER6_HI 0x232D
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#define mmSQ_PERFCOUNTER6_LO 0x232C
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#define mmSQ_PERFCOUNTER6_SELECT 0x2346
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#define mmSQ_PERFCOUNTER7_HI 0x232F
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#define mmSQ_PERFCOUNTER7_LO 0x232E
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#define mmSQ_PERFCOUNTER7_SELECT 0x2347
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#define mmSQ_PERFCOUNTER8_HI 0x2331
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#define mmSQ_PERFCOUNTER8_LO 0x2330
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#define mmSQ_PERFCOUNTER8_SELECT 0x2348
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#define mmSQ_PERFCOUNTER9_HI 0x2333
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#define mmSQ_PERFCOUNTER9_LO 0x2332
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#define mmSQ_PERFCOUNTER9_SELECT 0x2349
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#define mmSQ_PERFCOUNTER_CTRL 0x2306
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#define mmSQ_POWER_THROTTLE 0x2396
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#define mmSQ_POWER_THROTTLE2 0x2397
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#define mmSQ_RANDOM_WAVE_PRI 0x2303
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#define mmSQ_REG_CREDITS 0x2304
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#define mmSQ_SEC_CNT 0x23A1
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#define mmSQ_SMRD 0x237F
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#define mmSQ_SOP1 0x237F
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#define mmSQ_SOP2 0x237F
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#define mmSQ_SOPC 0x237F
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#define mmSQ_SOPK 0x237F
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#define mmSQ_SOPP 0x237F
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#define mmSQ_TEX_CLK_CTRL 0x2361
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#define mmSQ_THREAD_TRACE_BASE 0x2380
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#define mmSQ_THREAD_TRACE_CNTR 0x2390
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#define mmSQ_THREAD_TRACE_CTRL 0x238F
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#define mmSQ_THREAD_TRACE_HIWATER 0x2392
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#define mmSQ_THREAD_TRACE_MASK 0x2382
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#define mmSQ_THREAD_TRACE_MODE 0x238E
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#define mmSQ_THREAD_TRACE_PERF_MASK 0x2384
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#define mmSQ_THREAD_TRACE_SIZE 0x2381
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#define mmSQ_THREAD_TRACE_STATUS 0x238D
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#define mmSQ_THREAD_TRACE_TOKEN_MASK 0x2383
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#define mmSQ_THREAD_TRACE_USERDATA_0 0x2388
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#define mmSQ_THREAD_TRACE_USERDATA_1 0x2389
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#define mmSQ_THREAD_TRACE_USERDATA_2 0x238A
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#define mmSQ_THREAD_TRACE_USERDATA_3 0x238B
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#define mmSQ_THREAD_TRACE_WORD_CMN 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_EVENT 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_INST 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2 0x23B1
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#define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2 0x23B1
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#define mmSQ_THREAD_TRACE_WORD_ISSUE 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_MISC 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2 0x23B1
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#define mmSQ_THREAD_TRACE_WORD_REG_1_OF_2 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_REG_2_OF_2 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_TIME 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2 0x23B1
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#define mmSQ_THREAD_TRACE_WORD_WAVE 0x23B0
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#define mmSQ_THREAD_TRACE_WORD_WAVE_START 0x23B0
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#define mmSQ_THREAD_TRACE_WPTR 0x238C
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#define mmSQ_TIME_HI 0x237C
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#define mmSQ_TIME_LO 0x237D
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#define mmSQ_VINTRP 0x237F
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#define mmSQ_VOP1 0x237F
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#define mmSQ_VOP2 0x237F
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#define mmSQ_VOP3_0 0x237F
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#define mmSQ_VOP3_0_SDST_ENC 0x237F
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#define mmSQ_VOP3_1 0x237F
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#define mmSQ_VOPC 0x237F
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#define mmSX_DEBUG_1 0x2418
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#define mmSX_DEBUG_BUSY 0x2414
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#define mmSX_DEBUG_BUSY_2 0x2415
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#define mmSX_DEBUG_BUSY_3 0x2416
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#define mmSX_DEBUG_BUSY_4 0x2417
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#define mmSX_PERFCOUNTER0_HI 0x2421
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#define mmSX_PERFCOUNTER0_LO 0x2420
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#define mmSX_PERFCOUNTER0_SELECT 0x241C
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#define mmSX_PERFCOUNTER1_HI 0x2423
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#define mmSX_PERFCOUNTER1_LO 0x2422
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#define mmSX_PERFCOUNTER1_SELECT 0x241D
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#define mmSX_PERFCOUNTER2_HI 0x2425
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#define mmSX_PERFCOUNTER2_LO 0x2424
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#define mmSX_PERFCOUNTER2_SELECT 0x241E
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#define mmSX_PERFCOUNTER3_HI 0x2427
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#define mmSX_PERFCOUNTER3_LO 0x2426
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#define mmSX_PERFCOUNTER3_SELECT 0x241F
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#define mmTA_BC_BASE_ADDR 0xA020
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#define mmTA_CGTT_CTRL 0x2544
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#define mmTA_CNTL 0x2541
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#define mmTA_CNTL_AUX 0x2542
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#define mmTA_CS_BC_BASE_ADDR 0x2543
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#define mmTA_DEBUG_DATA 0x254D
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#define mmTA_DEBUG_INDEX 0x254C
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#define mmTA_PERFCOUNTER0_HI 0x2556
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#define mmTA_PERFCOUNTER0_LO 0x2555
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#define mmTA_PERFCOUNTER0_SELECT 0x2554
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#define mmTA_PERFCOUNTER1_HI 0x2562
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#define mmTA_PERFCOUNTER1_LO 0x2561
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#define mmTA_PERFCOUNTER1_SELECT 0x2560
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#define mmTA_SCRATCH 0x2564
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#define mmTA_STATUS 0x2548
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#define mmTCA_CGTT_SCLK_CTRL 0x2BC1
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#define mmTCA_CTRL 0x2BC0
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#define mmTCA_PERFCOUNTER0_HI 0x2BD2
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#define mmTCA_PERFCOUNTER0_LO 0x2BD1
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#define mmTCA_PERFCOUNTER0_SELECT 0x2BD0
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#define mmTCA_PERFCOUNTER1_HI 0x2BD5
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#define mmTCA_PERFCOUNTER1_LO 0x2BD4
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#define mmTCA_PERFCOUNTER1_SELECT 0x2BD3
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#define mmTCA_PERFCOUNTER2_HI 0x2BD8
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#define mmTCA_PERFCOUNTER2_LO 0x2BD7
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#define mmTCA_PERFCOUNTER2_SELECT 0x2BD6
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#define mmTCA_PERFCOUNTER3_HI 0x2BDB
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#define mmTCA_PERFCOUNTER3_LO 0x2BDA
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#define mmTCA_PERFCOUNTER3_SELECT 0x2BD9
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#define mmTCC_CGTT_SCLK_CTRL 0x2B81
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#define mmTCC_CTRL 0x2B80
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#define mmTCC_EDC_COUNTER 0x2B82
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#define mmTCC_PERFCOUNTER0_HI 0x2B92
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#define mmTCC_PERFCOUNTER0_LO 0x2B91
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#define mmTCC_PERFCOUNTER0_SELECT 0x2B90
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#define mmTCC_PERFCOUNTER1_HI 0x2B95
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#define mmTCC_PERFCOUNTER1_LO 0x2B94
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#define mmTCC_PERFCOUNTER1_SELECT 0x2B93
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#define mmTCC_PERFCOUNTER2_HI 0x2B98
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#define mmTCC_PERFCOUNTER2_LO 0x2B97
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#define mmTCC_PERFCOUNTER2_SELECT 0x2B96
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#define mmTCC_PERFCOUNTER3_HI 0x2B9B
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#define mmTCC_PERFCOUNTER3_LO 0x2B9A
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#define mmTCC_PERFCOUNTER3_SELECT 0x2B99
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#define mmTCI_CNTL_1 0x2B62
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#define mmTCI_CNTL_2 0x2B63
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#define mmTCI_STATUS 0x2B61
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#define mmTCP_ADDR_CONFIG 0x2B05
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#define mmTCP_BUFFER_ADDR_HASH_CNTL 0x2B16
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#define mmTCP_CHAN_STEER_HI 0x2B04
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#define mmTCP_CHAN_STEER_LO 0x2B03
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#define mmTCP_CNTL 0x2B02
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#define mmTCP_CREDIT 0x2B06
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#define mmTCP_EDC_COUNTER 0x2B17
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#define mmTCP_INVALIDATE 0x2B00
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#define mmTCP_PERFCOUNTER0_HI 0x2B0A
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#define mmTCP_PERFCOUNTER0_LO 0x2B0B
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#define mmTCP_PERFCOUNTER0_SELECT 0x2B09
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#define mmTCP_PERFCOUNTER1_HI 0x2B0D
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#define mmTCP_PERFCOUNTER1_LO 0x2B0E
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#define mmTCP_PERFCOUNTER1_SELECT 0x2B0C
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#define mmTCP_PERFCOUNTER2_HI 0x2B10
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#define mmTCP_PERFCOUNTER2_LO 0x2B11
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#define mmTCP_PERFCOUNTER2_SELECT 0x2B0F
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#define mmTCP_PERFCOUNTER3_HI 0x2B13
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#define mmTCP_PERFCOUNTER3_LO 0x2B14
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#define mmTCP_PERFCOUNTER3_SELECT 0x2B12
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#define mmTCP_STATUS 0x2B01
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#define mmTD_CGTT_CTRL 0x2527
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#define mmTD_CNTL 0x2525
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#define mmTD_DEBUG_DATA 0x2529
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#define mmTD_DEBUG_INDEX 0x2528
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#define mmTD_PERFCOUNTER0_HI 0x252E
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#define mmTD_PERFCOUNTER0_LO 0x252D
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#define mmTD_PERFCOUNTER0_SELECT 0x252C
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#define mmTD_SCRATCH 0x2530
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#define mmTD_STATUS 0x2526
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#define mmUSER_SQC_BANK_DISABLE 0x2308
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#define mmVGT_CACHE_INVALIDATION 0x2231
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#define mmVGT_CNTL_STATUS 0x223C
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#define mmVGT_DEBUG_CNTL 0x2238
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#define mmVGT_DEBUG_DATA 0x2239
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#define mmVGT_DMA_BASE 0xA1FA
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#define mmVGT_DMA_BASE_HI 0xA1F9
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#define mmVGT_DMA_DATA_FIFO_DEPTH 0x222D
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#define mmVGT_DMA_INDEX_TYPE 0xA29F
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#define mmVGT_DMA_MAX_SIZE 0xA29E
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#define mmVGT_DMA_NUM_INSTANCES 0xA2A2
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#define mmVGT_DMA_REQ_FIFO_DEPTH 0x222E
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#define mmVGT_DMA_SIZE 0xA29D
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#define mmVGT_DRAW_INIT_FIFO_DEPTH 0x222F
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#define mmVGT_DRAW_INITIATOR 0xA1FC
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#define mmVGT_ENHANCE 0xA294
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#define mmVGT_ESGS_RING_ITEMSIZE 0xA2AB
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#define mmVGT_ESGS_RING_SIZE 0x2232
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#define mmVGT_ES_PER_GS 0xA296
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#define mmVGT_EVENT_ADDRESS_REG 0xA1FE
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#define mmVGT_EVENT_INITIATOR 0xA2A4
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#define mmVGT_FIFO_DEPTHS 0x2234
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#define mmVGT_GROUP_DECR 0xA28B
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#define mmVGT_GROUP_FIRST_DECR 0xA28A
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#define mmVGT_GROUP_PRIM_TYPE 0xA289
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#define mmVGT_GROUP_VECT_0_CNTL 0xA28C
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#define mmVGT_GROUP_VECT_0_FMT_CNTL 0xA28E
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#define mmVGT_GROUP_VECT_1_CNTL 0xA28D
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#define mmVGT_GROUP_VECT_1_FMT_CNTL 0xA28F
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#define mmVGT_GS_INSTANCE_CNT 0xA2E4
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#define mmVGT_GS_MAX_VERT_OUT 0xA2CE
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#define mmVGT_GS_MODE 0xA290
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#define mmVGT_GS_OUT_PRIM_TYPE 0xA29B
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#define mmVGT_GS_PER_ES 0xA295
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#define mmVGT_GS_PER_VS 0xA297
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#define mmVGT_GS_VERTEX_REUSE 0x2235
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#define mmVGT_GS_VERT_ITEMSIZE 0xA2D7
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#define mmVGT_GS_VERT_ITEMSIZE_1 0xA2D8
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#define mmVGT_GS_VERT_ITEMSIZE_2 0xA2D9
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#define mmVGT_GS_VERT_ITEMSIZE_3 0xA2DA
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#define mmVGT_GSVS_RING_ITEMSIZE 0xA2AC
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#define mmVGT_GSVS_RING_OFFSET_1 0xA298
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#define mmVGT_GSVS_RING_OFFSET_2 0xA299
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#define mmVGT_GSVS_RING_OFFSET_3 0xA29A
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#define mmVGT_GSVS_RING_SIZE 0x2233
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#define mmVGT_HOS_CNTL 0xA285
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#define mmVGT_HOS_MAX_TESS_LEVEL 0xA286
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#define mmVGT_HOS_MIN_TESS_LEVEL 0xA287
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#define mmVGT_HOS_REUSE_DEPTH 0xA288
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#define mmVGT_HS_OFFCHIP_PARAM 0x226C
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#define mmVGT_IMMED_DATA 0xA1FD
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#define mmVGT_INDEX_TYPE 0x2257
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#define mmVGT_INDX_OFFSET 0xA102
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#define mmVGT_INSTANCE_STEP_RATE_0 0xA2A8
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#define mmVGT_INSTANCE_STEP_RATE_1 0xA2A9
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#define mmVGT_LAST_COPY_STATE 0x2230
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#define mmVGT_LS_HS_CONFIG 0xA2D6
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#define mmVGT_MAX_VTX_INDX 0xA100
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#define mmVGT_MC_LAT_CNTL 0x2236
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#define mmVGT_MIN_VTX_INDX 0xA101
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#define mmVGT_MULTI_PRIM_IB_RESET_EN 0xA2A5
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#define mmVGT_MULTI_PRIM_IB_RESET_INDX 0xA103
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#define mmVGT_NUM_INDICES 0x225C
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#define mmVGT_NUM_INSTANCES 0x225D
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#define mmVGT_OUT_DEALLOC_CNTL 0xA317
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#define mmVGT_OUTPUT_PATH_CNTL 0xA284
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#define mmVGT_PERFCOUNTER0_HI 0x224D
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#define mmVGT_PERFCOUNTER0_LO 0x224C
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#define mmVGT_PERFCOUNTER0_SELECT 0x2248
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#define mmVGT_PERFCOUNTER1_HI 0x224F
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#define mmVGT_PERFCOUNTER1_LO 0x224E
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#define mmVGT_PERFCOUNTER1_SELECT 0x2249
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#define mmVGT_PERFCOUNTER2_HI 0x2251
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#define mmVGT_PERFCOUNTER2_LO 0x2250
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#define mmVGT_PERFCOUNTER2_SELECT 0x224A
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#define mmVGT_PERFCOUNTER3_HI 0x2253
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#define mmVGT_PERFCOUNTER3_LO 0x2252
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#define mmVGT_PERFCOUNTER3_SELECT 0x224B
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#define mmVGT_PERFCOUNTER_SEID_MASK 0x2247
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#define mmVGT_PRIMITIVEID_EN 0xA2A1
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#define mmVGT_PRIMITIVEID_RESET 0xA2A3
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#define mmVGT_PRIMITIVE_TYPE 0x2256
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#define mmVGT_REUSE_OFF 0xA2AD
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#define mmVGT_SHADER_STAGES_EN 0xA2D5
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#define mmVGT_STRMOUT_BUFFER_CONFIG 0xA2E6
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#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x2258
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#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x2259
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#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x225A
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#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x225B
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#define mmVGT_STRMOUT_BUFFER_OFFSET_0 0xA2B7
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#define mmVGT_STRMOUT_BUFFER_OFFSET_1 0xA2BB
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#define mmVGT_STRMOUT_BUFFER_OFFSET_2 0xA2BF
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#define mmVGT_STRMOUT_BUFFER_OFFSET_3 0xA2C3
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#define mmVGT_STRMOUT_BUFFER_SIZE_0 0xA2B4
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#define mmVGT_STRMOUT_BUFFER_SIZE_1 0xA2B8
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#define mmVGT_STRMOUT_BUFFER_SIZE_2 0xA2BC
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#define mmVGT_STRMOUT_BUFFER_SIZE_3 0xA2C0
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#define mmVGT_STRMOUT_CONFIG 0xA2E5
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#define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0xA2CB
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#define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET 0xA2CA
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#define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0xA2CC
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#define mmVGT_STRMOUT_VTX_STRIDE_0 0xA2B5
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#define mmVGT_STRMOUT_VTX_STRIDE_1 0xA2B9
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#define mmVGT_STRMOUT_VTX_STRIDE_2 0xA2BD
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#define mmVGT_STRMOUT_VTX_STRIDE_3 0xA2C1
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#define mmVGT_SYS_CONFIG 0x2263
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#define mmVGT_TF_MEMORY_BASE 0x226E
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#define mmVGT_TF_PARAM 0xA2DB
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#define mmVGT_TF_RING_SIZE 0x2262
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#define mmVGT_VERTEX_REUSE_BLOCK_CNTL 0xA316
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#define mmVGT_VTX_CNT_EN 0xA2AE
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#define mmVGT_VTX_VECT_EJECT_REG 0x222C
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/* manually added from old sid.h */
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#define mmCB_PERFCOUNTER0_SELECT0 0x2688
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#define mmCB_PERFCOUNTER1_SELECT0 0x268A
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#define mmCB_PERFCOUNTER1_SELECT1 0x268B
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#define mmCB_PERFCOUNTER2_SELECT0 0x268C
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#define mmCB_PERFCOUNTER2_SELECT1 0x268D
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#define mmCB_PERFCOUNTER3_SELECT0 0x268E
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#define mmCB_PERFCOUNTER3_SELECT1 0x268F
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#define mmCP_COHER_CNTL2 0x217A
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#define mmCP_DEBUG 0x307F
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#define mmRLC_SERDES_MASTER_BUSY_0 0x3119
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#define mmRLC_SERDES_MASTER_BUSY_1 0x311A
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#define mmRLC_RL_BASE 0x30C1
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#define mmRLC_RL_SIZE 0x30C2
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#define mmRLC_UCODE_ADDR 0x30CB
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#define mmRLC_UCODE_DATA 0x30CC
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#define mmRLC_GCPM_GENERAL_3 0x311E
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#define mmRLC_SERDES_WR_MASTER_MASK_0 0x3115
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#define mmRLC_SERDES_WR_MASTER_MASK_1 0x3116
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#define mmRLC_TTOP_D 0x3105
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#define mmRLC_CLEAR_STATE_RESTORE_BASE 0x30C8
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#define mmRLC_PG_AO_CU_MASK 0x310B
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#define mmSPI_STATIC_THREAD_MGMT_3 0x243A
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#endif
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