/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef _DMUB_TRACE_BUFFER_H_
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#define _DMUB_TRACE_BUFFER_H_
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#include "dmub_types.h"
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#define LOAD_DMCU_FW 1
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#define LOAD_PHY_FW 2
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enum dmucb_trace_code {
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DMCUB__UNKNOWN,
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DMCUB__MAIN_BEGIN,
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DMCUB__PHY_INIT_BEGIN,
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DMCUB__PHY_FW_SRAM_LOAD_BEGIN,
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DMCUB__PHY_FW_SRAM_LOAD_END,
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DMCUB__PHY_INIT_POLL_DONE,
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DMCUB__PHY_INIT_END,
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DMCUB__DMCU_ERAM_LOAD_BEGIN,
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DMCUB__DMCU_ERAM_LOAD_END,
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DMCUB__DMCU_ISR_LOAD_BEGIN,
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DMCUB__DMCU_ISR_LOAD_END,
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DMCUB__MAIN_IDLE,
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DMCUB__PERF_TRACE,
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DMCUB__PG_DONE,
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};
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struct dmcub_trace_buf_entry {
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enum dmucb_trace_code trace_code;
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uint32_t tick_count;
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uint32_t param0;
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uint32_t param1;
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};
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#define TRACE_BUF_SIZE (1024) //1 kB
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#define PERF_TRACE_MAX_ENTRY ((TRACE_BUF_SIZE - 8)/sizeof(struct dmcub_trace_buf_entry))
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struct dmcub_trace_buf {
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uint32_t entry_count;
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uint32_t clk_freq;
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struct dmcub_trace_buf_entry entries[PERF_TRACE_MAX_ENTRY];
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};
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#endif /* _DMUB_TRACE_BUFFER_H_ */
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