/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
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* Synopsys DesignWare eDMA core driver
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*
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* Author: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
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*/
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#ifndef _DW_EDMA_CORE_H
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#define _DW_EDMA_CORE_H
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#include <linux/msi.h>
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#include <linux/dma/edma.h>
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#include "../virt-dma.h"
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#define EDMA_LL_SZ 24
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enum dw_edma_dir {
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EDMA_DIR_WRITE = 0,
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EDMA_DIR_READ
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};
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enum dw_edma_mode {
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EDMA_MODE_LEGACY = 0,
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EDMA_MODE_UNROLL
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};
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enum dw_edma_request {
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EDMA_REQ_NONE = 0,
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EDMA_REQ_STOP,
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EDMA_REQ_PAUSE
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};
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enum dw_edma_status {
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EDMA_ST_IDLE = 0,
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EDMA_ST_PAUSE,
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EDMA_ST_BUSY
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};
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struct dw_edma_chan;
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struct dw_edma_chunk;
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struct dw_edma_burst {
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struct list_head list;
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u64 sar;
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u64 dar;
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u32 sz;
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};
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struct dw_edma_region {
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phys_addr_t paddr;
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void __iomem *vaddr;
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size_t sz;
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};
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struct dw_edma_chunk {
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struct list_head list;
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struct dw_edma_chan *chan;
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struct dw_edma_burst *burst;
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u32 bursts_alloc;
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u8 cb;
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struct dw_edma_region ll_region; /* Linked list */
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};
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struct dw_edma_desc {
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struct virt_dma_desc vd;
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struct dw_edma_chan *chan;
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struct dw_edma_chunk *chunk;
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u32 chunks_alloc;
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u32 alloc_sz;
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u32 xfer_sz;
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};
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struct dw_edma_chan {
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struct virt_dma_chan vc;
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struct dw_edma_chip *chip;
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int id;
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enum dw_edma_dir dir;
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off_t ll_off;
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u32 ll_max;
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off_t dt_off;
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struct msi_msg msi;
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enum dw_edma_request request;
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enum dw_edma_status status;
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u8 configured;
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struct dma_slave_config config;
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};
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struct dw_edma_irq {
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struct msi_msg msi;
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u32 wr_mask;
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u32 rd_mask;
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struct dw_edma *dw;
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};
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struct dw_edma_core_ops {
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int (*irq_vector)(struct device *dev, unsigned int nr);
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};
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struct dw_edma {
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char name[20];
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struct dma_device wr_edma;
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u16 wr_ch_cnt;
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struct dma_device rd_edma;
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u16 rd_ch_cnt;
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struct dw_edma_region rg_region; /* Registers */
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struct dw_edma_region ll_region; /* Linked list */
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struct dw_edma_region dt_region; /* Data */
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struct dw_edma_irq *irq;
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int nr_irqs;
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u32 version;
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enum dw_edma_mode mode;
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struct dw_edma_chan *chan;
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const struct dw_edma_core_ops *ops;
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raw_spinlock_t lock; /* Only for legacy */
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};
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struct dw_edma_sg {
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struct scatterlist *sgl;
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unsigned int len;
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};
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struct dw_edma_cyclic {
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dma_addr_t paddr;
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size_t len;
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size_t cnt;
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};
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struct dw_edma_transfer {
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struct dma_chan *dchan;
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union dw_edma_xfer {
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struct dw_edma_sg sg;
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struct dw_edma_cyclic cyclic;
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} xfer;
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enum dma_transfer_direction direction;
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unsigned long flags;
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bool cyclic;
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};
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static inline
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struct dw_edma_chan *vc2dw_edma_chan(struct virt_dma_chan *vc)
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{
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return container_of(vc, struct dw_edma_chan, vc);
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}
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static inline
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struct dw_edma_chan *dchan2dw_edma_chan(struct dma_chan *dchan)
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{
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return vc2dw_edma_chan(to_virt_chan(dchan));
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}
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#endif /* _DW_EDMA_CORE_H */
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