/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2022 Rockchip Electronics Co. Ltd. */
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#ifndef __RK_CRYPTO_V3_H__
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#define __RK_CRYPTO_V3_H__
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#include <linux/platform_device.h>
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#include "rk_crypto_utils.h"
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struct rk_hw_crypto_v3_info {
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struct rk_hw_desc hw_desc;
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};
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#define RK_CRYPTO_V3_SOC_DATA_INIT(names) {\
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.crypto_ver = "CRYPTO V3.0.0.0 multi",\
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.use_soft_aes192 = false,\
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.valid_algs_name = (names),\
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.valid_algs_num = ARRAY_SIZE(names),\
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.hw_init = rk_hw_crypto_v3_init,\
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.hw_deinit = rk_hw_crypto_v3_deinit,\
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.hw_get_rsts = rk_hw_crypto_v3_get_rsts,\
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.hw_get_algts = rk_hw_crypto_v3_get_algts,\
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.hw_is_algo_valid = rk_hw_crypto_v3_algo_valid,\
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.hw_info_size = sizeof(struct rk_hw_crypto_v3_info),\
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.default_pka_offset = 0x0480,\
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.use_lli_chain = true,\
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}
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#if IS_ENABLED(CONFIG_CRYPTO_DEV_ROCKCHIP_V3)
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extern struct rk_crypto_algt rk_v3_ecb_sm4_alg;
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extern struct rk_crypto_algt rk_v3_cbc_sm4_alg;
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extern struct rk_crypto_algt rk_v3_xts_sm4_alg;
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extern struct rk_crypto_algt rk_v3_cfb_sm4_alg;
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extern struct rk_crypto_algt rk_v3_ofb_sm4_alg;
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extern struct rk_crypto_algt rk_v3_ctr_sm4_alg;
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extern struct rk_crypto_algt rk_v3_gcm_sm4_alg;
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extern struct rk_crypto_algt rk_v3_ecb_aes_alg;
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extern struct rk_crypto_algt rk_v3_cbc_aes_alg;
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extern struct rk_crypto_algt rk_v3_xts_aes_alg;
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extern struct rk_crypto_algt rk_v3_cfb_aes_alg;
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extern struct rk_crypto_algt rk_v3_ofb_aes_alg;
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extern struct rk_crypto_algt rk_v3_ctr_aes_alg;
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extern struct rk_crypto_algt rk_v3_gcm_aes_alg;
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extern struct rk_crypto_algt rk_v3_ecb_des_alg;
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extern struct rk_crypto_algt rk_v3_cbc_des_alg;
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extern struct rk_crypto_algt rk_v3_cfb_des_alg;
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extern struct rk_crypto_algt rk_v3_ofb_des_alg;
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extern struct rk_crypto_algt rk_v3_ecb_des3_ede_alg;
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extern struct rk_crypto_algt rk_v3_cbc_des3_ede_alg;
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extern struct rk_crypto_algt rk_v3_cfb_des3_ede_alg;
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extern struct rk_crypto_algt rk_v3_ofb_des3_ede_alg;
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extern struct rk_crypto_algt rk_v3_ahash_sha1;
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extern struct rk_crypto_algt rk_v3_ahash_sha224;
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extern struct rk_crypto_algt rk_v3_ahash_sha256;
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extern struct rk_crypto_algt rk_v3_ahash_sha384;
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extern struct rk_crypto_algt rk_v3_ahash_sha512;
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extern struct rk_crypto_algt rk_v3_ahash_md5;
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extern struct rk_crypto_algt rk_v3_ahash_sm3;
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extern struct rk_crypto_algt rk_v3_hmac_md5;
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extern struct rk_crypto_algt rk_v3_hmac_sha1;
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extern struct rk_crypto_algt rk_v3_hmac_sha256;
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extern struct rk_crypto_algt rk_v3_hmac_sha512;
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extern struct rk_crypto_algt rk_v3_hmac_sm3;
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/* Shared v2 version implementation */
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extern struct rk_crypto_algt rk_v2_asym_rsa;
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int rk_hw_crypto_v3_init(struct device *dev, void *hw_info);
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void rk_hw_crypto_v3_deinit(struct device *dev, void *hw_info);
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const char * const *rk_hw_crypto_v3_get_rsts(uint32_t *num);
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struct rk_crypto_algt **rk_hw_crypto_v3_get_algts(uint32_t *num);
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bool rk_hw_crypto_v3_algo_valid(struct rk_crypto_dev *rk_dev, struct rk_crypto_algt *aglt);
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#else
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static inline int rk_hw_crypto_v3_init(struct device *dev, void *hw_info) { return -EINVAL; }
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static inline void rk_hw_crypto_v3_deinit(struct device *dev, void *hw_info) {}
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static inline const char * const *rk_hw_crypto_v3_get_rsts(uint32_t *num) { return NULL; }
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static inline struct rk_crypto_algt **rk_hw_crypto_v3_get_algts(uint32_t *num) { return NULL; }
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static inline bool rk_hw_crypto_v3_algo_valid(struct rk_crypto_dev *rk_dev,
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struct rk_crypto_algt *aglt)
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{
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return false;
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}
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#endif /* end of IS_ENABLED(CONFIG_CRYPTO_DEV_ROCKCHIP_V3) */
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#endif /* end of __RK_CRYPTO_V3_H__ */
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