/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
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#ifndef __CC_SRAM_MGR_H__
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#define __CC_SRAM_MGR_H__
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#ifndef CC_CC_SRAM_SIZE
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#define CC_CC_SRAM_SIZE 4096
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#endif
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struct cc_drvdata;
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#define NULL_SRAM_ADDR ((u32)-1)
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/**
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* cc_sram_mgr_init() - Initializes SRAM pool.
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* The first X bytes of SRAM are reserved for ROM usage, hence, pool
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* starts right after X bytes.
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*
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* @drvdata: Associated device driver context
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*
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* Return:
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* Zero for success, negative value otherwise.
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*/
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int cc_sram_mgr_init(struct cc_drvdata *drvdata);
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/**
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* cc_sram_alloc() - Allocate buffer from SRAM pool.
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*
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* @drvdata: Associated device driver context
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* @size: The requested bytes to allocate
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*
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* Return:
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* Address offset in SRAM or NULL_SRAM_ADDR for failure.
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*/
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u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size);
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/**
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* cc_set_sram_desc() - Create const descriptors sequence to
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* set values in given array into SRAM.
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* Note: each const value can't exceed word size.
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*
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* @src: A pointer to array of words to set as consts.
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* @dst: The target SRAM buffer to set into
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* @nelement: The number of words in "src" array
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* @seq: A pointer to the given IN/OUT descriptor sequence
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* @seq_len: A pointer to the given IN/OUT sequence length
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*/
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void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement,
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struct cc_hw_desc *seq, unsigned int *seq_len);
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#endif /*__CC_SRAM_MGR_H__*/
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