/*
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* CPUFreq support for Armada 370/XP platforms.
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*
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* Copyright (C) 2012-2016 Marvell
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*
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* Yehuda Yitschak <yehuday@marvell.com>
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* Gregory Clement <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#define pr_fmt(fmt) "mvebu-pmsu: " fmt
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#include <linux/clk.h>
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/pm_opp.h>
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#include <linux/resource.h>
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static int __init armada_xp_pmsu_cpufreq_init(void)
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{
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struct device_node *np;
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struct resource res;
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int ret, cpu;
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if (!of_machine_is_compatible("marvell,armadaxp"))
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return 0;
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/*
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* In order to have proper cpufreq handling, we need to ensure
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* that the Device Tree description of the CPU clock includes
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* the definition of the PMU DFS registers. If not, we do not
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* register the clock notifier and the cpufreq driver. This
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* piece of code is only for compatibility with old Device
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* Trees.
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*/
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np = of_find_compatible_node(NULL, NULL, "marvell,armada-xp-cpu-clock");
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if (!np)
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return 0;
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ret = of_address_to_resource(np, 1, &res);
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if (ret) {
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pr_warn(FW_WARN "not enabling cpufreq, deprecated armada-xp-cpu-clock binding\n");
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of_node_put(np);
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return 0;
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}
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of_node_put(np);
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/*
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* For each CPU, this loop registers the operating points
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* supported (which are the nominal CPU frequency and half of
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* it), and registers the clock notifier that will take care
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* of doing the PMSU part of a frequency transition.
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*/
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for_each_possible_cpu(cpu) {
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struct device *cpu_dev;
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struct clk *clk;
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int ret;
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cpu_dev = get_cpu_device(cpu);
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if (!cpu_dev) {
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pr_err("Cannot get CPU %d\n", cpu);
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continue;
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}
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clk = clk_get(cpu_dev, NULL);
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if (IS_ERR(clk)) {
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pr_err("Cannot get clock for CPU %d\n", cpu);
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return PTR_ERR(clk);
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}
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ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk), 0);
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if (ret) {
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clk_put(clk);
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return ret;
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}
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ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk) / 2, 0);
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if (ret) {
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dev_pm_opp_remove(cpu_dev, clk_get_rate(clk));
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clk_put(clk);
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dev_err(cpu_dev, "Failed to register OPPs\n");
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return ret;
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}
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ret = dev_pm_opp_set_sharing_cpus(cpu_dev,
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cpumask_of(cpu_dev->id));
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if (ret)
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dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n",
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__func__, ret);
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clk_put(clk);
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}
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platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
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return 0;
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}
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device_initcall(armada_xp_pmsu_cpufreq_init);
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