# SPDX-License-Identifier: GPL-2.0-only
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config CLK_BAIKAL_T1
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bool "Baikal-T1 Clocks Control Unit interface"
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depends on (MIPS_BAIKAL_T1 && OF) || COMPILE_TEST
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default MIPS_BAIKAL_T1
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help
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Clocks Control Unit is the core of Baikal-T1 SoC System Controller
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responsible for the chip subsystems clocking and resetting. It
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consists of multiple global clock domains, which can be reset by
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means of the CCU control registers. These domains and devices placed
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in them are fed with clocks generated by a hierarchy of PLLs,
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configurable and fixed clock dividers. Enable this option to be able
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to select Baikal-T1 CCU PLLs and Dividers drivers.
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if CLK_BAIKAL_T1
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config CLK_BT1_CCU_PLL
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bool "Baikal-T1 CCU PLLs support"
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select MFD_SYSCON
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default MIPS_BAIKAL_T1
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help
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Enable this to support the PLLs embedded into the Baikal-T1 SoC
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System Controller. These are five PLLs placed at the root of the
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clocks hierarchy, right after an external reference oscillator
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(normally of 25MHz). They are used to generate high frequency
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signals, which are either directly wired to the consumers (like
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CPUs, DDR, etc.) or passed over the clock dividers to be only
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then used as an individual reference clock of a target device.
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config CLK_BT1_CCU_DIV
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bool "Baikal-T1 CCU Dividers support"
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select RESET_CONTROLLER
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select MFD_SYSCON
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default MIPS_BAIKAL_T1
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help
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Enable this to support the CCU dividers used to distribute clocks
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between AXI-bus and system devices coming from CCU PLLs of Baikal-T1
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SoC. CCU dividers can be either configurable or with fixed divider,
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either gateable or ungateable. Some of the CCU dividers can be as well
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used to reset the domains they're supplying clock to.
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endif
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