// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2005, Paul Mackerras, IBM Corporation.
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* Copyright 2009, Benjamin Herrenschmidt, IBM Corporation.
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* Copyright 2015-2016, Aneesh Kumar K.V, IBM Corporation.
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*/
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#include <linux/sched.h>
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#include <linux/mm_types.h>
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#include <linux/mm.h>
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#include <asm/sections.h>
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#include <asm/mmu.h>
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#include <asm/tlb.h>
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#include <mm/mmu_decl.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/thp.h>
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#if H_PGTABLE_RANGE > (USER_VSID_RANGE * (TASK_SIZE_USER64 / TASK_CONTEXT_SIZE))
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#warning Limited user VSID range means pagetable space is wasted
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#endif
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#ifdef CONFIG_SPARSEMEM_VMEMMAP
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/*
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* vmemmap is the starting address of the virtual address space where
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* struct pages are allocated for all possible PFNs present on the system
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* including holes and bad memory (hence sparse). These virtual struct
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* pages are stored in sequence in this virtual address space irrespective
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* of the fact whether the corresponding PFN is valid or not. This achieves
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* constant relationship between address of struct page and its PFN.
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*
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* During boot or memory hotplug operation when a new memory section is
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* added, physical memory allocation (including hash table bolting) will
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* be performed for the set of struct pages which are part of the memory
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* section. This saves memory by not allocating struct pages for PFNs
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* which are not valid.
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*
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* ----------------------------------------------
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* | PHYSICAL ALLOCATION OF VIRTUAL STRUCT PAGES|
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* ----------------------------------------------
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*
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* f000000000000000 c000000000000000
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* vmemmap +--------------+ +--------------+
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* + | page struct | +--------------> | page struct |
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* | +--------------+ +--------------+
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* | | page struct | +--------------> | page struct |
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* | +--------------+ | +--------------+
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* | | page struct | + +------> | page struct |
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* | +--------------+ | +--------------+
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* | | page struct | | +--> | page struct |
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* | +--------------+ | | +--------------+
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* | | page struct | | |
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* | +--------------+ | |
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* | | page struct | | |
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* | +--------------+ | |
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* | | page struct | | |
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* | +--------------+ | |
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* | | page struct | | |
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* | +--------------+ | |
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* | | page struct | +-------+ |
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* | +--------------+ |
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* | | page struct | +-----------+
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* | +--------------+
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* | | page struct | No mapping
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* | +--------------+
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* | | page struct | No mapping
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* v +--------------+
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*
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* -----------------------------------------
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* | RELATION BETWEEN STRUCT PAGES AND PFNS|
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* -----------------------------------------
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*
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* vmemmap +--------------+ +---------------+
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* + | page struct | +-------------> | PFN |
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* | +--------------+ +---------------+
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* | | page struct | +-------------> | PFN |
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* | +--------------+ +---------------+
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* | | page struct | +-------------> | PFN |
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* | +--------------+ +---------------+
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* | | page struct | +-------------> | PFN |
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* | +--------------+ +---------------+
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* | | |
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* | +--------------+
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* | | |
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* | +--------------+
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* | | |
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* | +--------------+ +---------------+
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* | | page struct | +-------------> | PFN |
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* | +--------------+ +---------------+
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* | | |
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* | +--------------+
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* | | |
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* | +--------------+ +---------------+
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* | | page struct | +-------------> | PFN |
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* | +--------------+ +---------------+
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* | | page struct | +-------------> | PFN |
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* v +--------------+ +---------------+
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*/
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/*
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* On hash-based CPUs, the vmemmap is bolted in the hash table.
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*
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*/
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int __meminit hash__vmemmap_create_mapping(unsigned long start,
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unsigned long page_size,
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unsigned long phys)
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{
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int rc;
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if ((start + page_size) >= H_VMEMMAP_END) {
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pr_warn("Outside the supported range\n");
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return -1;
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}
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rc = htab_bolt_mapping(start, start + page_size, phys,
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pgprot_val(PAGE_KERNEL),
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mmu_vmemmap_psize, mmu_kernel_ssize);
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if (rc < 0) {
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int rc2 = htab_remove_mapping(start, start + page_size,
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mmu_vmemmap_psize,
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mmu_kernel_ssize);
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BUG_ON(rc2 && (rc2 != -ENOENT));
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}
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return rc;
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}
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#ifdef CONFIG_MEMORY_HOTPLUG
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void hash__vmemmap_remove_mapping(unsigned long start,
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unsigned long page_size)
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{
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int rc = htab_remove_mapping(start, start + page_size,
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mmu_vmemmap_psize,
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mmu_kernel_ssize);
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BUG_ON((rc < 0) && (rc != -ENOENT));
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WARN_ON(rc == -ENOENT);
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}
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#endif
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#endif /* CONFIG_SPARSEMEM_VMEMMAP */
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/*
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* map_kernel_page currently only called by __ioremap
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* map_kernel_page adds an entry to the ioremap page table
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* and adds an entry to the HPT, possibly bolting it
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*/
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int hash__map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot)
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{
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pgd_t *pgdp;
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p4d_t *p4dp;
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pud_t *pudp;
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pmd_t *pmdp;
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pte_t *ptep;
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BUILD_BUG_ON(TASK_SIZE_USER64 > H_PGTABLE_RANGE);
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if (slab_is_available()) {
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pgdp = pgd_offset_k(ea);
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p4dp = p4d_offset(pgdp, ea);
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pudp = pud_alloc(&init_mm, p4dp, ea);
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if (!pudp)
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return -ENOMEM;
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pmdp = pmd_alloc(&init_mm, pudp, ea);
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if (!pmdp)
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return -ENOMEM;
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ptep = pte_alloc_kernel(pmdp, ea);
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if (!ptep)
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return -ENOMEM;
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set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT, prot));
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} else {
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/*
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* If the mm subsystem is not fully up, we cannot create a
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* linux page table entry for this mapping. Simply bolt an
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* entry in the hardware page table.
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*
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*/
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if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, pgprot_val(prot),
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mmu_io_psize, mmu_kernel_ssize)) {
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printk(KERN_ERR "Failed to do bolted mapping IO "
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"memory at %016lx !\n", pa);
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return -ENOMEM;
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}
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}
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smp_wmb();
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return 0;
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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unsigned long hash__pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
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pmd_t *pmdp, unsigned long clr,
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unsigned long set)
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{
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__be64 old_be, tmp;
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unsigned long old;
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#ifdef CONFIG_DEBUG_VM
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WARN_ON(!hash__pmd_trans_huge(*pmdp) && !pmd_devmap(*pmdp));
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assert_spin_locked(pmd_lockptr(mm, pmdp));
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#endif
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__asm__ __volatile__(
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"1: ldarx %0,0,%3\n\
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and. %1,%0,%6\n\
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bne- 1b \n\
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andc %1,%0,%4 \n\
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or %1,%1,%7\n\
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stdcx. %1,0,%3 \n\
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bne- 1b"
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: "=&r" (old_be), "=&r" (tmp), "=m" (*pmdp)
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: "r" (pmdp), "r" (cpu_to_be64(clr)), "m" (*pmdp),
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"r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set))
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: "cc" );
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old = be64_to_cpu(old_be);
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trace_hugepage_update(addr, old, clr, set);
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if (old & H_PAGE_HASHPTE)
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hpte_do_hugepage_flush(mm, addr, pmdp, old);
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return old;
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}
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pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long address,
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pmd_t *pmdp)
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{
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pmd_t pmd;
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VM_BUG_ON(address & ~HPAGE_PMD_MASK);
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VM_BUG_ON(pmd_trans_huge(*pmdp));
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VM_BUG_ON(pmd_devmap(*pmdp));
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pmd = *pmdp;
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pmd_clear(pmdp);
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/*
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* Wait for all pending hash_page to finish. This is needed
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* in case of subpage collapse. When we collapse normal pages
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* to hugepage, we first clear the pmd, then invalidate all
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* the PTE entries. The assumption here is that any low level
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* page fault will see a none pmd and take the slow path that
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* will wait on mmap_lock. But we could very well be in a
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* hash_page with local ptep pointer value. Such a hash page
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* can result in adding new HPTE entries for normal subpages.
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* That means we could be modifying the page content as we
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* copy them to a huge page. So wait for parallel hash_page
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* to finish before invalidating HPTE entries. We can do this
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* by sending an IPI to all the cpus and executing a dummy
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* function there.
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*/
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serialize_against_pte_lookup(vma->vm_mm);
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/*
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* Now invalidate the hpte entries in the range
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* covered by pmd. This make sure we take a
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* fault and will find the pmd as none, which will
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* result in a major fault which takes mmap_lock and
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* hence wait for collapse to complete. Without this
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* the __collapse_huge_page_copy can result in copying
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* the old content.
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*/
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flush_tlb_pmd_range(vma->vm_mm, &pmd, address);
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return pmd;
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}
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/*
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* We want to put the pgtable in pmd and use pgtable for tracking
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* the base page size hptes
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*/
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void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
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pgtable_t pgtable)
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{
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pgtable_t *pgtable_slot;
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assert_spin_locked(pmd_lockptr(mm, pmdp));
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/*
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* we store the pgtable in the second half of PMD
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*/
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pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
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*pgtable_slot = pgtable;
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/*
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* expose the deposited pgtable to other cpus.
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* before we set the hugepage PTE at pmd level
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* hash fault code looks at the deposted pgtable
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* to store hash index values.
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*/
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smp_wmb();
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}
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pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
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{
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pgtable_t pgtable;
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pgtable_t *pgtable_slot;
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assert_spin_locked(pmd_lockptr(mm, pmdp));
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pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
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pgtable = *pgtable_slot;
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/*
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* Once we withdraw, mark the entry NULL.
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*/
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*pgtable_slot = NULL;
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/*
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* We store HPTE information in the deposited PTE fragment.
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* zero out the content on withdraw.
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*/
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memset(pgtable, 0, PTE_FRAG_SIZE);
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return pgtable;
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}
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/*
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* A linux hugepage PMD was changed and the corresponding hash table entries
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* neesd to be flushed.
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*/
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void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
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pmd_t *pmdp, unsigned long old_pmd)
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{
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int ssize;
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unsigned int psize;
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unsigned long vsid;
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unsigned long flags = 0;
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/* get the base page size,vsid and segment size */
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#ifdef CONFIG_DEBUG_VM
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psize = get_slice_psize(mm, addr);
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BUG_ON(psize == MMU_PAGE_16M);
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#endif
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if (old_pmd & H_PAGE_COMBO)
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psize = MMU_PAGE_4K;
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else
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psize = MMU_PAGE_64K;
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if (!is_kernel_addr(addr)) {
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ssize = user_segment_size(addr);
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vsid = get_user_vsid(&mm->context, addr, ssize);
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WARN_ON(vsid == 0);
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} else {
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vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
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ssize = mmu_kernel_ssize;
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}
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if (mm_is_thread_local(mm))
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flags |= HPTE_LOCAL_UPDATE;
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return flush_hash_hugepage(vsid, addr, pmdp, psize, ssize, flags);
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}
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pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm,
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unsigned long addr, pmd_t *pmdp)
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{
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pmd_t old_pmd;
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pgtable_t pgtable;
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unsigned long old;
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pgtable_t *pgtable_slot;
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old = pmd_hugepage_update(mm, addr, pmdp, ~0UL, 0);
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old_pmd = __pmd(old);
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/*
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* We have pmd == none and we are holding page_table_lock.
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* So we can safely go and clear the pgtable hash
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* index info.
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*/
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pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
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pgtable = *pgtable_slot;
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/*
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* Let's zero out old valid and hash index details
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* hash fault look at them.
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*/
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memset(pgtable, 0, PTE_FRAG_SIZE);
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return old_pmd;
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}
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int hash__has_transparent_hugepage(void)
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{
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if (!mmu_has_feature(MMU_FTR_16M_PAGE))
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return 0;
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/*
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* We support THP only if PMD_SIZE is 16MB.
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*/
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if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT)
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return 0;
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/*
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* We need to make sure that we support 16MB hugepage in a segement
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* with base page size 64K or 4K. We only enable THP with a PAGE_SIZE
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* of 64K.
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*/
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/*
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* If we have 64K HPTE, we will be using that by default
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*/
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if (mmu_psize_defs[MMU_PAGE_64K].shift &&
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(mmu_psize_defs[MMU_PAGE_64K].penc[MMU_PAGE_16M] == -1))
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return 0;
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/*
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* Ok we only have 4K HPTE
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*/
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if (mmu_psize_defs[MMU_PAGE_4K].penc[MMU_PAGE_16M] == -1)
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return 0;
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return 1;
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}
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EXPORT_SYMBOL_GPL(hash__has_transparent_hugepage);
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#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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#ifdef CONFIG_STRICT_KERNEL_RWX
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static bool hash__change_memory_range(unsigned long start, unsigned long end,
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unsigned long newpp)
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{
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unsigned long idx;
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unsigned int step, shift;
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shift = mmu_psize_defs[mmu_linear_psize].shift;
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step = 1 << shift;
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start = ALIGN_DOWN(start, step);
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end = ALIGN(end, step); // aligns up
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if (start >= end)
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return false;
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pr_debug("Changing page protection on range 0x%lx-0x%lx, to 0x%lx, step 0x%x\n",
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start, end, newpp, step);
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for (idx = start; idx < end; idx += step)
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/* Not sure if we can do much with the return value */
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mmu_hash_ops.hpte_updateboltedpp(newpp, idx, mmu_linear_psize,
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mmu_kernel_ssize);
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return true;
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}
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void hash__mark_rodata_ro(void)
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{
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unsigned long start, end;
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start = (unsigned long)_stext;
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end = (unsigned long)__init_begin;
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WARN_ON(!hash__change_memory_range(start, end, PP_RXXX));
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}
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void hash__mark_initmem_nx(void)
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{
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unsigned long start, end, pp;
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start = (unsigned long)__init_begin;
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end = (unsigned long)__init_end;
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pp = htab_convert_pte_flags(pgprot_val(PAGE_KERNEL));
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WARN_ON(!hash__change_memory_range(start, end, pp));
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}
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#endif
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