/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef _POWERPC_PROM_H
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#define _POWERPC_PROM_H
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#ifdef __KERNEL__
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/*
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* Definitions for talking to the Open Firmware PROM on
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* Power Macintosh computers.
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*
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* Copyright (C) 1996-2005 Paul Mackerras.
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*
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* Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
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*/
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#include <linux/types.h>
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#include <asm/irq.h>
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#include <linux/atomic.h>
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/* These includes should be removed once implicit includes are cleaned up. */
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
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#define OF_DT_END_NODE 0x2 /* End node */
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#define OF_DT_PROP 0x3 /* Property: name off, size,
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* content */
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#define OF_DT_NOP 0x4 /* nop */
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#define OF_DT_END 0x9
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#define OF_DT_VERSION 0x10
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/*
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* This is what gets passed to the kernel by prom_init or kexec
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*
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* The dt struct contains the device tree structure, full pathes and
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* property contents. The dt strings contain a separate block with just
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* the strings for the property names, and is fully page aligned and
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* self contained in a page, so that it can be kept around by the kernel,
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* each property name appears only once in this page (cheap compression)
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*
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* the mem_rsvmap contains a map of reserved ranges of physical memory,
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* passing it here instead of in the device-tree itself greatly simplifies
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* the job of everybody. It's just a list of u64 pairs (base/size) that
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* ends when size is 0
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*/
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struct boot_param_header {
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__be32 magic; /* magic word OF_DT_HEADER */
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__be32 totalsize; /* total size of DT block */
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__be32 off_dt_struct; /* offset to structure */
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__be32 off_dt_strings; /* offset to strings */
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__be32 off_mem_rsvmap; /* offset to memory reserve map */
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__be32 version; /* format version */
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__be32 last_comp_version; /* last compatible version */
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/* version 2 fields below */
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__be32 boot_cpuid_phys; /* Physical CPU id we're booting on */
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/* version 3 fields below */
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__be32 dt_strings_size; /* size of the DT strings block */
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/* version 17 fields below */
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__be32 dt_struct_size; /* size of the DT structure block */
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};
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/*
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* OF address retreival & translation
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*/
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/* Parse the ibm,dma-window property of an OF node into the busno, phys and
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* size parameters.
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*/
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void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
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unsigned long *busno, unsigned long *phys,
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unsigned long *size);
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extern void of_instantiate_rtc(void);
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extern int of_get_ibm_chip_id(struct device_node *np);
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struct of_drc_info {
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char *drc_type;
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char *drc_name_prefix;
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u32 drc_index_start;
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u32 drc_name_suffix_start;
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u32 num_sequential_elems;
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u32 sequential_inc;
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u32 drc_power_domain;
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u32 last_drc_index;
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};
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extern int of_read_drc_info_cell(struct property **prop,
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const __be32 **curval, struct of_drc_info *data);
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/*
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* There are two methods for telling firmware what our capabilities are.
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* Newer machines have an "ibm,client-architecture-support" method on the
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* root node. For older machines, we have to call the "process-elf-header"
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* method in the /packages/elf-loader node, passing it a fake 32-bit
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* ELF header containing a couple of PT_NOTE sections that contain
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* structures that contain various information.
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*/
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/* New method - extensible architecture description vector. */
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/* Option vector bits - generic bits in byte 1 */
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#define OV_IGNORE 0x80 /* ignore this vector */
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#define OV_CESSATION_POLICY 0x40 /* halt if unsupported option present*/
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/* Option vector 1: processor architectures supported */
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#define OV1_PPC_2_00 0x80 /* set if we support PowerPC 2.00 */
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#define OV1_PPC_2_01 0x40 /* set if we support PowerPC 2.01 */
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#define OV1_PPC_2_02 0x20 /* set if we support PowerPC 2.02 */
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#define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
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#define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
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#define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
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#define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */
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#define OV1_PPC_2_07 0x01 /* set if we support PowerPC 2.07 */
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#define OV1_PPC_3_00 0x80 /* set if we support PowerPC 3.00 */
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#define OV1_PPC_3_1 0x40 /* set if we support PowerPC 3.1 */
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/* Option vector 2: Open Firmware options supported */
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#define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
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/* Option vector 3: processor options supported */
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#define OV3_FP 0x80 /* floating point */
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#define OV3_VMX 0x40 /* VMX/Altivec */
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#define OV3_DFP 0x20 /* decimal FP */
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/* Option vector 4: IBM PAPR implementation */
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#define OV4_MIN_ENT_CAP 0x01 /* minimum VP entitled capacity */
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/* Option vector 5: PAPR/OF options supported
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* These bits are also used in firmware_has_feature() to validate
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* the capabilities reported for vector 5 in the device tree so we
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* encode the vector index in the define and use the OV5_FEAT()
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* and OV5_INDX() macros to extract the desired information.
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*/
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#define OV5_FEAT(x) ((x) & 0xff)
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#define OV5_INDX(x) ((x) >> 8)
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#define OV5_LPAR 0x0280 /* logical partitioning supported */
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#define OV5_SPLPAR 0x0240 /* shared-processor LPAR supported */
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/* ibm,dynamic-reconfiguration-memory property supported */
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#define OV5_DRCONF_MEMORY 0x0220
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#define OV5_LARGE_PAGES 0x0210 /* large pages supported */
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#define OV5_DONATE_DEDICATE_CPU 0x0202 /* donate dedicated CPU support */
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#define OV5_MSI 0x0201 /* PCIe/MSI support */
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#define OV5_CMO 0x0480 /* Cooperative Memory Overcommitment */
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#define OV5_XCMO 0x0440 /* Page Coalescing */
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#define OV5_FORM1_AFFINITY 0x0580 /* FORM1 NUMA affinity */
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#define OV5_PRRN 0x0540 /* Platform Resource Reassignment */
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#define OV5_FORM2_AFFINITY 0x0520 /* Form2 NUMA affinity */
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#define OV5_HP_EVT 0x0604 /* Hot Plug Event support */
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#define OV5_RESIZE_HPT 0x0601 /* Hash Page Table resizing */
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#define OV5_PFO_HW_RNG 0x1180 /* PFO Random Number Generator */
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#define OV5_PFO_HW_842 0x1140 /* PFO Compression Accelerator */
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#define OV5_PFO_HW_ENCR 0x1120 /* PFO Encryption Accelerator */
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#define OV5_SUB_PROCESSORS 0x1501 /* 1,2,or 4 Sub-Processors supported */
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#define OV5_DRMEM_V2 0x1680 /* ibm,dynamic-reconfiguration-v2 */
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#define OV5_XIVE_SUPPORT 0x17C0 /* XIVE Exploitation Support Mask */
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#define OV5_XIVE_LEGACY 0x1700 /* XIVE legacy mode Only */
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#define OV5_XIVE_EXPLOIT 0x1740 /* XIVE exploitation mode Only */
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#define OV5_XIVE_EITHER 0x1780 /* XIVE legacy or exploitation mode */
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/* MMU Base Architecture */
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#define OV5_MMU_SUPPORT 0x18C0 /* MMU Mode Support Mask */
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#define OV5_MMU_HASH 0x1800 /* Hash MMU Only */
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#define OV5_MMU_RADIX 0x1840 /* Radix MMU Only */
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#define OV5_MMU_EITHER 0x1880 /* Hash or Radix Supported */
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#define OV5_MMU_DYNAMIC 0x18C0 /* Hash or Radix Can Switch Later */
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#define OV5_NMMU 0x1820 /* Nest MMU Available */
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/* Hash Table Extensions */
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#define OV5_HASH_SEG_TBL 0x1980 /* In Memory Segment Tables Available */
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#define OV5_HASH_GTSE 0x1940 /* Guest Translation Shoot Down Avail */
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/* Radix Table Extensions */
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#define OV5_RADIX_GTSE 0x1A40 /* Guest Translation Shoot Down Avail */
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#define OV5_DRC_INFO 0x1640 /* Redef Prop Structures: drc-info */
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/* Option Vector 6: IBM PAPR hints */
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#define OV6_LINUX 0x02 /* Linux is our OS */
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#endif /* __KERNEL__ */
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#endif /* _POWERPC_PROM_H */
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