// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright © 2011 Tony Breeds IBM Corporation
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*
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* Based on earlier code:
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* Copyright (C) Paul Mackerras 1997.
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*
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* Matt Porter <mporter@kernel.crashing.org>
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* Copyright 2002-2005 MontaVista Software Inc.
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*
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* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
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* Copyright (c) 2003, 2004 Zultys Technologies
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*
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* Copyright 2007 David Gibson, IBM Corporation.
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* Copyright 2010 Ben. Herrenschmidt, IBM Corporation.
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* Copyright © 2011 David Kleikamp IBM Corporation
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*/
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#include <stdarg.h>
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#include <stddef.h>
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#include "types.h"
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#include "elf.h"
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#include "string.h"
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#include "stdio.h"
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#include "page.h"
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#include "ops.h"
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#include "reg.h"
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#include "io.h"
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#include "dcr.h"
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#include "4xx.h"
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#include "44x.h"
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#include "libfdt.h"
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BSS_STACK(4096);
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#define MAX_RANKS 0x4
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#define DDR3_MR0CF 0x80010011U
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static unsigned long long ibm_currituck_memsize;
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static unsigned long long ibm_currituck_detect_memsize(void)
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{
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u32 reg;
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unsigned i;
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unsigned long long memsize = 0;
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for(i = 0; i < MAX_RANKS; i++){
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reg = mfdcrx(DDR3_MR0CF + i);
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if (!(reg & 1))
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continue;
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reg &= 0x0000f000;
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reg >>= 12;
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memsize += (0x800000ULL << reg);
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}
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return memsize;
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}
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static void ibm_currituck_fixups(void)
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{
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void *devp = finddevice("/");
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u32 dma_ranges[7];
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dt_fixup_memory(0x0ULL, ibm_currituck_memsize);
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while ((devp = find_node_by_devtype(devp, "pci"))) {
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if (getprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)) < 0) {
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printf("%s: Failed to get dma-ranges\r\n", __func__);
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continue;
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}
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dma_ranges[5] = ibm_currituck_memsize >> 32;
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dma_ranges[6] = ibm_currituck_memsize & 0xffffffffUL;
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setprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges));
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}
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}
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#define SPRN_PIR 0x11E /* Processor Identification Register */
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void platform_init(void)
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{
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unsigned long end_of_ram, avail_ram;
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u32 pir_reg;
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int node, size;
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const u32 *timebase;
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ibm_currituck_memsize = ibm_currituck_detect_memsize();
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if (ibm_currituck_memsize >> 32)
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end_of_ram = ~0UL;
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else
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end_of_ram = ibm_currituck_memsize;
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avail_ram = end_of_ram - (unsigned long)_end;
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simple_alloc_init(_end, avail_ram, 128, 64);
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platform_ops.fixups = ibm_currituck_fixups;
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platform_ops.exit = ibm44x_dbcr_reset;
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pir_reg = mfspr(SPRN_PIR);
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/* Make sure FDT blob is sane */
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if (fdt_check_header(_dtb_start) != 0)
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fatal("Invalid device tree blob\n");
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node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
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"cpu", sizeof("cpu"));
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if (!node)
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fatal("Cannot find cpu node\n");
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timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size);
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if (timebase && (size == 4))
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timebase_period_ns = 1000000000 / *timebase;
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fdt_set_boot_cpuid_phys(_dtb_start, pir_reg);
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fdt_init(_dtb_start);
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serial_console_init();
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}
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