/*
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* T1040RDB Device Tree Source
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*
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* Copyright 2014 - 2015 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/include/ "t104xsi-pre.dtsi"
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/include/ "t104xrdb.dtsi"
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/ {
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model = "fsl,T1040RDB";
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compatible = "fsl,T1040RDB";
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aliases {
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phy_sgmii_2 = &phy_sgmii_2;
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};
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soc@ffe000000 {
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fman@400000 {
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ethernet@e0000 {
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fixed-link = <0 1 1000 0 0>;
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phy-connection-type = "sgmii";
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};
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ethernet@e2000 {
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fixed-link = <1 1 1000 0 0>;
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phy-connection-type = "sgmii";
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};
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ethernet@e4000 {
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phy-handle = <&phy_sgmii_2>;
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phy-connection-type = "sgmii";
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};
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mdio@fc000 {
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phy_sgmii_2: ethernet-phy@3 {
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reg = <0x03>;
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};
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/* VSC8514 QSGMII PHY */
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phy_qsgmii_0: ethernet-phy@4 {
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reg = <0x4>;
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};
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phy_qsgmii_1: ethernet-phy@5 {
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reg = <0x5>;
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};
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phy_qsgmii_2: ethernet-phy@6 {
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reg = <0x6>;
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};
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phy_qsgmii_3: ethernet-phy@7 {
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reg = <0x7>;
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};
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/* VSC8514 QSGMII PHY */
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phy_qsgmii_4: ethernet-phy@8 {
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reg = <0x8>;
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};
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phy_qsgmii_5: ethernet-phy@9 {
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reg = <0x9>;
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};
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phy_qsgmii_6: ethernet-phy@a {
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reg = <0xa>;
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};
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phy_qsgmii_7: ethernet-phy@b {
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reg = <0xb>;
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};
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};
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};
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};
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ifc: localbus@ffe124000 {
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cpld@3,0 {
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compatible = "fsl,t1040rdb-cpld";
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};
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};
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};
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#include "t1040si-post.dtsi"
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&seville_switch {
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status = "okay";
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};
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&seville_port0 {
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managed = "in-band-status";
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phy-handle = <&phy_qsgmii_0>;
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phy-mode = "qsgmii";
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label = "ETH3";
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status = "okay";
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};
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&seville_port1 {
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managed = "in-band-status";
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phy-handle = <&phy_qsgmii_1>;
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phy-mode = "qsgmii";
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label = "ETH4";
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status = "okay";
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};
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&seville_port2 {
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managed = "in-band-status";
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phy-handle = <&phy_qsgmii_2>;
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phy-mode = "qsgmii";
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label = "ETH5";
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status = "okay";
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};
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&seville_port3 {
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managed = "in-band-status";
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phy-handle = <&phy_qsgmii_3>;
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phy-mode = "qsgmii";
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label = "ETH6";
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status = "okay";
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};
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&seville_port4 {
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managed = "in-band-status";
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phy-handle = <&phy_qsgmii_4>;
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phy-mode = "qsgmii";
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label = "ETH7";
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status = "okay";
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};
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&seville_port5 {
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managed = "in-band-status";
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phy-handle = <&phy_qsgmii_5>;
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phy-mode = "qsgmii";
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label = "ETH8";
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status = "okay";
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};
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&seville_port6 {
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managed = "in-band-status";
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phy-handle = <&phy_qsgmii_6>;
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phy-mode = "qsgmii";
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label = "ETH9";
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status = "okay";
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};
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&seville_port7 {
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managed = "in-band-status";
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phy-handle = <&phy_qsgmii_7>;
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phy-mode = "qsgmii";
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label = "ETH10";
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status = "okay";
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};
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&seville_port8 {
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ethernet = <&enet0>;
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status = "okay";
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};
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