/*
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* QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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mpic: pic@40000 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <4>;
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reg = <0x40000 0x40000>;
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compatible = "fsl,mpic";
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device_type = "open-pic";
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clock-frequency = <0x0>;
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};
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timer@41100 {
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compatible = "fsl,mpic-global-timer";
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reg = <0x41100 0x100 0x41300 4>;
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interrupts = <0 0 3 0
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1 0 3 0
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2 0 3 0
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3 0 3 0>;
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};
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msi0: msi@41600 {
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compatible = "fsl,mpic-msi-v4.3";
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reg = <0x41600 0x200 0x44148 4>;
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interrupts = <
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0xe0 0 0 0
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0xe1 0 0 0
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0xe2 0 0 0
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0xe3 0 0 0
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0xe4 0 0 0
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0xe5 0 0 0
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0xe6 0 0 0
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0xe7 0 0 0
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0x100 0 0 0
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0x101 0 0 0
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0x102 0 0 0
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0x103 0 0 0
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0x104 0 0 0
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0x105 0 0 0
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0x106 0 0 0
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0x107 0 0 0>;
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};
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msi1: msi@41800 {
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compatible = "fsl,mpic-msi-v4.3";
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reg = <0x41800 0x200 0x45148 4>;
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interrupts = <
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0xe8 0 0 0
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0xe9 0 0 0
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0xea 0 0 0
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0xeb 0 0 0
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0xec 0 0 0
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0xed 0 0 0
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0xee 0 0 0
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0xef 0 0 0
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0x108 0 0 0
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0x109 0 0 0
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0x10a 0 0 0
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0x10b 0 0 0
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0x10c 0 0 0
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0x10d 0 0 0
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0x10e 0 0 0
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0x10f 0 0 0>;
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};
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msi2: msi@41a00 {
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compatible = "fsl,mpic-msi-v4.3";
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reg = <0x41a00 0x200 0x46148 4>;
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interrupts = <
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0xf0 0 0 0
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0xf1 0 0 0
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0xf2 0 0 0
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0xf3 0 0 0
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0xf4 0 0 0
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0xf5 0 0 0
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0xf6 0 0 0
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0xf7 0 0 0
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0x110 0 0 0
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0x111 0 0 0
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0x112 0 0 0
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0x113 0 0 0
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0x114 0 0 0
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0x115 0 0 0
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0x116 0 0 0
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0x117 0 0 0>;
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};
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msi3: msi@41c00 {
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compatible = "fsl,mpic-msi-v4.3";
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reg = <0x41c00 0x200 0x47148 4>;
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interrupts = <
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0xf8 0 0 0
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0xf9 0 0 0
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0xfa 0 0 0
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0xfb 0 0 0
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0xfc 0 0 0
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0xfd 0 0 0
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0xfe 0 0 0
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0xff 0 0 0
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0x118 0 0 0
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0x119 0 0 0
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0x11a 0 0 0
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0x11b 0 0 0
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0x11c 0 0 0
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0x11d 0 0 0
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0x11e 0 0 0
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0x11f 0 0 0>;
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};
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timer@42100 {
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compatible = "fsl,mpic-global-timer";
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reg = <0x42100 0x100 0x42300 4>;
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interrupts = <4 0 3 0
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5 0 3 0
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6 0 3 0
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7 0 3 0>;
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};
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