// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/dma-map-ops.h>
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#include <linux/cache.h>
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#include <linux/highmem.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/proc-fns.h>
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static inline void cache_op(phys_addr_t paddr, size_t size,
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void (*fn)(unsigned long start, unsigned long end))
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{
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struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
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unsigned offset = paddr & ~PAGE_MASK;
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size_t left = size;
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unsigned long start;
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do {
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size_t len = left;
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if (PageHighMem(page)) {
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void *addr;
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if (offset + len > PAGE_SIZE) {
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if (offset >= PAGE_SIZE) {
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page += offset >> PAGE_SHIFT;
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offset &= ~PAGE_MASK;
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}
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len = PAGE_SIZE - offset;
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}
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addr = kmap_atomic(page);
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start = (unsigned long)(addr + offset);
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fn(start, start + len);
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kunmap_atomic(addr);
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} else {
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start = (unsigned long)phys_to_virt(paddr);
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fn(start, start + size);
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}
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offset = 0;
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page++;
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left -= len;
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} while (left);
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}
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void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_FROM_DEVICE:
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break;
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case DMA_TO_DEVICE:
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case DMA_BIDIRECTIONAL:
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cache_op(paddr, size, cpu_dma_wb_range);
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break;
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default:
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BUG();
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}
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}
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void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_TO_DEVICE:
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break;
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case DMA_FROM_DEVICE:
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case DMA_BIDIRECTIONAL:
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cache_op(paddr, size, cpu_dma_inval_range);
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break;
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default:
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BUG();
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}
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}
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void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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cache_op(page_to_phys(page), size, cpu_dma_wbinval_range);
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}
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