// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Support for Ingenic SoCs
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*
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* Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
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* Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
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* Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net>
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*/
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/pm.h>
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#include <linux/sizes.h>
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#include <linux/suspend.h>
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#include <linux/types.h>
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#include <asm/bootinfo.h>
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#include <asm/machine.h>
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#include <asm/reboot.h>
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static __init char *ingenic_get_system_type(unsigned long machtype)
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{
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switch (machtype) {
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case MACH_INGENIC_X2000E:
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return "X2000E";
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case MACH_INGENIC_X2000:
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return "X2000";
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case MACH_INGENIC_X1830:
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return "X1830";
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case MACH_INGENIC_X1000E:
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return "X1000E";
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case MACH_INGENIC_X1000:
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return "X1000";
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case MACH_INGENIC_JZ4780:
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return "JZ4780";
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case MACH_INGENIC_JZ4775:
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return "JZ4775";
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case MACH_INGENIC_JZ4770:
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return "JZ4770";
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case MACH_INGENIC_JZ4725B:
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return "JZ4725B";
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default:
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return "JZ4740";
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}
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}
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static __init const void *ingenic_fixup_fdt(const void *fdt, const void *match_data)
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{
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/*
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* Old devicetree files for the qi,lb60 board did not have a /memory
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* node. Hardcode the memory info here.
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*/
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if (!fdt_node_check_compatible(fdt, 0, "qi,lb60") &&
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fdt_path_offset(fdt, "/memory") < 0)
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early_init_dt_add_memory_arch(0, SZ_32M);
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mips_machtype = (unsigned long)match_data;
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system_type = ingenic_get_system_type(mips_machtype);
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return fdt;
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}
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static const struct of_device_id ingenic_of_match[] __initconst = {
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{ .compatible = "ingenic,jz4740", .data = (void *)MACH_INGENIC_JZ4740 },
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{ .compatible = "ingenic,jz4725b", .data = (void *)MACH_INGENIC_JZ4725B },
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{ .compatible = "ingenic,jz4770", .data = (void *)MACH_INGENIC_JZ4770 },
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{ .compatible = "ingenic,jz4775", .data = (void *)MACH_INGENIC_JZ4775 },
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{ .compatible = "ingenic,jz4780", .data = (void *)MACH_INGENIC_JZ4780 },
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{ .compatible = "ingenic,x1000", .data = (void *)MACH_INGENIC_X1000 },
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{ .compatible = "ingenic,x1000e", .data = (void *)MACH_INGENIC_X1000E },
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{ .compatible = "ingenic,x1830", .data = (void *)MACH_INGENIC_X1830 },
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{ .compatible = "ingenic,x2000", .data = (void *)MACH_INGENIC_X2000 },
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{ .compatible = "ingenic,x2000e", .data = (void *)MACH_INGENIC_X2000E },
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{}
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};
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MIPS_MACHINE(ingenic) = {
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.matches = ingenic_of_match,
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.fixup_fdt = ingenic_fixup_fdt,
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};
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static void ingenic_wait_instr(void)
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{
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__asm__(".set push;\n"
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".set mips3;\n"
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"wait;\n"
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".set pop;\n"
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);
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}
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static void ingenic_halt(void)
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{
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for (;;)
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ingenic_wait_instr();
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}
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static int __maybe_unused ingenic_pm_enter(suspend_state_t state)
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{
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ingenic_wait_instr();
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return 0;
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}
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static const struct platform_suspend_ops ingenic_pm_ops __maybe_unused = {
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.valid = suspend_valid_only_mem,
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.enter = ingenic_pm_enter,
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};
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static int __init ingenic_pm_init(void)
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{
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if (boot_cpu_type() == CPU_XBURST) {
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if (IS_ENABLED(CONFIG_PM_SLEEP))
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suspend_set_ops(&ingenic_pm_ops);
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_machine_halt = ingenic_halt;
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}
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return 0;
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}
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late_initcall(ingenic_pm_init);
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