// SPDX-License-Identifier: GPL-2.0
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/***************************************************************************/
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/*
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* m5307.c -- platform support for ColdFire 5307 based boards
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*
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* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2000, Lineo (www.lineo.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfwdebug.h>
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#include <asm/mcfclk.h>
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/***************************************************************************/
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/*
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* Some platforms need software versions of the GPIO data registers.
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*/
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unsigned short ppdata;
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unsigned char ledbank = 0xff;
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/***************************************************************************/
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DEFINE_CLK(pll, "pll.0", MCF_CLK);
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DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
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DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
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DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
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DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
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DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
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DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);
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struct clk *mcf_clks[] = {
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&clk_pll,
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&clk_sys,
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&clk_mcftmr0,
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&clk_mcftmr1,
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&clk_mcfuart0,
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&clk_mcfuart1,
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&clk_mcfi2c0,
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NULL
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};
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/***************************************************************************/
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static void __init m5307_i2c_init(void)
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{
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#if IS_ENABLED(CONFIG_I2C_IMX)
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writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
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MCFSIM_I2CICR);
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mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
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#endif /* IS_ENABLED(CONFIG_I2C_IMX) */
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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#if defined(CONFIG_NETtel) || \
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defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
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/* Copy command line from FLASH to local buffer... */
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memcpy(commandp, (char *) 0xf0004000, size);
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commandp[size-1] = 0;
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#endif
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mach_sched_init = hw_timer_init;
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/* Only support the external interrupts on their primary level */
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mcf_mapirq2imr(25, MCFINTC_EINT1);
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mcf_mapirq2imr(27, MCFINTC_EINT3);
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mcf_mapirq2imr(29, MCFINTC_EINT5);
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mcf_mapirq2imr(31, MCFINTC_EINT7);
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#ifdef CONFIG_BDM_DISABLE
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/*
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* Disable the BDM clocking. This also turns off most of the rest of
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* the BDM device. This is good for EMC reasons. This option is not
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* incompatible with the memory protection option.
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*/
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wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
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#endif
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m5307_i2c_init();
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}
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/***************************************************************************/
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