// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*
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*/
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/ {
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dummy_codec: dummy-codec {
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compatible = "rockchip,dummy-codec";
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#sound-dai-cells = <0>;
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status = "okay";
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};
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sound0 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "rockchip,tdm";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,bitclock-master = <&codec_master>;
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simple-audio-card,frame-master = <&codec_master>;
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status = "okay";
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simple-audio-card,cpu {
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sound-dai = <&i2s1_8ch>;
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};
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codec_master: simple-audio-card,codec {
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sound-dai = <&dummy_codec>;
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};
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};
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bt_codec: bt-codec {
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compatible = "delta,dfbmcs320";
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#sound-dai-cells = <1>;
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status = "okay";
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};
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sound1 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "rockchip,bt";
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simple-audio-card,format = "i2s";
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simple-audio-card,cpu {
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sound-dai = <&i2s3_2ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&bt_codec 1>;
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};
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};
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};
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&i2s1_8ch {
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pinctrl-0 = <&i2s1m0_lrck
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&i2s1m0_sclk
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&i2s1m0_sdi0
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&i2s1m0_sdi1
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&i2s1m0_sdo0
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&i2s1m0_sdo1
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&i2s1m0_sdo2>;
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i2s-lrck-gpio = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
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tdm-fsync-gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
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rockchip,tdm-multi-lanes;
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rockchip,tdm-tx-lanes = <3>;
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rockchip,tdm-rx-lanes = <2>;
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rockchip,clk-trcm = <1>;
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status = "okay";
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};
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&i2s3_2ch {
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assigned-clocks = <&cru CLK_I2S3_2CH>;
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assigned-clock-parents = <&mclkin_i2s3>;
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pinctrl-0 = <&i2s3_sdi
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&i2s3_sdo
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&i2s3_lrck
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&i2s3_sclk
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&i2s3_mclk>;
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status = "okay";
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};
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&mclkin_i2s3 {
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clock-frequency = <24576000>;
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};
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&spi3 {
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status = "okay";
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assigned-clocks = <&cru CLK_SPI3>;
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assigned-clock-rates = <200000000>;
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num-cs = <2>;
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pinctrl-0 = <&spi3m2_cs0
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&spi3m2_cs1
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&spi3m2_pins>;
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flash: is25lp032@1 {
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compatible = "issi,is25lp032", "jedec,spi-nor";
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <5000000>;
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m25p,fast-read;
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};
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};
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