// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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*/
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#include <dt-bindings/display/rockchip_vop.h>
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#include "rk3568m-serdes-evb-lp4x-v10.dtsi"
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#include "rk3568-android.dtsi"
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&i2c1 {
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status = "okay";
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clock-frequency = <10000>;
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};
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&lvds {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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lvds_out_rkx110_x120: endpoint {
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remote-endpoint = <&rkx110_x120_in_lvds>;
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};
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};
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};
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};
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&lvds_in_vp2 {
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status = "okay";
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};
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&rkx110_x120 {
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enable-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&rkx110_reset_gpio>;
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};
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&serdes_timing0 {
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clock-frequency = <50000000>;
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hactive = <1024>;
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vactive = <600>;
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hfront-porch = <160>;
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hsync-len = <20>;
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hback-porch = <140>;
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vfront-porch = <12>;
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vsync-len = <3>;
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vback-porch = <20>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <1>;
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};
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&serdes_panel {
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local-port0 = <RK_SERDES_LVDS_RX1>;
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remote0-port0 = <RK_SERDES_LVDS_TX0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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rkx110_x120_in_lvds: endpoint {
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remote-endpoint = <&lvds_out_rkx110_x120>;
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};
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};
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};
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};
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&video_phy0 {
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status = "okay";
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};
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/* vp0 for HDMI, vp2 for rgb */
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&vp0 {
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rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
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1 << ROCKCHIP_VOP2_SMART0)>;
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rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
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};
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&vp2 {
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rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 |
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1 << ROCKCHIP_VOP2_SMART1)>;
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rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
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};
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&rkx110_reset_gpio {
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rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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