// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2011 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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*
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* Copyright (C) 2010,2013, NVIDIA Corporation
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*/
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#include <linux/cpu_pm.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/of_address.h>
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#include <linux/of.h>
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#include <linux/syscore_ops.h>
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#include <soc/tegra/irq.h>
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#include "board.h"
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#include "iomap.h"
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#define SGI_MASK 0xFFFF
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#ifdef CONFIG_PM_SLEEP
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static void __iomem *tegra_gic_cpu_base;
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#endif
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bool tegra_pending_sgi(void)
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{
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u32 pending_set;
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void __iomem *distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
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pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET);
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if (pending_set & SGI_MASK)
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return true;
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return false;
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}
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#ifdef CONFIG_PM_SLEEP
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static int tegra_gic_notifier(struct notifier_block *self,
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unsigned long cmd, void *v)
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{
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switch (cmd) {
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case CPU_PM_ENTER:
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writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL);
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break;
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}
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return NOTIFY_OK;
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}
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static struct notifier_block tegra_gic_notifier_block = {
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.notifier_call = tegra_gic_notifier,
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};
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static const struct of_device_id tegra114_dt_gic_match[] __initconst = {
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{ .compatible = "arm,cortex-a15-gic" },
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{ }
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};
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static void __init tegra114_gic_cpu_pm_registration(void)
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{
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struct device_node *dn;
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dn = of_find_matching_node(NULL, tegra114_dt_gic_match);
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if (!dn)
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return;
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tegra_gic_cpu_base = of_iomap(dn, 1);
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cpu_pm_register_notifier(&tegra_gic_notifier_block);
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}
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#else
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static void __init tegra114_gic_cpu_pm_registration(void) { }
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#endif
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static const struct of_device_id tegra_ictlr_match[] __initconst = {
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{ .compatible = "nvidia,tegra20-ictlr" },
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{ .compatible = "nvidia,tegra30-ictlr" },
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{ }
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};
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void __init tegra_init_irq(void)
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{
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if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match)))
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pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
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tegra114_gic_cpu_pm_registration();
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}
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